JPH1070226A - Lead frame for resin sealed ic and manufacture thereof - Google Patents
Lead frame for resin sealed ic and manufacture thereofInfo
- Publication number
- JPH1070226A JPH1070226A JP8223600A JP22360096A JPH1070226A JP H1070226 A JPH1070226 A JP H1070226A JP 8223600 A JP8223600 A JP 8223600A JP 22360096 A JP22360096 A JP 22360096A JP H1070226 A JPH1070226 A JP H1070226A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- tie bar
- resin
- sealed
- back surfaces
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は樹脂封止型IC用リ
ードフレームに係るものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resin-sealed IC lead frame.
【0002】[0002]
【従来の技術及び発明が解決しようとする課題】樹脂封
止型IC用リードフレームは、銅系金属材料素地のまま
のものや、母材表面に銅或いはニッケル或いははそれら
の合金等からなるメッキ処理を施したものや、或いはリ
ードフレームのモールド樹脂で封止される部分の表面の
一部を化学エッチングにより粗面化したり電気エッチン
グにより粗面化したものが使用されてきた。2. Description of the Related Art A lead frame for a resin-sealed IC is a copper-based metal material as is, or a base material having a surface made of copper, nickel, or an alloy thereof. A treated material or a material in which a part of the surface of a lead frame sealed with a mold resin is roughened by chemical etching or roughened by electric etching has been used.
【0003】しかし、このようにして製造したリードフ
レームは、ダイパットの上に半田や接着剤を使用して半
導体チップを装着し、半導体チップの各電極と銀メッキ
されたインナーリードの端部とをボンデングワイヤで接
続した後、リードフレームのタイバーで囲まれた内側面
を上下よりモールド金型で挾持しモールド樹脂を加圧注
入して封入していたが、モールド金型とタイバーとの接
触面にわずかでも隙間があるとこの隙間にモールド樹脂
が侵入し樹脂バリができる欠点があった。However, in the lead frame manufactured as described above, a semiconductor chip is mounted on a die pad using solder or an adhesive, and each electrode of the semiconductor chip and the end of the silver-plated inner lead are connected. After connecting with the bonding wire, the inner surface surrounded by the tie bar of the lead frame was sandwiched from above and below by a mold, and the mold resin was injected under pressure and sealed, but the contact surface between the mold and the tie bar However, if there is a slight gap, there is a disadvantage that the mold resin enters the gap and resin burrs are formed.
【0004】本発明は上記欠点を解決した樹脂封止型I
Cリードフレーム及びその製造方法を提供することを技
術的課題とするものである。The present invention is directed to a resin-sealed type I which has solved the above-mentioned disadvantages.
It is a technical object to provide a C lead frame and a method for manufacturing the same.
【0005】[0005]
【課題を解決するための手段】添付図面を参照して本発
明の要旨を説明する。The gist of the present invention will be described with reference to the accompanying drawings.
【0006】樹脂封止型IC用リードフレームにおい
て、該リードフレーム1の表裏全面若しくはアウターリ
ード部2を除くタイバー3より内側の表裏面に、梨地状
処理を施した梨地状処理面aを備えたことを特徴とする
樹脂封止型IC用リードフレームに係るものである。A lead frame for a resin-sealed IC is provided with a matte-finished surface a which is subjected to a matte-finish treatment on the entire front and back surfaces of the lead frame 1 or on the front and back surfaces inside the tie bar 3 excluding the outer lead portion 2. The present invention relates to a resin-sealed type lead frame for an IC.
【0007】また、樹脂封止型IC用リードフレームの
製造方法において、該リードフレーム1の表裏全面若し
くはアウターリード部2を除くタイバー3より内側の表
裏面にウェットブラスト加工により梨地状処理面aを形
成することを特徴とする樹脂封止型IC用リードフレー
ムの製造方法に係るものである。In the method for manufacturing a lead frame for a resin-sealed IC, the matte-finished surface a is formed by wet blasting on the entire front and back surfaces of the lead frame 1 or on the front and back surfaces inside the tie bar 3 excluding the outer lead portion 2. The present invention relates to a method for manufacturing a lead frame for a resin-sealed IC, characterized by being formed.
【0008】[0008]
【発明の実施の形態】本発明の実施の形態を作用効果を
示して実施の一例である図面に基づいて説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described with reference to the drawings, which are examples of embodiments, showing the functions and effects.
【0009】請求項1の実施の形態について説明する。An embodiment according to claim 1 will be described.
【0010】リードフレーム1の表裏全面若しくはアウ
ターリード部2を除くタイバー3より内側の表裏面に梨
地状処理を施し、このアウターリード部2を除くタイバ
ー3の内側面の梨地状処理面aをモールド金型cで梨地
状処理面aの凸部を押し潰すように挾持してモールド樹
脂dを加圧注入すると、モールド金型cとタイバー3と
の接触面が均一に接触しているのでこの隙間にモールド
樹脂dが侵入せずモールド樹脂バリの発生が防止でき
る。A matte finish is applied to the entire front and back surfaces of the lead frame 1 or to the front and back surfaces inside the tie bar 3 excluding the outer lead portion 2, and the matte surface a on the inner surface of the tie bar 3 excluding the outer lead portion 2 is molded. When the molding resin d is injected under pressure by crushing the convex portion of the matte processing surface a with the mold c, the contact surface between the molding die c and the tie bar 3 is in uniform contact. The mold resin d does not penetrate into the mold and the occurrence of mold resin burr can be prevented.
【0011】請求項2の実施の形態について説明する。A second embodiment will be described.
【0012】リードフレーム1の表裏全面若しくはアウ
ターリード部2を除くタイバー3より内側の表裏面をウ
ェットブラスト加工すると、砥粒を混入した加圧水によ
りリードフレーム1の加工面凸部が素地面より盛り上が
り梨地状処理面aが形成される。このアウターリード部
2を除くタイバー3の内側面の梨地状処理面aをモール
ド金型cで梨地状処理面aの凸部を押し潰すように挾持
してモールド樹脂dを加圧注入すると、モールド金型c
とタイバー3との接触面が均一且つ確実に接触している
のでこの隙間にモールド樹脂dが侵入せずモールド樹脂
バリの発生が防止される樹脂封止型IC用リードフレー
ムの製造方法となる。When wet blasting the entire front and back surfaces of the lead frame 1 or the inside and outside of the tie bar 3 excluding the outer lead portion 2, the processing surface convex portion of the lead frame 1 rises from the bare ground due to pressurized water mixed with abrasive grains. The shape processing surface a is formed. When the matte processing surface a on the inner surface of the tie bar 3 excluding the outer lead portion 2 is sandwiched by a mold c so that the convex portion of the matte processing surface a is crushed, the molding resin d is injected under pressure. Mold c
Since the contact surface between the tie bar 3 and the tie bar 3 is uniformly and surely in contact with each other, the molding resin d does not penetrate into this gap, thereby preventing the occurrence of molding resin burrs.
【0013】[0013]
【実施例】添付図面は本発明に好適な実施の一例を図示
したもので、図1は本発明のリードフレーム1の説明用
平面図、図2は図1の断面図である。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a plan view of a lead frame according to an embodiment of the present invention; FIG. 2 is a sectional view of FIG.
【0014】図において符号5は図示省略の半導体チッ
プ6を搭載するためのほぼ矩形型のダイパット、7はイ
ンナーリード、8はボンデングワイヤである。In the drawing, reference numeral 5 denotes a substantially rectangular die pad for mounting a semiconductor chip 6 (not shown), 7 denotes an inner lead, and 8 denotes a bonding wire.
【0015】樹脂封止型IC用リードフレームにおい
て、該リードフレーム1の表裏全面若しくはアウターリ
ード部2を除くタイバー3より内側の表裏面に、梨地状
処理を施した梨地状処理面aを備える。A lead frame for a resin-sealed IC is provided with a matte-textured surface a on the entire front and back surfaces of the lead frame 1 or on the front and back surfaces inside the tie bar 3 excluding the outer lead portion 2.
【0016】また、樹脂封止型IC用リードフレームの
製造方法において、該リードフレーム1の表裏全面若し
くはアウターリード部2を除くタイバー3より内側の表
裏面にウェットブラスト加工により梨地状処理面aを形
成する。In the method of manufacturing a lead frame for a resin-sealed IC, the matte-finished surface a is formed by wet blasting on the entire front and back surfaces of the lead frame 1 or on the front and back surfaces inside the tie bar 3 excluding the outer lead portion 2. Form.
【0017】[0017]
【発明の効果】本発明の実施例を上記のように構成した
ので、請求項1の発明では、リードフレームの表裏全面
若しくはアウターリード部を除くタイバーより内側の表
裏面に梨地状処理を施し、このアウターリード部を除く
タイバーの内側面の梨地状処理面をモールド金型で梨地
状処理面の凸部を押し潰すように挾持してモールド樹脂
を加圧注入すると、モールド金型とタイバーとの接触面
が均一に接触しタイバー部においてモールド樹脂バリが
防止できるうえに、モールド樹脂パッケージ部において
リードフレームとモールド樹脂の密着強度が向上する秀
れた効果を発揮する樹脂封入型IC用リードフレームと
なる。Since the embodiment of the present invention is constructed as described above, in the first aspect of the present invention, a matte finish is applied to the entire front and back surfaces of the lead frame or the inside and outside of the tie bar excluding the outer lead portion, When the matte processing surface on the inner surface of the tie bar excluding the outer lead portion is sandwiched by a mold so as to crush the convex portion of the matte processing surface, and the molding resin is injected under pressure, the molding die and the tie bar are in contact with each other. A resin-encapsulated IC lead frame that has an excellent effect that the contact surface is evenly contacted and mold resin burr can be prevented at the tie bar part and the adhesion strength between the lead frame and the mold resin is improved at the mold resin package part. Become.
【0018】請求項2の発明では、リードフレームの表
裏全面若しくはアウターリード部を除くタイバーより内
側の表裏面をウェットブラスト加工により梨地状処理面
を形成し、このアウターリード部を除くタイバーの内側
面の梨地状処理面をモールド金型で梨地状処理面の凸部
を押し潰すように挾持してモールド樹脂を加圧注入する
と、前記と同様にモールド金型とタイバーとの接触面が
均一に接触しタイバー部においてモールド樹脂バリが防
止できるうえに、モールド樹脂パッケージ部においてリ
ードフレームとモールド樹脂の密着強度が向上する秀れ
た実用性を発揮する樹脂封入型IC用リードフレームの
製造方法となる。According to the second aspect of the present invention, the entire front and back surfaces of the lead frame or the inner and outer surfaces of the tie bar except for the outer lead portion are formed by wet blasting to form a matte-finished surface, and the inner surface of the tie bar excluding the outer lead portion is formed. The mold surface and the tie bar are uniformly contacted with each other as described above by injecting the mold resin under pressure while holding the matte-processed surface of the In addition, the present invention provides a method of manufacturing a lead frame for a resin-encapsulated IC, which exhibits excellent practicality in which mold resin burrs can be prevented in the tie bar portion and the adhesion strength between the lead frame and the mold resin is improved in the mold resin package portion.
【図1】本実施例のリードフレームの説明用平面図であ
る。FIG. 1 is an explanatory plan view of a lead frame of the present embodiment.
【図2】上記の断面図である。FIG. 2 is a sectional view of the above.
a 梨地状処理面 1 リードフレーム 2 アウターリード部 3 タイバー a Matte surface 1 Lead frame 2 Outer lead 3 Tie bar
Claims (2)
て、該リードフレームの表裏全面若しくはアウターリー
ド部を除くタイバーより内側の表裏面に、梨地状処理を
施した梨地状処理面を備えたことを特徴とする樹脂封止
型IC用リードフレーム。1. A lead frame for a resin-sealed IC, wherein a matte surface is provided on the entire front and back surfaces of the lead frame or on the front and back surfaces inside a tie bar excluding an outer lead portion. Characteristic resin-encapsulated IC lead frame.
方法において、該リードフレームの表裏全面若しくはア
ウターリード部を除くタイバーより内側の表裏面にウェ
ットブラスト加工により梨地状処理面を形成することを
特徴とする樹脂封止型IC用リードフレームの製造方
法。2. A method of manufacturing a lead frame for a resin-sealed IC, comprising forming a matte-finished surface by wet blasting on the entire front and back surfaces of the lead frame or on the front and back surfaces inside a tie bar excluding an outer lead portion. A method for manufacturing a lead frame for a resin-sealed IC, which is characterized by the following.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8223600A JPH1070226A (en) | 1996-08-26 | 1996-08-26 | Lead frame for resin sealed ic and manufacture thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8223600A JPH1070226A (en) | 1996-08-26 | 1996-08-26 | Lead frame for resin sealed ic and manufacture thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH1070226A true JPH1070226A (en) | 1998-03-10 |
Family
ID=16800729
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8223600A Pending JPH1070226A (en) | 1996-08-26 | 1996-08-26 | Lead frame for resin sealed ic and manufacture thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH1070226A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002326252A (en) * | 2001-05-02 | 2002-11-12 | Idemitsu Petrochem Co Ltd | Metal inserted polyphenylene sulfide resin molded part |
-
1996
- 1996-08-26 JP JP8223600A patent/JPH1070226A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002326252A (en) * | 2001-05-02 | 2002-11-12 | Idemitsu Petrochem Co Ltd | Metal inserted polyphenylene sulfide resin molded part |
WO2002090083A1 (en) * | 2001-05-02 | 2002-11-14 | Idemitsu Petrochemical Co., Ltd. | Method of producing metal insert polyphenylene sulfide resin molded component, the molded component and semiconductor producing device having it |
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