JPH1056484A - Orthogonal and amplitude error compensation circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make an i-phase orthogonal to an orthogonal component outputted from an orthogonal quasi-synchronization detector and to make the amplitude constant. SOLUTION: An orthogonal and amplitude error compensation circuit 3 is provided for an output stage of an orthogonal quasi-synchronization detector 2. Then the processing of yi =h3 xi and yq =h1 xq +h2 x1 is conducted by coefficients h1 , h2 , h3 updated adaptively with respect to two components x1 , xq received from the orthogonal quasi-synchronization detector 2 to obtain two components y1 , yq in which the error in the orthogonality and the amplitude is compensated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a communication system for modulating and transmitting a digital signal. In particular, it relates to a device for demodulating a digital signal.

[0002]

2. Description of the Related Art In a conventional demodulator for extracting information from a modulated wave in digital communication using a phase modulation / demodulation system, a received modulated wave is amplified by an amplifier, and orthogonal quasi-synchronous detection is performed by a quadrature quasi-synchronous detector. The output of the quadrature quasi-synchronous detector is detected by a detector, and the identification device uses an identification plane on an IQ plane with the in-phase component on the I-axis and the quadrature component on the Q-axis. Information is obtained from the orthogonal components.

[0003]

However, the in-phase component and the quadrature component output from the quadrature quasi-synchronous detector should ideally be orthogonal and have a constant amplitude. Therefore, the amplitude may not be constant or may not be orthogonal. That is, the output of the quadrature quasi-synchronous detector is
A quadrature / amplitude error occurs. Therefore, if the in-phase component and the quadrature component output from the quadrature quasi-synchronous detector are directly used as the input to the detector, there is a disadvantage that the bit error rate (BER) increases. The detailed process in which such a defect occurs will be described below.

FIG. 7 is a diagram showing the trajectory drawn by the in-phase component and the quadrature component which are the outputs of the quadrature quasi-synchronous detector, and shows what trajectory is drawn on the IQ plane due to imperfection of the device. FIG.

[0005] perpendicular to the quasi-coherent detector, to generate a phase sum signal and the phase difference signal by multiplying the reference signal to the phase-modulated wave signal _{Acos (ω c t + Φ k} ), the phase of low-pass filter This is a device that removes a sum signal and obtains a phase difference signal. Here, AS expression of the modulated wave signal represents the amplitude of the modulation signal, omega _c denotes the angular frequency of the carrier, the [Phi _k represents a phase component with different values to the value of the baseband signal. Also,
The reference signal is a sine function p _i co of an angular frequency ω = ω _c + Δω having a difference of only an error Δω from the angular frequency ω _{c of the} carrier.
s (.omega.t) and cosine functions -p _q is that sin of (.omega.t), the use of each of the reference signal, the in-phase component of the modulated wave _{I = Ap i cos (Φ k} -Δωt) and a quadrature component Q = -p
_q sin (Φ _k −Δωt) is obtained. Note that the sine function p _i cos (ωt) and the cosine function p _q sin (ω
t _i and p _{q in} t) represent the amplitudes of the respective functions.

[0006] If the error Δω is zero, each phase component and quadrature _{component, Ap i cos (Φ k)} , Ap q
sin (Φ _k ). Therefore, the trajectory of the in-phase component and the quadrature component on the IQ plane is a stationary point within one time slot, although the position of the point changes with the change of Φ _k . However, since Δω actually has some value, the trajectory of the in-phase component and the quadrature component is a trajectory that rotates with the passage of time. Here, assuming that the amplitudes p _i and p _{q of the} reference signal for deriving the in-phase component and the quadrature component have the same value and that the gains of the in-phase component and the quadrature component are the same, the in-phase component on the IQ plane and the The trajectory of the orthogonal component is a perfect circle as shown in FIG.

However, in practice, due to imperfections of the device,
The above assumption does not hold, and the trajectories of the in-phase component and the quadrature component on the IQ plane are ellipses whose axes are the I axis and the Q axis, as shown in FIG. 7B.

[0008] So far, as a precondition, as a reference signal to derive in-phase and quadrature components, sine function p _i c
It is assumed that os (ωt) and the cosine function −p _q sin (ωt) are used. That is, this is the case where the phases of the two reference signals for deriving the in-phase component and the quadrature component are exactly shifted by π / 2, and therefore the in-phase component and the quadrature component are exactly orthogonal. However, when the in-phase component and the quadrature component are not orthogonal due to imperfection of the device, an ellipse whose axis is displaced from both the I axis and the Q axis as shown in FIG. 7C. When shown by the formula, the reference signal p _i cos (ωt) and -p _q sin (ωt + Φ), and the when seeking and those from the in-phase and quadrature components, respectively _{I = Ap i cos (Φ k} -Δωt), Q = Ap _q s
in (Φ _k −Δωt−Φ). These equations represent the quadrature / amplitude error of the output of the quadrature quasi-synchronous detector.

In summary, the in-phase component I and the quadrature component Q are orthogonal and have the amplitude (square root of I ² + Q ² ).
Is constant, the trajectories of the in-phase component and the quadrature component on the IQ plane become a perfect circle as shown in FIG. 7A. If the quadrature is orthogonal but the amplitude is not constant, FIG. As shown in FIG. 7, the axis is an ellipse having an I axis and a Q axis. If the axis is not orthogonal, the axis is an ellipse shifted from both the I axis and the Q axis as shown in FIG.

The reason why the trajectories of the in-phase component and the quadrature component, which are the outputs of the quadrature quasi-synchronous detector, do not form a perfect circle is that the phase shifter constituting the quadrature quasi-synchronous detector accurately transfers the signal by π / 2.
This is due to imperfections of the device, such as when only the phase cannot be shifted or when the gains of the in-phase component and the quadrature component are different.

Next, a description will be given of how the in-phase component and the quadrature component, which are the outputs of the quadrature quasi-synchronous detector, are input to the detector and subjected to what processing, resulting in an increase in BER. The purpose of the detector processing is to obtain the new in-phase and quadrature components by removing the influence of the rotation of the trajectory of the in-phase and quadrature components caused by the frequency shift Δω of the reference signal of the quadrature quasi-synchronous detector. It is in. However, since white Gaussian noise is added to the signal and noise is distributed around the trajectory of the in-phase component and the quadrature component on the IQ plane, the trajectory of the in-phase component and the quadrature component output from the quadrature quasi-synchronous detector is obtained. Is not a perfect circle, the result of processing the detector and extracting the digital signal by the discriminator is compared with the case where the trajectories of the in-phase component and the quadrature component are perfect circles.
BER increases.

As described above, the in-phase component and the quadrature component output from the quadrature quasi-synchronous detector should ideally be quadrature and have a constant amplitude. A quadrature / amplitude error occurs. For this reason, the amplitude may differ between the in-phase component and the quadrature component or may not be quadrature. If the in-phase component and the quadrature component are directly input to the detector, the BER increases.

Further, even when the in-phase component and the quadrature component are orthogonal but the amplitude is not constant due to the imperfection of the device, or even when the components are not orthogonal, the difference from the perfect device is known in advance. If there is, a device is provided after the quadrature quasi-synchronous detector to adjust by multiplying the in-phase component and the quadrature component by a constant,
There is also known a technique in which an in-phase component and a quadrature component are orthogonal to each other and have a constant amplitude. If this conventional technique is used, the BER can be certainly improved, but it is difficult to adjust, so that there is a drawback that the labor cost is increased. Further, such a conventional technique does not provide any effective means when the fluctuation between the in-phase component and the quadrature component changes over time due to a slow time variation caused by a temperature variation.

An object of the present invention is to solve these problems and to provide a quadrature and amplitude error compensation circuit that makes the in-phase component and the quadrature component output from the quadrature quasi-synchronous detector orthogonal and makes the amplitude constant. And

[0015]

SUMMARY OF THE INVENTION A quadrature and amplitude error compensating circuit according to the present invention is a quadrature and amplitude error compensating circuit for compensating for quadrature and amplitude errors of in-phase and quadrature component signals output from a quadrature quasi-synchronous detector. In the compensation circuit, a signal obtained by multiplying the input signal of one of the in-phase component and the quadrature component from the quadrature quasi-synchronous detector by a first coefficient and a signal obtained by multiplying the input signal of the other component by a second coefficient First means for adding an output signal for one component to produce an output signal for the other component, second means for multiplying the input signal of the other component by a third coefficient to produce an output signal for the component, and a quadrature quasi-synchronous detector The first to third coefficients are updated so that the output signal of the first means and the output signal of the second means are orthogonal and the sum of squares is constant at every predetermined number of inputs from Third means to Characterized in that was.

A third means for obtaining an error term e obtained by subtracting a sum of squares of the output of the first means and the output of the second means from the square of a constant σ representing a desired amplitude level; , A multiplied value of the input signal and the output signal of one component and the error term e is further multiplied by a constant parameter μ for controlling the magnitude of correction, and a first update difference is obtained. Fifth means for adding to the previous first coefficient to obtain a new first coefficient, and a second means for multiplying the input signal of one component, the output signal of the other component, the error term e, and the parameter μ. Sixth means for determining the update difference of the second component, adding the second update difference to the second coefficient before the update to obtain a new second coefficient, an input signal of the other component and an output of the one component A third update difference obtained by multiplying the signal, the error term e, and the parameter μ is obtained, and the third update difference is obtained. It is possible to include a sixth unit for a third by adding the coefficient new second coefficient before updating different.

The principle of the present invention will be described below. First, an orthogonality and amplitude error generation model based on a discrete time expression is developed as follows.

[0018]

(Equation 1) Here, x _{i, k} and x _{q, k} represent an in-phase component and a quadrature component, respectively, and the subscript k represents time. The matrix term on the right-hand side of Equation 1 is a part that clearly generates orthogonality and amplitude errors. Therefore, the orthogonality and amplitude error can be compensated for by multiplying the vector of Equation 1 by the inverse matrix of this matrix term. This inverse matrix is easily obtained as follows.

[0019]

(Equation 2) That is, by accurately estimating the three elements of the matrix in Equation 2, the orthogonality and the amplitude are compensated. Therefore, the following processing corresponding to Equation 2 is performed on the orthogonally detected signal.

[0020]

(Equation 3) Here, y _{i, k} and y _{q, k} represent an in-phase component and a quadrature component after signal processing. To estimate these three matrix elements, paying attention to the fact that the output amplitude is constant regardless of the transmission code bit if the quadrature amplitude compensation is perfect, a CMA (Constant Modulus Algorithm) that uses constant amplitude as a cost function is used. Apply. This algorithm is described in the literature: JR Reichler and MGLarimore, "New process
ing techniques based on the constant adaptive algo
rithm ", IEEE Trans.Acoust., Speech & processing, A
See SSP-33, pp.420-431, 1985. Equation 4 shows a cost function to which CMA is applied.

[0021]

(Equation 4) In this equation, σ ² is a desired amplitude level, and the matrix H and the vector X are right-varying matrices and vectors of Equation 3, respectively. CM
The parameter estimation formula used in A is obtained as an extension of the steepest descent method, and is given by the following formula.

[0022]

(Equation 5) However,

[0023]

(Equation 6) It is. μ is a constant called a step size parameter, which is a parameter for controlling the magnitude of correction in each repetition. [•] ^T indicates transpose of a matrix or vector. Table 1 shows an update formula that specifically calculates Equation 6. Since the orthogonality and amplitude compensation model obtained by Equation 3 is complete, the orthogonality and amplitude errors can be compensated by repeatedly executing the parameter estimation equations of Equations 4 and 5.

According to the present invention, the quadrature and quadrature outputs of the quadrature quasi-synchronous detector are processed by performing signal processing that sequentially adapts to the in-phase component and the quadrature component as the outputs of the quadrature quasi-synchronous detector. The amplitude error is compensated, the in-phase component and the quadrature component are made orthogonal, and the amplitude is made constant.
The difference from the prior art is that the in-phase component and the quadrature component of the output of the quadrature quasi-synchronous detector are input to a signal processing device for signal processing without being immediately input to the detector. Also, compared to the prior art in which a device that adjusts the in-phase component and the quadrature component by multiplying by a constant is used, the coefficients used when performing signal processing on the in-phase component and the quadrature component are not constants, but are sequentially determined with the passage of time. They differ in that they change.

According to the present invention, quadrature and amplitude errors occur in the in-phase component and the quadrature component as outputs of the quadrature quasi-synchronous detector,
Even when the signal is orthogonal but the amplitude is not constant, or even when the signal is not orthogonal, the output of the quadrature quasi-synchronous detector is signal-processed by the quadrature and amplitude error compensating circuit, which is a type of signal processing device, to generate an Since the orthogonal component can be orthogonalized and the amplitude can be kept constant, an effect of reducing the BER can be obtained.

According to the present invention, since the coefficients used for signal processing of the in-phase component and the quadrature component as outputs of the quadrature quasi-synchronous detector are sequentially changed with time, a slow time caused by a temperature change is obtained. Even if the fluctuation between the in-phase component and the quadrature component changes over time due to the fluctuation, it is possible to perform signal processing adaptively to the conditions that change from moment to moment, so that there is a temperature fluctuation. Also has the effect of lowering the BER.

[0027]

FIG. 1 is a block diagram showing a digital signal demodulating apparatus according to an embodiment of the present invention. This demodulator includes an amplifier 1, a quadrature quasi-synchronous detector 2, a quadrature and amplitude error compensation circuit 3, a detector 4, and an identification device 5. A phase-modulated modulated wave that arrives at the demodulation device in the form of a radio wave is received by an antenna, amplified by an amplifier 1 and input to a quadrature quasi-synchronous detector 2. The quadrature quasi-synchronous detector 2 performs quadrature quasi-synchronous detection on the amplified received wave, and outputs an in-phase component and a quadrature component signal. Hereinafter, these signals are simply referred to as “in-phase component” and “quadrature component”. The output of the quadrature quasi-synchronous detector 2 is output to a quadrature and amplitude error compensation circuit 4.
Is input to the detector 4 via the detector and detected. The identification device 5 identifies information from the in-phase component and the quadrature component output from the detector 4 using an IQ plane having the in-phase component as the I axis and the quadrature component as the Q axis as an identification plane. Thereby, digital baseband information can be obtained from the modulated wave that has reached the demodulation device in the form of a radio wave.

Here, the in-phase component and the quadrature component output from the quadrature quasi-synchronous detector 2 are not completely synchronized on the IQ plane because the frequency of the reference signal is not exactly the same as the frequency of the carrier. Instead, it becomes a rotating trajectory. Also, due to the imperfections of the quadrature quasi-synchronous detector 2, the in-phase component and the quadrature component are usually orthogonal but the amplitude is not constant or not orthogonal. That is,
Quadrature and amplitude errors occur.

Therefore, in the present embodiment, the in-phase component and the quadrature component of the modulated wave output from the quadrature quasi-synchronous detector 2 are used for the quadrature quasi-synchronous detector 2. And the amplitude error compensation circuit,
The signal-processed in-phase component and quadrature component are obtained as outputs. The signal-processed in-phase component and the quadrature component are orthogonal to each other by the operation of the quadrature and amplitude error compensation circuit 3.
And the amplitude is constant. By inputting the signal-processed in-phase component and the quadrature component to the detector 4, the in-phase component and the quadrature component which are completely synchronized and stationary on the IQ plane are obtained.

FIGS. 2 to 6 are diagrams showing a detailed circuit configuration of the quadrature and amplitude error compensating circuit 3, which are shown according to their functions. FIG. 2 shows coefficients h ₁ , h ₂ , and h ₂ for the in-phase component x _I and the quadrature component x _q input from the quadrature quasi-synchronous detector ₂ .
₃ shows a configuration for processing using h ₃ , and FIG. 4 shows a configuration for obtaining an error term e.
A configuration for obtaining ₁ , h ₂ and h ₃ will be described.

Referring to FIG. 2, the quadrature and amplitude error compensation circuit 3 includes a multiplier 11 for multiplying an input quadrature component x _q from the quadrature quasi-synchronous detector 2 by a first coefficient h ₁ , A multiplier 12 for multiplying the component x _i by a second coefficient h ₂ , an adder 13 for adding the output of the multiplier 11 and the output of the multiplier 12 to obtain an output quadrature component y _q, and an input in-phase component x _i And a multiplier 14 for multiplying the output signal by a _third coefficient h ₃ to obtain an output in-phase component y _i . That is, signal processing of y _i = h ₃ x _i and y _q = h ₁ x _q + h ₂ x _i is performed. Here, the coefficients h ₁ , h ₂ , and h ₃ are not constants, but coefficients that change sequentially with time so that the in-phase component y _i and the quadrature component _q are orthogonal and their sum of squares is constant. is there. Therefore, it is necessary to sequentially update the coefficients h ₁ , h ₂ , and h ₃ every time a predetermined number of inputs are made. This sequential update is
It may be performed every time one symbol is input, or may be performed every plural symbols. Therefore, the update cycle is equal to or less than the symbol rate.

The coefficients h ₁ , h ₂ , h ₃ can be obtained from the input and output components and the output amplitude error. As the amplitude error, an error term e is defined by subtracting the sum of squares of the in-phase component y _i and the quadrature component y _q from the square of a constant σ representing a desired amplitude level. To find the error term e, as shown in FIG. 3, the square of the constant σ is found by the multiplier 15, and the squares of the in-phase component y _i and the quadrature component y _q are found by the multipliers 16 and 17, respectively. Multiplier 1 is applied to the outputs of 16 and 17
Multiply by -1 by 8, 19, and multipliers 15, 18, 19
Are added by the adder 20. The constant σ can be selected arbitrarily, but if the circuit is a digital circuit and the signal is quantized, if the value of the constant σ is too small, it will be buried in the quantization error and conversely too large. Therefore, it is desirable to set an appropriate value. Also, even when the circuit is analog, if the value of the constant σ is too small, the influence of the DC drift is large, and if the value is too large, there is a disadvantage that the power consumption becomes too large. Must be set.

Next, updating of the coefficient h ₁ will be described with reference to FIG. Here, the coefficient h ₁ before update is represented by h _{1, k−1} ,
The updated coefficient h ₁ is represented as h _{1, k} . To obtain the coefficients h _{1, k} , the input orthogonal component x _q , the output orthogonal component y _q , the error term e, and a constant parameter μ for controlling the magnitude of correction are multiplied by the multiplier 21 to obtain The obtained update difference Δh ₁ is added by the adder 22 to the coefficient h _{11 1, k−1} before the update. The coefficient h _{1, k} thus obtained is used as the multiplier 11 shown in FIG.
Supplied to The parameter μ is a constant called a step size parameter, and controls the magnitude of correction in each repetition.

The update of the coefficient h ₂ is the coefficient of the pre-update h ₂ h
_{2, k-1,} a coefficient after update h ₂ represents the h _{2, k,} as shown in FIG. 5, the input quadrature component x _q and the output phase component y _i and the error term e and the parameter μ and the multiplier 23 And the obtained update difference Δh ₂ is added by an adder 24 to a coefficient h before updating.
Add to _{2, k-1} . The coefficient h2 _{, k} thus obtained is supplied to the multiplier 12 shown in FIG.

The update of the coefficient h ₃ is, the coefficient h ₃ before the update h
_{3, k-1,} the coefficients h ₃ of the updated expressed as h _{3, k,} as shown in FIG. 6, a multiplier 25 and the input phase component x _i and the output phase component y _i and the error term e and the parameter μ And the obtained update difference Δh ₃ is added by an adder 26 to a coefficient h before updating.
Add to _{3, k-1} . The obtained coefficient h3 _{, k} is supplied to the multiplier 14 shown in FIG.

Table 1 shows the updating formulas for the coefficients h ₁ , h ₂ and h ₃ . Signal processing is performed by the configuration shown in FIG. 2 using the coefficients h ₁ , h ₂ , and h ₃ that change sequentially. As a result, quadrature and amplitude errors occur in the in-phase component and the quadrature component on the IQ plane, so that even if they are not orthogonal or orthogonal but the amplitude is not constant,
It is possible to make corrections so as to be orthogonal and constant in amplitude. Further, even if the fluctuations of the in-phase component and the quadrature component change over time due to the change of the temperature characteristic, the coefficients h ₁ , h ₂ , and h ₃ change successively, so that the coefficients follow the fluctuation and adaptively follow the fluctuation. Signal processing becomes possible.

[0037]

[Table 1]

[0038]

When there is an error in the orthogonality and the amplitude between the in-phase component and the quadrature component as the output of the quadrature quasi-synchronous detector, the amplitude fluctuates according to the phase of the signal. Therefore, in the present invention, a quadrature and amplitude error compensation circuit using a CMA algorithm for keeping the amplitude constant is provided at the output of quadrature quasi-synchronous detection. This makes it possible to make the in-phase component and the quadrature component orthogonal and to keep the amplitude constant. Eliminating orthogonality and amplitude errors results in BE
The effect of reducing R is obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram of a digital signal demodulation apparatus according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating a part of a configuration of a quadrature and amplitude error compensation circuit, which is configured to process in-phase component x _I and quadrature component x _q using coefficients h ₁ , h ₂ , and h ₃ ; FIG.

FIG. 3 is a diagram showing a part of the configuration of a quadrature and amplitude error compensation circuit, and is a circuit diagram showing a configuration for obtaining an error term e.

FIG. 4 is a circuit diagram showing a part of a configuration of a quadrature and amplitude error compensation circuit, and showing a configuration for obtaining a coefficient h ₁ ;

FIG. 5 is a circuit diagram showing a part of a configuration of a quadrature and amplitude error compensation circuit, and showing a configuration for obtaining a coefficient h ₂ .

[Figure 6] is a diagram showing a part of a configuration of the quadrature and amplitude error compensation circuit, the circuit diagram showing the construction for obtaining the coefficients h _3.

FIG. 7 is a diagram illustrating a locus drawn by an in-phase component and a quadrature component which are outputs of a quadrature quasi-synchronous detector.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Amplifier 2 Quadrature quasi-synchronous detector 3 Quadrature and amplitude error compensation circuit 4 Detector 5 Identification device 11, 12, 14-19, 21, 23, 25 Multiplier 13, 20, 22, 24, 26 Adder

Claims (3)

[Claims] 1. A quadrature and amplitude error compensating circuit for compensating quadrature and amplitude errors of an in-phase component and a quadrature component signal output from a quadrature quasi-synchronous detector. A signal obtained by adding a signal obtained by multiplying the input signal of one of the orthogonal components by the first coefficient and a signal obtained by multiplying the input signal of the other component by the second coefficient to obtain an output signal for the one component Means for multiplying the input signal of the other component by a third coefficient to obtain an output signal for that component, and for each predetermined number of inputs from the quadrature quasi-synchronous detector And third means for updating the first to third coefficients such that the output signal of the first means and the output signal of the second means are orthogonal and the sum of squares thereof is constant. Orthogonal and And amplitude error compensation circuit. 2. The method according to claim 1, wherein the third means calculates an error term obtained by subtracting the sum of squares of the output of the first means and the output of the second means from the square of a constant σ representing a desired amplitude level. Fourth means, a first update difference obtained by further multiplying a multiplied value of the input signal and output signal of the one component and the error term by a certain parameter for controlling the magnitude of correction, Fifth means for adding an update difference to a first coefficient before update to be a new first coefficient, an input signal of the one component, an output signal of the other component, the error term, and the parameter A second update difference obtained by multiplying the second component by the second component and adding the second update difference to the second coefficient before update to obtain a new second coefficient; and inputting the other component. Multiplying the signal, the output signal of the one component, the error term and the parameter And a sixth means for calculating the calculated third update difference, adding the third update difference to the third coefficient before the update to obtain a new second coefficient. Amplitude error compensation circuit. 3. A quadrature quasi-synchronous detector for performing quadrature quasi-synchronous detection on a phase-modulated modulated wave and outputting signals of an in-phase component and a quadrature component, and a detector for detecting an output from the quadrature quasi-synchronous detector. An identification device for identifying information from an in-phase component and an orthogonal component signal output from the detector as an identification plane using an IQ plane having an in-phase component as an I axis and an orthogonal component as a Q axis; 2. The method according to claim 1, further comprising a step between a quadrature quasi-synchronous detector and the detector.
Or a demodulation device provided with the quadrature and amplitude error compensation circuit according to 2.