JP3595478B2

JP3595478B2 - Frequency deviation detector and frequency deviation detection method

Info

Publication number: JP3595478B2
Application number: JP36130199A
Authority: JP
Inventors: 岳彦小林
Original assignee: Hitachi Kokusai Electric Inc
Current assignee: Hitachi Kokusai Electric Inc
Priority date: 1999-12-20
Filing date: 1999-12-20
Publication date: 2004-12-02
Anticipated expiration: 2019-12-20
Also published as: JP2001177592A

Description

【０００１】
【発明の属する技術分野】
本発明は、ディジタル無線機などにおいて、受信したディジタル変調信号を復調するときに使用する再生搬送波信号の周波数を、送信側の搬送波周波数と一致させるために使用する搬送波周波数の偏差を検出する周波数偏差検出器および周波数偏差検出方法に関するものである。
【０００２】
【従来の技術】
情報の通信において、例えば、音声、映像、データなどの情報信号を伝送する場合、伝送したい情報信号で所要周波数の搬送波信号を変調し、変調された搬送波を送信し、送信されてきた変調搬送波を受信し、受信した変調搬送波信号の周波数と同一周波数の搬送波信号で変調搬送波信号を復調し、伝送されてきた情報信号を取り出していることは周知のことであり、アナログ通信、ディジタル通信いずれにおいても同様に行なわれている。
このような受信した変調搬送波信号の復調において、特に、ディジタル通信の場合は、受信した変調搬送波信号の搬送波周波数を忠実に再生して復調に使用する必要があるため、自動周波数制御（ＡＦＣ：ＡｕｔｏｍａｔｉｃＦｒｅｑｕｎｃｙＣｏｎｔｒｏｌ）の技術が重要なものとなる。
この変調搬送波信号の復調において重要な自動周波数制御について、図３および図４を使用して従来技術を説明する。
図３は、送信信号として送信されてきた所要周波数の変調搬送波を受信した受信信号から、ベースバンド信号（等価低域信号）の成分を抽出する復調部の構成の一般的な例を示したブロック図である。
【０００３】
図３において、３１は、受信した所要周波数の変調搬送波信号の信号入力端子、４７は、周波数偏差電圧で発振周波数を制御された再生搬送波信号を出力する電圧制御発振器（ＶＣＯ）、３２は、所要周波数の変調搬送波信号を再生搬送波信号により同期検波しベースバンド信号のＩ成分（同相成分）信号とＱ成分（直交成分）信号とを出力する同期検波器、３３および３４は、同期検波器３２で同期検波されたベースバンド信号のＩ成分信号とＱ成分信号それぞれの雑音などを除去する低域通過フィルタ（ＬＰＦ）、３５および３６は、雑音などを除去したベースバンド信号のＩ成分信号とＱ成分信号それぞれをディジタル信号化するＡ／Ｄ変換器、３７および３８はディジタル信号化されたベースバンド信号のＩ成分信号とＱ成分信号それぞれの不要成分除去と波形整形を行なう受信フィルタ、３９および４０は、不要成分除去と波形整形を行なったベースバンド信号のＩ成分信号とＱ成分信号それぞれのシンボル識別点を抽出するサンプラ、４１は、ベースバンド信号のＩ成分信号から抽出したシンボル識別点の出力端子、４２は、ベースバンド信号のＱ成分信号から抽出したシンボル識別点の出力端子、４３は、抽出したＩ成分信号とＱ成分信号の抽出したシンボル識別点から搬送波の周波数と電圧制御発振器４７で再生する発振周波数との周波数偏差信号を検出する周波数偏差検出器、４４は、周波数偏差検出器４３で検出した周波数偏差信号に所要の係数を乗算する乗算器、４５は、所要の係数を乗算した周波数偏差信号が持つ不要変動成分を除去するループフィルタ、４６は、不要変動成分を除去した周波数偏差信号を積分し周波数偏差電圧とする積分器を示す。
【０００４】
つぎに、図３に示す従来技術の復調部の動作を説明する。
受信した搬送波周波数ｆｃの受信信号は、受信信号入力端子３１を介して同期検波器３２に入力される。
同期検波器３２は、受信信号入力端子３１を介して入力された搬送波周波数ｆｃの受信信号を、別途、電圧制御発振器４７から入力される再生搬送波周波数ｆｃ’の再生搬送波信号５４を基準として、ベースバンドの複素信号のＩ成分（同相成分）信号とＱ成分（直交成分）信号とを同期検波し、同期検波したＩ成分信号４８ａとＱ成分信号４９ａとを、それぞれ低域通過フィルタ３３と低域通過フィルタ３４とへ出力する。
低域通過フィルタ３３と低域通過フィルタ３４とは、同期検波器３２からそれぞれに入力されるベースバンドの複素信号のＩ成分信号４８ａとＱ成分信号４９ａとから高調波成分、雑音等の不要成分を除去し、不要成分を除去したＩ成分信号４８ｂとＱ成分信号４９ｂとを、それぞれＡ／Ｄ変換器３５とＡ／Ｄ変換器３６とへ出力する。
【０００５】
Ａ／Ｄ変換器３５とＡ／Ｄ変換器３６とは、低域通過フィルタ３３と低域通過フィルタ３４とからそれぞれに入力される不要成分を除去したベースバンドの複素信号のＩ成分信号４８ｂとＱ成分信号４９ｂとを、ディジタル信号に変換し、ディジタル信号化されたＩ成分信号４８ｃとＱ成分信号４９ｃとをそれぞれ受信フィルタ３７と受信フィルタ３８とへ出力する。
受信フィルタ３７と受信フィルタ３８とは、Ａ／Ｄ変換器３５とＡ／Ｄ変換器３６とからそれぞれに入力されるディジタル信号化されたベースバンドの複素信号のＩ成分信号４８ｃとＱ成分信号４９ｃとから不要成分を除去するとともに波形整形を行ない、不要成分除去と波形整形をされたディジタル信号のＩ成分信号４８ｄとＱ成分信号４９ｄとを、それぞれサンプラ３９とサンプラ４０とへ出力する。
サンプラ３９とサンプラ４０とは、受信フィルタ３７と受信フィルタ３８とからそれぞれに入力される不要成分除去と波形整形をされたディジタル信号のベースバンドの複素信号のＩ成分信号４８ｄとＱ成分信号４９ｄとからシンボル識別点を抽出し、抽出したＩ成分信号４８ｅとＱ成分信号４９ｅとのシンボル識別点を、それぞれ周波数偏差検出器４３へ出力するとともに、Ｉ成分信号出力端子４１とＱ成分信号出力端子４２とを介して他の回路へ出力する。
【０００６】
周波数偏差検出器４３は、サンプラ３９とサンプラ４０とから入力されたベースバンドの複素信号のＩ成分信号４８ｄとＱ成分信号４９ｄとのシンボル識別点から、受信信号の搬送波周波数ｆｃと電圧制御発振器４７で再生する搬送波信号の周波数ｆｃ’との周波数偏差Δｆの信号を検出し、検出した周波数偏差Δｆの信号５０を乗算器４４へ出力する。
乗算器４４は、周波数偏差検出器４３から入力された周波数偏差信号５０に、別途、入力された係数ｂ（負の定数）を乗算し、係数ｂを乗算した周波数偏差信号５１をループフィルタ４５へ出力する。
ループフィルタ４５は、乗算器４４から入力された係数ｂを乗算した周波数偏差信号５１の受信信号となった段階で混入している雑音に起因する変動成分などを除去し、変動成分などを除去した係数ｂを乗算した周波数偏差信号５２を積分器４６へ出力する。
積分器４６は、ループフィルタ４５から入力された不要な変動成分などを除去し係数ｂを乗算した周波数偏差信号５２を積分して周波数偏差電圧５３とし、積分して得た周波数偏差電圧５３を電圧制御発振器４７へ出力する。
電圧制御発振器４７は、積分器４６から入力された周波数偏差電圧５３により発振周波数をを制御され、周波数偏差電圧５３により制御された再生搬送波周波数ｆｃ’の再生搬送波信号５４を同期検波器３２へ出力する。
【０００７】
さらに、受信信号入力端子３１に入力された搬送波周波数ｆｃの受信信号が、ＱＰＳＫ変調（ＱｕａｄｒａｔｕｒｅＰｈａｓｅＳｈｉｆｔＫｅｙｉｎｇ：直交位相変調）されている場合を例に、図４を使用して、受信した変調搬送波信号の周波数と電圧制御発振器で発振した再生搬送波信号との間に周波数偏差Δｆが発生したときの影響について説明をする。
図４は、送信、あるいは、受信された信号の配置を示した図であり、５５はＩ成分（同相成分）軸、５６はＱ成分（直交成分）軸を示している。
ＱＰＳＫ変調の場合、伝送される情報に対応して、符号５７ａ〜５７ｄで示す信号のいずれかが、シンボル送信周期Ｔｓの間隔で送信される。
このようなＱＰＳＫ変調信号の送信側の配置に対して、図３に示す変調部のＩ成分出力端子４１およびＱ成分出力端子４２でＩ成分信号およびＱ成分信号を観測したとき、理想的な伝送や復調が行なわれたとすると、周波数偏差Δｆが０であれば、送信シンボルと同様の受信シンボルが現れ、正しい復号を行なうことが可能となる。
ところが、周波数偏差Δｆが発生して、周波数偏差Δｆがある程度の値を持つと、×印で示されるように周波数偏差Δｆの値に応じて位相の回転が発生し、図４における判定境界であるＩ成分軸５５、あるいは、Ｑ成分軸５６を越えてしまい復号誤りの原因となる。
【０００８】
このような周波数偏差Δｆの発生による復号誤りを防止するため、周波数偏差Δｆを検出し、電圧制御発振器４７の発振周波数ｆｃ’を制御する自動周波数制御回路が十分に機能する必要がある。
この自動周波数制御回路を構成する重要な要素の一つが周波数偏差検出器であり、様々な手段が提案されているが、その中で時刻の異なる複数の信号の位相差を求めて周波数偏差を得る手段は、比較的簡便で基本的な手段である。
以下に、その原理を説明する。
図５（ａ）は、シンボル間隔Ｔｓ（単位：秒）の伝送されてきた受信信号系列を示す。
この受信信号系列の中で、ｎ番目のシンボルＰ_ｎおよびｎ＋ｋ番目のシンボルＰ_ｎ＋ｋは既知の同一符号の信号が送信されているものと仮定する。
なお、この仮定は、二つの符号が異なる符号の場合でも、簡単な演算によって位相を回転することにより、一般性を失うことなく成立する。
このとき、受信信号に含まれる雑音成分が十分に小さく、伝搬路特性の時間変動が十分に緩やかであれば、図５（ｂ）に示す２つの信号点Ｐ_ｎおよびＰ_ｎ＋ｋの位相差Δθ（ラジアン）は周波数偏差Δｆ（ヘルツ）に起因し、下記（１）式で表わすことができる関係にある。
Δθ＝２π・Δｆ・ｋＴｓ・・・・・（１）
したがって、Δθを求めることによって、下記（２）式から周波数偏差Δｆを求めることができる。
【数１】

【０００９】
以上述べた原理にもとづく、従来技術による周波数偏差検出器のブロック図を図６に示す。
図６において、６１は受信信号Ｐ_ｎ＋ｋの入力端子、６２は受信信号Ｐ_ｎの入力端子、６３は、受信信号Ｐ_ｎの共役演算を行なう共役演算器、６４は、受信信号Ｐ_ｎの共役演算信号と受信信号Ｐ_ｎ＋ｋとの複素積を演算する複素乗算器、６５は、複素積信号について位相信号を演算する位相演算器、６６は、位相信号と係数との乗算をする乗算器、６７は周波数偏差信号の出力端子を示す。
【００１０】
図６に示す従来技術による周波数偏差検出器の動作を説明する。
時刻ｎにおいて、受信信号Ｐ_ｎは受信信号入力端子６２を介して共役演算器６３に入力され、時刻ｎ＋ｋにおいて、受信信号Ｐ_ｎ＋ｋは受信信号入力端子６１を介して複素乗算器６４に入力される。
共役演算器６３は、受信信号入力端子６２を介して入力された受信信号Ｐ_ｎの共役演算を行ない、算出した共役演算信号を複素乗算器６４へ出力する。
複素乗算器６４は、共役演算器６３から入力された共役演算信号と、受信信号入力端子６１から入力された受信信号Ｐ_ｎ＋ｋとで複素積を演算し、算出した複素積信号を位相演算器６５へ出力する。
位相演算器６５は、複素乗算器６４から入力された複素積信号について位相を演算し、算出した位相信号を乗算器６６へ出力する。
この位相演算器６５で算出した位相は、受信信号Ｐ_ｎ＋ｋと受信信号Ｐ_ｎとの位相差Δθとなる位相差信号である。
乗算器６６は、位相演算器６５から入力された位相差Δθ（ラジアン）の位相差信号に、別途、入力された係数（２πｋＴｓ）￣^１を乗算して周波数偏差Δｆ（ヘルツ）の周波数偏差信号を算出し、算出した周波数偏差信号を周波数偏差信号出力端子６７から他の回路へ出力する。
【００１１】
ところで、図６に示す周波数偏差検出器では、二つの受信信号の間隔であるｋは、検出可能な最大周波数偏差を制限するパラメータとなると同時に、雑音などによる位相差Δθへの誤差の影響を左右する。
この点について、以下に説明する。
周波数偏差検出器で演算される位相差Δθは、通常、−π≦Δθ＜π（ラジアン）の範囲にあることから、図５（ｂ）の符号７１で示した軌跡の他にも、例えば符号７２で示した軌跡のように一周以上回転した位相や、符号７３で示した軌跡のように逆回転した位相も同様に演算され、これらを個別に識別することはできない。
これらの場合の正しい位相は、下記（３）式、（４）式で表すことができ、
ΔΘ＝Δθ＋２π ・・・・・（３）
ΔΘ＝Δθ−２π ・・・・・（４）
一般的には、下記（５）式となる。
ΔΘ＝Δθ＋２ｑπ ・・・・・（５）
但し、ｑは任意の整数
【００１２】
このような不確定要素を排除するためには、真の位相回転量が−π≦ΔΘ＜π（ラジアン）を超えないことが条件となる。
このためには、周波数偏差Δｆが、下記（６）式に示す範囲内にあることが必要であり、下記（６）式に示す値が検出可能な周波数偏差の最大値となる。
【数２】

換言すると、より大きな周波数偏差Δｆを検出しようとする場合、２つのシンボルの間隔ｋを小さくする必要があるということになる。
一方、演算された位相差信号Δθには誤差が含まれており、２つのシンボルの間隔ｋを小さくすると誤差の影響を受け易くなる。
すなわち、位相差信号Δθは、位相差Δθの真の値を位相差Δθ’、誤差をεとすると、下記（７）式となる。
Δθ＝Δθ’＋ε ・・・・・（７）
したがって周波数偏差Δｆの値は、周波数偏差Δｆの真の値を周波数偏差Δｆ’とすると、下記（８）式となる。
【数３】

つまり、２シンボルの間隔ｋを大きくとれば、雑音などによる演算誤差を小さくすることができる。
上述したように、従来技術による周波数偏差検出器は、検出対象とする周波数偏差の最大値と、要求される測定精度とは二律背反の関係にあり、どちらを重視するかによって適切にｋを設定する必要がある。
【００１３】
【発明が解決しようとする課題】
ディジタル通信機の復調部に使用する周波数偏差検出器であって、異なる時刻に入力された複数の受信信号の位相差から周波数偏差を検出する従来技術の周波数偏差検出器は、２ｑπラジアン（ｑ＝−ｚ〜＋ｚ、ただしｚは自然数）回転した位相を持つ受信信号の位相差から周波数偏差を検出したことを識別することはできないため、周波数偏差を検出する受信信号の位相差の範囲が制限される。
周波数偏差の検出範囲を拡大するためには、位相差を求める複数の受信信号の時間間隔を小さくすれば良いが、位相差を求めるときに雑音等による誤差の影響を受けてしまうことになる。
より大きな周波数偏差を検出するための条件と、雑音等の影響を小さくするための条件とが原理的に相反するという関係にあり、広い周波数範囲で高い精度の周波数偏差の検出を実現することが困難であった。
本発明は、前記問題を解決し、広い周波数範囲で高い精度の周波数偏差の検出を実現した周波数偏差検出器および周波数偏差検出方法を提供することを目的とする。
【００１４】
【課題を解決するための手段】
前記目的を達成するため、本発明の周波数偏差検出器は、受信信号が入力される受信機の周波数偏差検出器であって、異なる時刻に受信された複数の受信信号を入力し、異なる複数の時間間隔の位相差信号をそれぞれ求める複数の位相差算出手段と、該位相差算出手段が算出した位相差信号の中で、最も長い時間間隔の位相差信号に、ｑ＝−ｚ〜＋ｚであってｚが自然数からなる２ｑπラジアンをそれぞれ加算して得た周波数偏差候補を求める周波数偏差候補算出手段と、前記位相差算出手段が算出した位相差信号の中で、最も短い時間間隔の位相差信号から周波数偏差情報を求める周波数偏差情報算出手段とを備え、前記周波数偏差候補列の中から、前記周波数偏差情報に最も近い値の周波数偏差候補の周波数偏差値を、周波数偏差信号として出力するものである。
【００１５】
また、本発明の周波数偏差検出器は、異なる時刻に受信された複数のディジタル受信信号の所定のシンボル信号間の位相差信号を求める第１の手段と、前記異なる時刻より時間間隔が長い異なる時刻に受信された複数のディジタル受信信号の所定のシンボル信号間の位相差信号を求める第２の手段と、該第２の手段から入力された位相差信号に、所定の係数を乗算して１つの周波数偏差信号の候補を求める第３の手段と、前記第２の手段から入力された位相差信号に、ｑ＝−ｚ〜＋ｚであってｚが自然数からなる２ｑπラジアンの位相信号を加算し、さらに、所定の係数を乗算して複数の周波数偏差信号の候補を求める第４の手段と、前記第１の手段から入力された位相差信号に、所定の係数を乗算して周波数偏差信号を求める第５の手段と、前記第３および第４の手段から入力される複数の周波数偏差信号の候補の中から、前記第５の手段から入力される周波数偏差信号に最も周波数偏差が近い周波数偏差信号を選択し出力する比較選択手段とを有し、複数の周波数偏差信号の候補の中から最も周波数偏差が近い周波数偏差信号をより正確な周波数偏差信号として出力するものである。
さらに詳しくは、本発明の周波数偏差検出器は、第１の手段と第２の手段とが、時間間隔が異なる時刻に受信された二組のディジタル受信信号の所定のシンボル信号を同一の所定のシンボル信号に設定し、３つの所定のシンボル信号を使用して位相差信号を求めるものである。
また、本発明の周波数偏差検出器は、第１の手段と第２の手段とが、時間間隔が異なる時刻に受信された二組のディジタル受信信号の一つの組のフレーム内に挿入された２つの所定のシンボル信号と、つぎの組のフレーム内に挿入された１つの所定のシンボル信号とを使用して位相差信号を求めるものである。
【００１６】
また、本発明の周波数偏差検出方法は、異なる時刻に受信された複数の受信信号を入力し、異なる複数の時間間隔の位相差信号をそれぞれ求め、最も長い時間間隔で求めた位相差信号に、ｑ＝−ｚ〜＋ｚであってｚが自然数からなる２ｑπラジアンを加算した周波数偏差候補列を求め、最も短い時間間隔の位相差信号から周波数偏差情報を求め、前記周波数偏差候補列の中から、前記周波数偏差情報に最も近い値の周波数偏差候補の周波数偏差値を、周波数偏信号として出力する方法である。
また、本発明の周波数偏差検出方法は、異なる時刻に受信された複数のディジタル受信信号の時間間隔が異なる二組の所定のシンボル信号間の位相差信号を求め、時間間隔が長い一組から求めた位相差信号にｑ＝−ｚ〜＋ｚであってｚが自然数からなる２ｑπラジアンの位相信号を加算し、さらに、所定の係数を乗算して複数の周波数偏差信号の候補を求め、前記時間間隔が長い一組から求めた位相差信号に所定の係数を乗算して１つの周波数偏差信号の候補を求め、時間間隔が短い一組から求めた位相差信号に所定の係数を乗算して１つの周波数偏差信号を求め、前記時間間隔が長い一組から求めた１つのおよび複数の周波数偏差信号の候補の中から、前記時間間隔が短い一組から求めた周波数偏差信号に最も周波数偏差が近い周波数偏差信号を選択し、より正確な周波数偏差信号として出力する方法である。
【００１７】
【発明の実施の形態】
本発明による周波数偏差検出器および周波数偏差検出方法の実施形態の一例を説明する。
図１は、本発明による周波数偏差検出器の一実施例を示すブロック図である。図１において、１は受信信号Ｐ_ｎの入力端子、２は受信信号Ｐ_ｎ＋ｍの入力端子、３は受信信号Ｐ_ｎ＋ｋの入力端子、７は、受信信号Ｐ_ｎの共役演算を行なう共役演算器、５は、受信信号Ｐ_ｎの共役演算信号と受信信号Ｐ_ｎ＋ｍとの複素積を演算する複素乗算器、６は、受信信号Ｐ_ｎの共役演算を行なう共役演算器、４は、受信信号Ｐ_ｎの共役演算信号と受信信号Ｐ_ｎ＋ｋとの複素積を演算する複素乗算器、９は、複素乗算器５から入力される複素積信号について位相信号を演算する位相演算器、１２は、位相演算器９から入力される位相信号と、別途、入力される係数との乗算を行なう乗算器、８は、複素乗算器４から入力される複素積信号について位相信号を演算する位相演算器、１０_−ｈ（ｈ＝１、２、・・・２ｓ）は、位相演算器８から入力される位相信号に、別途、入力される位相信号の加算を行なう加算器、１１_−０は、位相演算器８から入力される位相信号と、別途、入力される係数との乗算を行なう乗算器、１１_−ｈ（ｈ＝１、２、・・・２ｓ）は、複数の加算器１０_−ｈから入力される位相信号に、別途、入力される係数との乗算を行なう複数の乗算器、１３は、複数の入力端子に入力される位相差信号を比較選択し周波数偏差信号を出力する比較選択器、１４は周波数偏差信号出力端子を示す。
【００１８】
つぎに、本発明による周波数偏差検出器の動作を説明する。
受信信号入力端子１には時刻ｎの受信信号Ｐ_ｎが、受信信号入力端子２には時刻ｎ＋ｍの受信信号Ｐ_ｎ＋ｍが、受信信号入力端子３には時刻ｎ＋ｋの受信信号Ｐ_ｎ＋ｋが入力される。なお、ｍ＜ｋであり、さらに、いずれも同一のシンボルの信号が伝送されてくるものとする。
時刻ｎにおいて、受信信号Ｐ_ｎは、受信信号入力端子１を介して共役演算器７と共役演算器６とに入力される。
時刻ｎ＋ｍにおいて、受信信号Ｐ_ｎ＋ｍは、受信信号入力端子２を介して複素乗算器５に入力され、時刻ｎ＋ｋにおいて、受信信号Ｐ_ｎ＋ｋは、受信信号入力端子３を介して複素乗算器４に入力される。
【００１９】
共役演算器７は、受信信号入力端子１を介して入力された受信信号Ｐ_ｎの共役演算を行ない、算出された共役演算信号７ａを複素乗算器５へ出力する。
複素乗算器５は、共役演算器７から入力された共役演算信号７ａと、受信信号入力端子２から入力された受信信号Ｐ_ｎ＋ｍとで複素積を演算し、算出した複素積信号５ａを位相演算器９へ出力する。
位相演算器９は、複素乗算器５から入力された複素積信号５ａについて位相を演算し、算出した位相信号９ａを乗算器１２へ出力する。
すなわち、位相演算器９から出力された位相信号９ａは、受信信号Ｐ_ｎと受信信号Ｐ_ｎ＋ｍとの位相差信号である。
【００２０】
同様に、共役演算器６は、受信信号入力端子１を介して入力された受信信号Ｐ_ｎの共役演算を行ない、算出された共役演算信号６ａを複素乗算器４へ出力する。
複素乗算器４は、共役演算器６から入力された共役演算信号６ａと、受信信号入力端子３から入力された受信信号Ｐ_ｎ＋ｋとで複素積を演算し、算出した複素積信号４ａを位相演算器８へ出力する。
位相演算器８は、複素乗算器４から入力された複素積信号４ａについて位相を演算し、算出した位相信号８ａを複数の乗算器１１_−ｈの中の一つの乗算器１１_−０と複数の加算器１０_−ｈの各加算器とへ出力する。
すなわち、位相演算器８から出力された位相信号８ａは、受信信号Ｐ_ｎと受信信号Ｐ_ｎ＋ｋとの位相差信号である。
【００２１】
乗算器１１_−０は、位相演算器８から入力された位相信号８ａ（ラジアン）に、別途、入力される値（２πｋＴｓ）￣^１の係数信号を乗算し、値（２πｋＴｓ）￣^１の係数信号を乗算した位相信号１１_−０ａ（ラジアン）を、複数の入力端子を備えた比較選択器１３のＡ（０）端子へ出力する。
この比較選択器１３のＡ（０）端子に入力された位相信号１１_−０ａは、位相演算器８から出力される位相信号が、受信信号Ｐ_ｎ＋ｋと受信信号Ｐ_ｎとの真の位相差に等しい場合の周波数偏差の候補値である。
また、複数の加算器１０_−ｈの中の一つの加算器１０_−１は、位相演算器８から入力された位相信号８ａに、別途、入力された値＋２πの位相信号を加算し、値＋２πを加算した位相信号１０_−１ａを複数の乗算器１１_−ｈの中の一つの乗算器１１_−１へ出力する。
乗算器１１_−１は、加算器１０_−１から入力された値＋２πを加算した位相信号１０_−１ａ（ラジアン）に、別途、入力された値（２πｋＴｓ）￣^１の係数信号を乗算し、値（２πｋＴｓ）￣^１の係数信号を乗算した位相信号１１_−１ａ（ラジアン）を比較選択器１３のＡ（１）端子へ出力する。
この比較選択器１３のＡ（１）端子に入力された位相信号１１_−１ａは、位相演算器８から出力される位相信号に値＋２πの位相信号を加えた位相信号が、受信信号Ｐ_ｎ＋ｋと受信信号Ｐ_ｎとの真の位相差に等しい場合の周波数偏差の候補値である。
【００２２】
以下、同様の演算を他の加算器１０と他の乗算器１１とで行なって比較選択器１３の各端子に位相信号を入力していき、最後に、位相演算器８から出力された位相信号に加算器１０_−２ｓにおいて値−２ｓπの位相信号を加算した後、乗算器１１_−２ｓにおいて、値（２πｋＴｓ）￣^１の係数信号を乗算し、比較選択器１３のＡ（２ｓ）端子に入力される。
この比較選択器１３のＡ（２ｓ）端子に入力された位相信号１１_−２ｓａは、位相演算器８から出力された位相信号に値−２ｓπの位相信号を加えた位相信号が、受信信号Ｐ_ｎ＋ｋと受信信号Ｐ_ｎとの真の位相差に等しい場合の周波数偏差の候補値である。
一方、乗算器１２は、位相演算器９から入力された位相信号９ａ（ラジアン）に、別途、入力された値（２πｍＴｓ）￣^１の係数信号を乗算し、値（２πｍＴｓ）￣^１の係数信号を乗算した位相信号１２ａ（ラジアン）を比較選択器１３のＢ端子へ出力する。
比較選択器１３は、（２ｓ＋１）個のＡ端子入力値の中から、最もＢ端子入力値に近い値の信号を選択し、選択した信号をＣ端子から出力する。
比較選択器１３のＣ端子から出力された信号は、選択された周波数偏差信号として周波数偏差信号出力端子１４から他の回路へ出力される。
なお、図１に示した実施例では、２ｑπラジアン（ｑ＝−ｚ〜＋ｚ、ただしｚは自然数）の位相信号を加算する時間間隔は１組で説明したが、複数でも良い。
【００２３】
つぎに、図２を使用して、図１に示した周波数偏差検出器の実施例における具体的な動作を説明する。
図２（ａ）は、周波数偏差検出器に使用される信号のフレーム構成の一例で、シンボル速度は１６ｋシンボル／ｓｅｃ、すなわち、Ｔｓ＝６２．５μｓｅｃとし、１フレームの長さを１２８シンボルとしている。
このようなフレーム構成の伝送フレーム内には、通常、同期確立を目的とした固定シンボル系列が挿入されており、この固定シンボル系列を既知シンボルとして使用する。
フレーム構成の最初の１フレームに示すＰ_ｎ、Ｐ_ｎ＋８、および、つぎの１フレーム内のＰ_{ｎ＋１２８} （最初の１フレームに示すＰ_ｎから、１フレームの長さである１２８シンボルの位置にある）が、固定シンボル系列に相当する。
図２（ｂ）は、Ｐ_ｎおよびＰ_{ｎ＋１２８} から演算により得られる周波数偏差列を示しており、符号１００は周波数偏差軸を表し、符号１０１_−０はＰ_ｎおよびＰ_{ｎ＋１２８} ２つの信号の位相差から直接算出される周波数偏差を表している（周波数偏差が０であれば周波数偏差軸１００上の０Ｈｚの位置となる）。
また、周波数偏差１０１_−０の他にも、周波数偏差１０１_−０の左右に、１２５Ｈｚ間隔で周波数偏差の候補値１０１_−ｈ（ｈ＝１、２、・・・１６）が存在しており、これらの周波数偏差の候補値１０１_−０、１０１_−ｈが比較選択器１３の各端子Ａの入力信号となる。
【００２４】
図２（ｃ）は、１フレームの中の固定シンボル系列Ｐ_ｎおよびＰ_ｎ＋８から演算により得られる周波数偏差を示しており、符号１０２は周波数偏差軸を表し、符号１０３はＰ_ｎおよびＰ_ｎ＋８の２つの信号の位相差から算出される周波数偏差を表している（周波数偏差が０であれば周波数偏差軸１０２上の０Ｈｚの位置となる）。
この周波数偏差の値は、±１０００Ｈｚの中でただ一つ確定されるが、雑音等の影響による誤差を含んでいる。
この周波数偏差の値１２ａが比較選択器１３の端子Ｂの入力信号となる。
比較選択器１３は、各端子Ａに入力された周波数偏差の値１１ａの中から端子Ｂに入力された周波数偏差１０３に最も近い周波数偏差１０１_−８を選択し、端子ｃから出力し、周波数偏差信号出力端子１４から他の回路へ出力される。
上述した例においては、精度を損なうことなく、最大周波数偏差の制限値が±６２．５Ｈｚから±１０００Ｈｚに緩和されたことになる。
【００２５】
【発明の効果】
本発明によれば、広い周波数範囲で高い精度の周波数偏差の検出を実現した周波数偏差検出器および周波数偏差検出方法を提供することができる。
【図面の簡単な説明】
【図１】本発明による周波数偏差検出器の一実施例を示すブロック図。
【図２】図１記載の実施例の具体的な動作の説明図。
【図３】ディジタル無線機の復調部の構成を示すブロック図。
【図４】周波数偏差の影響の説明図。
【図５】従来技術による周波数偏差検出の原理の説明図。
【図６】従来技術による周波数偏差検出器の構成を示すブロック図。
【符号の説明】
１、２、３、３１、６１、６２受信信号入力端子、
４、５、６４複素乗算器、
６、７、６３共役演算器、
８、９、６５位相演算器、
１０加算器、
１１、１２、６６、４４乗算器、
１３比較選択器、
１４、６７周波数偏差信号出力端子、
３２同期検波器、
３３、３４低域通過フィルタ、
３５、３６Ａ／Ｄ変換器、
３７、３８受信フィルタ、
３９、４０サンプラ、
４１同相成分出力端子、
４２直交成分出力端子、
４３周波数偏差検出器、
４５ループフィルタ、
４６積分器、
４７電圧制御発振器。[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a frequency deviation for detecting a deviation of a carrier frequency used for matching a frequency of a reproduced carrier signal used for demodulating a received digital modulation signal with a carrier frequency of a transmission side in a digital radio or the like. The present invention relates to a detector and a frequency deviation detection method.
[0002]
[Prior art]
In the communication of information, for example, when transmitting an information signal such as audio, video, data, etc., modulate a carrier signal of a required frequency with the information signal to be transmitted, transmit the modulated carrier, and transmit the transmitted modulated carrier. It is well known that receiving and demodulating a modulated carrier signal with a carrier signal having the same frequency as the frequency of the received modulated carrier signal and extracting the transmitted information signal are common in analog communication and digital communication. The same is done.
In the demodulation of the received modulated carrier signal, especially in the case of digital communication, the carrier frequency of the received modulated carrier signal must be faithfully reproduced and used for demodulation, so that automatic frequency control (AFC: Automatic) is performed. Frequency Control technology becomes important.
The prior art will be described with reference to FIGS. 3 and 4 regarding automatic frequency control which is important in demodulation of the modulated carrier signal.
FIG. 3 is a block diagram illustrating a general example of a configuration of a demodulation unit that extracts a component of a baseband signal (equivalent low-frequency signal) from a reception signal that has received a modulated carrier having a required frequency transmitted as a transmission signal. FIG.
[0003]
In FIG. 3, reference numeral 31 denotes a signal input terminal of a received modulated carrier signal having a required frequency; 47, a voltage-controlled oscillator (VCO) that outputs a reproduced carrier signal whose oscillation frequency is controlled by a frequency deviation voltage;

Synchronous detectors

33 and 34 for synchronously detecting the modulated carrier signal of the frequency with the reproduced carrier signal and outputting an I component (in-phase component) signal and a Q component (quadrature component) signal of the baseband signal. Low-pass filters (LPFs) 35 and 36 for removing noise and the like of the I component signal and the Q component signal of the baseband signal subjected to the synchronous detection, respectively, are an I component signal and a Q component of the baseband signal from which noise and the like have been removed. A /

D converters

37 and 38 for converting each of the signals into digital signals are provided as I- and Q-component signals of the baseband signal which has been converted into digital signals. Receive

filters

39 and 40 for removing unnecessary components and waveform shaping,

samplers

41 and 41 for extracting symbol identification points of the I component signal and the Q component signal of the baseband signal subjected to unnecessary component removal and waveform shaping, respectively. Is the output terminal of the symbol identification point extracted from the I component signal of the baseband signal, 42 is the output terminal of the symbol identification point extracted from the Q component signal of the baseband signal, 43 is the extracted I component signal and Q component A frequency deviation detector 44 detects a frequency deviation signal between the carrier frequency and the oscillation frequency reproduced by the voltage controlled oscillator 47 from the symbol identification point from which the signal is extracted. 45 is a loop filter for removing unnecessary fluctuation components of the frequency deviation signal multiplied by a required coefficient 46 shows an integrator for the integration frequency deviation voltage frequency deviation signal obtained by removing an unnecessary fluctuation component.
[0004]
Next, the operation of the conventional demodulation unit shown in FIG. 3 will be described.
The received reception signal of the carrier frequency fc is input to the synchronous detector 32 via the reception signal input terminal 31.
The synchronous detector 32 converts the reception signal of the carrier frequency fc input via the reception signal input terminal 31 into a base signal with reference to the reproduction carrier signal 54 of the reproduction carrier frequency fc ′ separately input from the voltage controlled oscillator 47. The I component (in-phase component) signal and the Q component (quadrature component) signal of the complex signal of the band are synchronously detected, and the synchronously detected I component signal 48a and Q component signal 49a are respectively converted to a low-pass filter 33 and a low-pass filter. Output to the pass filter 34.
The low-pass filter 33 and the low-pass filter 34 convert unnecessary components such as harmonic components and noise from the I-component signal 48a and the Q-component signal 49a of the baseband complex signal input from the synchronous detector 32, respectively. And the I component signal 48b and the Q component signal 49b from which the unnecessary components have been removed are output to the A / D converter 35 and the A / D converter 36, respectively.
[0005]
The A / D converter 35 and the A / D converter 36 are provided with an I component signal 48b of a baseband complex signal from which unnecessary components input from the low-pass filter 33 and the low-pass filter 34 have been removed, respectively. The Q component signal 49b is converted into a digital signal, and the digitalized I component signal 48c and the Q component signal 49c are output to the

reception filters

37 and 38, respectively.
The reception filter 37 and the reception filter 38 include an I component signal 48c and a Q component signal 49c of a baseband complex signal converted into a digital signal, which are input from the A / D converter 35 and the A / D converter 36, respectively. Then, an unnecessary component is removed from the signal and the waveform is shaped, and the I component signal 48d and the Q component signal 49d of the digital signal subjected to the unnecessary component removal and the waveform shaping are output to the sampler 39 and the sampler 40, respectively.
The sampler 39 and the sampler 40 include an I-component signal 48d and a Q-component signal 49d of a baseband complex signal of a digital signal whose unnecessary components have been removed and waveform-shaped, respectively input from the reception filter 37 and the reception filter 38. The symbol identification points of the extracted I component signal 48e and Q component signal 49e are output to the frequency deviation detector 43, respectively, and the I component signal output terminal 41 and the Q component signal output terminal 42 And outputs it to other circuits.
[0006]
The frequency deviation detector 43 calculates the carrier frequency fc of the received signal and the voltage-controlled oscillator 47 from the symbol identification point of the I-component signal 48d and the Q-component signal 49d of the baseband complex signal input from the sampler 39 and the sampler 40. A signal having a frequency deviation Δf from the frequency fc ′ of the carrier signal to be reproduced is detected, and a signal 50 having the detected frequency deviation Δf is output to the multiplier 44.
The multiplier 44 multiplies the frequency deviation signal 50 input from the frequency deviation detector 43 by a separately input coefficient b (negative constant), and outputs a frequency deviation signal 51 multiplied by the coefficient b to the loop filter 45. Output.
The loop filter 45 removes a fluctuation component or the like caused by noise mixed in at the stage when the frequency deviation signal 51 obtained by multiplying the coefficient b input from the multiplier 44 becomes a reception signal, and removes a fluctuation component and the like. The frequency deviation signal 52 multiplied by the coefficient b is output to the integrator 46.
The integrator 46 integrates the frequency deviation signal 52 obtained by removing unnecessary fluctuation components and the like input from the loop filter 45 and multiplying by the coefficient b to generate a frequency deviation voltage 53, and converts the integrated frequency deviation voltage 53 into a voltage. Output to the control oscillator 47.
The voltage-controlled oscillator 47 has an oscillation frequency controlled by the frequency deviation voltage 53 input from the integrator 46 and outputs a reproduced carrier signal 54 having a reproduced carrier frequency fc ′ controlled by the frequency deviation voltage 53 to the synchronous detector 32. I do.
[0007]
Further, FIG. 4 shows an example in which the received signal of carrier frequency fc input to received signal input terminal 31 is QPSK modulated (Quadrature Phase Shift Keying: quadrature phase modulation). The effect when a frequency deviation Δf occurs between the signal frequency and the reproduced carrier signal oscillated by the voltage controlled oscillator will be described.
FIG. 4 is a diagram showing an arrangement of transmitted or received signals, wherein 55 denotes an I component (in-phase component) axis and 56 denotes a Q component (quadrature component) axis.
In the case of QPSK modulation, one of the signals indicated by reference numerals 57a to 57d is transmitted at intervals of the symbol transmission period Ts, corresponding to the information to be transmitted.
For such an arrangement on the transmitting side of the QPSK modulated signal, ideal transmission is observed when the I component signal and the Q component signal are observed at the I component output terminal 41 and the Q component output terminal 42 of the modulator shown in FIG. If the frequency deviation Δf is 0, a received symbol similar to a transmitted symbol appears and correct decoding can be performed.
However, when the frequency deviation Δf occurs and the frequency deviation Δf has a certain value, a rotation of the phase occurs according to the value of the frequency deviation Δf as shown by the mark x, which is the determination boundary in FIG. It exceeds the I-component axis 55 or the Q-component axis 56, and causes a decoding error.
[0008]
In order to prevent a decoding error due to the occurrence of such a frequency deviation Δf, an automatic frequency control circuit that detects the frequency deviation Δf and controls the oscillation frequency fc ′ of the voltage controlled oscillator 47 needs to function sufficiently.
One of the important elements constituting this automatic frequency control circuit is a frequency deviation detector, and various means have been proposed. Among them, a frequency deviation is obtained by obtaining a phase difference between a plurality of signals at different times. The means are relatively simple and basic means.
The principle will be described below.
FIG. 5A shows a received signal sequence transmitted at a symbol interval Ts (unit: second).
In this received signal sequence, the n-th symbol P _n And the (n + k) th symbol P _{n + k} Assume that a signal of a known same code is being transmitted.
Note that this assumption holds even if the two codes are different without losing generality by rotating the phase by a simple operation.
At this time, if the noise component included in the received signal is sufficiently small and the time variation of the propagation path characteristic is sufficiently moderate, the two signal points P shown in FIG. _n And P _{n + k} (Θ) (radian) is caused by the frequency deviation Δf (Hertz) and has a relationship that can be expressed by the following equation (1).
Δθ = 2π · Δf · kTs (1)
Accordingly, by determining Δθ, the frequency deviation Δf can be determined from the following equation (2).
(Equation 1)

[0009]
FIG. 6 shows a block diagram of a frequency deviation detector according to the prior art based on the principle described above.
In FIG. 6, reference numeral 61 denotes a received signal P _{n + k} The input terminal 62 is a receiving signal P _n Input terminal 63 is the received signal P _n Conjugate operation unit for performing the conjugate operation of the received signal P _n And the received signal P _{n + k} A complex calculator for calculating a phase signal with respect to the complex product signal; 66, a multiplier for multiplying the phase signal by a coefficient; 67, an output terminal for a frequency deviation signal Is shown.
[0010]
The operation of the conventional frequency deviation detector shown in FIG. 6 will be described.
At time n, the received signal P _n Is input to the conjugate calculator 63 via the reception signal input terminal 62, and at time n + k, the reception signal P _{n + k} Is input to the complex multiplier 64 via the reception signal input terminal 61.
The conjugate operator 63 receives the received signal P input via the received signal input terminal 62. _n , And outputs the calculated conjugate operation signal to the complex multiplier 64.
The complex multiplier 64 receives the conjugate operation signal input from the conjugate operation unit 63 and the reception signal P input from the reception signal input terminal 61. _{n + k} , And outputs the calculated complex product signal to the phase calculator 65.
The phase calculator 65 calculates the phase of the complex product signal input from the complex multiplier 64 and outputs the calculated phase signal to the multiplier 66.
The phase calculated by the phase calculator 65 is the received signal P _{n + k} And received signal P _n Is a phase difference signal that is a phase difference Δθ from the above.
The multiplier 66 adds a separately input coefficient (2πkTs) ￣ to the phase difference signal of the phase difference Δθ (radian) input from the phase calculator 65. ¹ To calculate a frequency deviation signal of the frequency deviation Δf (Hertz), and outputs the calculated frequency deviation signal from the frequency deviation signal output terminal 67 to another circuit.
[0011]
By the way, in the frequency deviation detector shown in FIG. 6, k, which is the interval between two received signals, is a parameter that limits the maximum detectable frequency deviation, and at the same time, influences the influence of an error on the phase difference Δθ due to noise or the like. I do.
This will be described below.
Since the phase difference Δθ calculated by the frequency deviation detector is usually in the range of −π ≦ Δθ <π (radian), for example, in addition to the locus denoted by reference numeral 71 in FIG. The phase rotated one or more rounds like the trajectory indicated by reference numeral 72 and the phase rotated in the reverse direction like the trajectory indicated by reference numeral 73 are similarly calculated, and cannot be individually identified.
The correct phase in these cases can be expressed by the following equations (3) and (4).
ΔΘ = Δθ + 2π (3)
ΔΘ = Δθ-2π (4)
Generally, the following equation (5) is obtained.
ΔΘ = Δθ + 2qπ (5)
Where q is any integer
[0012]
In order to eliminate such uncertainties, it is required that the true phase rotation amount does not exceed −π ≦ ΔΘ <π (radian).
For this purpose, the frequency deviation Δf needs to be within the range shown by the following equation (6), and the value shown by the following equation (6) is the maximum detectable frequency deviation.
(Equation 2)

In other words, when trying to detect a larger frequency deviation Δf, it is necessary to reduce the interval k between two symbols.
On the other hand, the calculated phase difference signal Δθ includes an error. If the interval k between two symbols is reduced, the error is easily affected.
That is, the phase difference signal Δθ is given by the following equation (7), where the true value of the phase difference Δθ is the phase difference Δθ ′ and the error is ε.
Δθ = Δθ '+ ε (7)
Therefore, the value of the frequency deviation Δf is given by the following equation (8), where the true value of the frequency deviation Δf is the frequency deviation Δf ′.
(Equation 3)

That is, if the interval k between two symbols is increased, the calculation error due to noise or the like can be reduced.
As described above, in the frequency deviation detector according to the related art, the maximum value of the frequency deviation to be detected and the required measurement accuracy are in a trade-off relationship, and k is appropriately set depending on which is more important. There is a need.
[0013]
[Problems to be solved by the invention]
A frequency deviation detector used in a demodulation unit of a digital communication device, which detects a frequency deviation from a phase difference between a plurality of received signals input at different times, is a 2qπ radian (q = -Z to + z, where z is a natural number) Since it is not possible to identify that the frequency deviation has been detected from the phase difference of the received signal having a rotated phase, the range of the phase difference of the received signal for detecting the frequency deviation is limited. You.
In order to expand the detection range of the frequency deviation, the time interval between a plurality of received signals for obtaining the phase difference may be reduced, but the error due to noise or the like is affected when obtaining the phase difference.
The condition for detecting a larger frequency deviation and the condition for reducing the influence of noise etc. are in principle in conflict, and it is possible to realize highly accurate frequency deviation detection in a wide frequency range. It was difficult.
SUMMARY OF THE INVENTION It is an object of the present invention to provide a frequency deviation detector and a frequency deviation detection method that solve the above problem and realize highly accurate frequency deviation detection in a wide frequency range.
[0014]
[Means for Solving the Problems]
In order to achieve the object, the frequency deviation detector of the present invention is a frequency deviation detector of a receiver to which a received signal is input, and receives a plurality of received signals received at different times, and receives a plurality of different signals. A plurality of phase difference calculation means for respectively obtaining phase difference signals at time intervals, and among the phase difference signals calculated by the phase difference calculation means, a phase difference signal at the longest time interval; Frequency deviation candidates obtained by adding 2qπ radians where q = −z to + z and z is a natural number Frequency deviation candidate calculating means for obtaining the frequency deviation information, and frequency deviation information calculating means for obtaining frequency deviation information from the phase difference signal of the shortest time interval among the phase difference signals calculated by the phase difference calculating means, A frequency deviation value of a frequency deviation candidate closest to the frequency deviation information is output as a frequency deviation signal from the candidate sequence.
[0015]
Further, the frequency deviation detector of the present invention comprises a first means for obtaining a phase difference signal between predetermined symbol signals of a plurality of digital reception signals received at different times, and a different time having a longer time interval than the different time. A second means for obtaining a phase difference signal between predetermined symbol signals of a plurality of digital reception signals received by the second means, and multiplying the phase difference signal input from the second means by a predetermined coefficient to obtain one A third means for obtaining a candidate for a frequency deviation signal; and a phase difference signal input from the second means, 2qπ radian where q = −z to + z and z is a natural number And fourth means for obtaining a plurality of frequency deviation signal candidates by multiplying the phase difference signal by a predetermined coefficient, and multiplying the phase difference signal input from the first means by a predetermined coefficient. And a frequency deviation signal input from the fifth means among the plurality of frequency deviation signal candidates input from the third and fourth means. Comparing and selecting means for selecting and outputting a frequency deviation signal having a similar frequency deviation, and outputting a frequency deviation signal having the closest frequency deviation from among a plurality of frequency deviation signal candidates as a more accurate frequency deviation signal. is there.
More specifically, the frequency deviation detector according to the present invention is characterized in that the first means and the second means use two sets of digital reception signals received at different time intervals. Setting a predetermined symbol signal to the same predetermined symbol signal, A phase difference signal is obtained by using three predetermined symbol signals.
Further, in the frequency deviation detector of the present invention, the first means and the second means are used in a case where two sets of digital received signals received at different time intervals are inserted into one set of frames. A phase difference signal is obtained using one predetermined symbol signal and one predetermined symbol signal inserted in the next set of frames.
[0016]
Further, the frequency deviation detection method of the present invention, a plurality of received signals received at different times is input, to determine a phase difference signal of a plurality of different time intervals, respectively, to the phase difference signal obtained at the longest time interval, 2qπ radian where q = −z to + z and z is a natural number Is obtained, and frequency deviation information is obtained from the phase difference signal of the shortest time interval. From among the frequency deviation candidate sequences, the frequency deviation value of the frequency deviation candidate closest to the frequency deviation information is obtained. Is output as a frequency polarization signal.
Further, the frequency deviation detection method of the present invention obtains a phase difference signal between two sets of predetermined symbol signals having different time intervals between a plurality of digital reception signals received at different times, and obtains a phase difference signal from a set having a long time interval. Phase difference signal 2qπ radian where q = −z to + z and z is a natural number Are further multiplied by a predetermined coefficient to obtain a plurality of frequency deviation signal candidates, and the phase difference signal obtained from the set having a long time interval is multiplied by a predetermined coefficient to obtain one frequency A candidate for a deviation signal is obtained, a phase difference signal obtained from a pair having a short time interval is multiplied by a predetermined coefficient to obtain one frequency deviation signal, and one and a plurality of frequency deviation signals obtained from the pair having a long time interval are obtained. In this method, a frequency deviation signal having the closest frequency deviation to the frequency deviation signal obtained from the pair having the short time interval is selected from the candidates of the frequency deviation signal, and is output as a more accurate frequency deviation signal.
[0017]
BEST MODE FOR CARRYING OUT THE INVENTION
An example of an embodiment of a frequency deviation detector and a frequency deviation detection method according to the present invention will be described.
FIG. 1 is a block diagram showing one embodiment of a frequency deviation detector according to the present invention. In FIG. 1, 1 is a received signal P _n Input terminal 2 is a received signal P _{n + m} Input terminal 3 is a received signal P _{n + k} Input terminal 7 is a reception signal P _n Conjugate operation unit that performs the conjugate operation of the received signal P _n And the received signal P _{n + m} A complex multiplier for calculating a complex product of the received signal P _n Conjugate operation unit for performing the conjugate operation of the received signal P _n And the received signal P _{n + k} A complex multiplier 9 for calculating a complex product of the complex multiplier signal input from the complex multiplier 5, a phase calculator for calculating a phase signal for the complex product signal input from the complex multiplier 5, and a phase signal 12 input from the phase calculator 9; Separately, a multiplier that performs multiplication with an input coefficient, 8 is a phase calculator that calculates a phase signal with respect to the complex product signal that is input from the complex multiplier 4, _-H (H = 1, 2,..., 2 s) are adders for separately adding the input phase signal to the phase signal input from the phase calculator 8. ₋₀ Is a multiplier for multiplying the phase signal input from the phase calculator 8 by a coefficient input separately, 11 _-H (H = 1, 2,... 2s) is a plurality of adders 10 _-H A plurality of multipliers for separately multiplying a phase signal inputted from the input terminal by a coefficient inputted thereto, and a comparator 13 for comparing and selecting phase difference signals inputted to a plurality of input terminals and outputting a frequency deviation signal And 14, a frequency deviation signal output terminal.
[0018]
Next, the operation of the frequency deviation detector according to the present invention will be described.
The received signal P at time n is input to the received signal input terminal 1. _n However, the received signal P at time n + m is _{n + m} However, the received signal P at the time n + k is input to the received signal input terminal 3. _{n + k} Is entered. It is assumed that m <k, and further, signals of the same symbol are transmitted.
At time n, the received signal P _n Is input to the conjugate calculator 7 and the conjugate calculator 6 via the reception signal input terminal 1.
At time n + m, the received signal P _{n + m} Is input to the complex multiplier 5 via the reception signal input terminal 2 and at time n + k, the reception signal P _{n + k} Is input to the complex multiplier 4 via the reception signal input terminal 3.
[0019]
The conjugate calculator 7 receives the received signal P input through the received signal input terminal 1. _n , And outputs the calculated conjugate operation signal 7 a to the complex multiplier 5.
The complex multiplier 5 includes a conjugate operation signal 7 a input from the conjugate operation unit 7 and a reception signal P input from the reception signal input terminal 2. _{n + m} , And outputs the calculated complex product signal 5 a to the phase calculator 9.
The phase calculator 9 calculates the phase of the complex product signal 5a input from the complex multiplier 5, and outputs the calculated phase signal 9a to the multiplier 12.
That is, the phase signal 9a output from the phase calculator 9 is the received signal P _n And received signal P _{n + m} Is a phase difference signal.
[0020]
Similarly, the conjugate operator 6 receives the received signal P input through the received signal input terminal 1. _n And outputs the calculated conjugate operation signal 6a to the complex multiplier 4.
The complex multiplier 4 includes a conjugate operation signal 6 a input from the conjugate operation unit 6 and a reception signal P input from the reception signal input terminal 3. _{n + k} , And outputs the calculated complex product signal 4a to the phase calculator 8.
The phase calculator 8 calculates the phase of the complex product signal 4a input from the complex multiplier 4, and outputs the calculated phase signal 8a to a plurality of multipliers 11a. _-H One of the multipliers 11 ₋₀ And a plurality of adders 10 _-H Output to each adder.
That is, the phase signal 8a output from the phase calculator 8 is _n And received signal P _{n + k} Is a phase difference signal.
[0021]
Multiplier 11 ₋₀ Is a value (2πkTs) that is separately input to the phase signal 8a (radian) input from the phase calculator 8. ¹ Is multiplied by the coefficient signal of value (2πkTs) ￣ ¹ Phase signal 11 multiplied by the coefficient signal ₋₀ a (radian) is output to the A (0) terminal of the comparison selector 13 having a plurality of input terminals.
The phase signal 11 input to the A (0) terminal of the comparison selector 13 ₋₀ a indicates that the phase signal output from the phase calculator 8 is the received signal P _{n + k} And received signal P _n This is a candidate value of the frequency deviation when the phase difference is equal to the true phase difference.
Further, a plurality of adders 10 _-H One of the adders 10 _-1 Is a phase signal 10a obtained by adding a separately input phase signal of + 2π to the phase signal 8a input from the phase calculator 8 and adding the value + 2π. _-1 a to a plurality of multipliers 11 _-H One of the multipliers 11 _-1 Output to
Multiplier 11 _-1 Is the adder 10 _-1 Phase signal 10 obtained by adding the value + 2π input from _-1 a (radian), separately input value (2πkTs) ￣ ¹ Is multiplied by the coefficient signal of value (2πkTs) ￣ ¹ Phase signal 11 multiplied by the coefficient signal _-1 a (radian) is output to the A (1) terminal of the comparison selector 13.
The phase signal 11 input to the A (1) terminal of the comparison selector 13 _-1 a is a phase signal obtained by adding a phase signal having a value of + 2π to the phase signal output from the phase calculator 8, _{n + k} And received signal P _n This is a candidate value of the frequency deviation when the phase difference is equal to the true phase difference.
[0022]
Hereinafter, the same operation is performed by the other adder 10 and the other multiplier 11 to input the phase signal to each terminal of the comparison / selector 13, and finally, the phase signal output from the phase operator 8 Adder 10 _-2s After adding the phase signal of the value -2sπ in the multiplier 11 _-2s At the value (2πkTs) ￣ ¹ , And is input to the A (2s) terminal of the comparison selector 13.
The phase signal 11 input to the A (2s) terminal of the comparison selector 13 _-2s a is a phase signal obtained by adding a phase signal having a value of −2sπ to the phase signal output from the phase calculator 8, _{n + k} And received signal P _n This is a candidate value of the frequency deviation when the phase difference is equal to the true phase difference.
On the other hand, the multiplier 12 adds the separately input value (2πmTs) ￣ to the phase signal 9a (radian) input from the phase calculator 9. ¹ Multiplied by the coefficient signal of the value (2πmTs) ￣ ¹ And outputs the phase signal 12a (radian) multiplied by the coefficient signal of (b) to the B terminal of the comparison / selector 13.
The comparison selector 13 selects a signal having a value closest to the B terminal input value from the (2s + 1) A terminal input values, and outputs the selected signal from the C terminal.
The signal output from the C terminal of the comparison selector 13 is output from the frequency deviation signal output terminal 14 to another circuit as the selected frequency deviation signal.
In the embodiment shown in FIG. 1, the time interval for adding the phase signals of 2qπ radians (q = −z to + z, where z is a natural number) is described as one set, but may be plural.
[0023]
Next, a specific operation in the embodiment of the frequency deviation detector shown in FIG. 1 will be described with reference to FIG.
FIG. 2A shows an example of a frame configuration of a signal used in the frequency deviation detector. The symbol rate is 16 k symbols / sec, that is, Ts = 62.5 μsec, and the length of one frame is 128 symbols. .
Usually, a fixed symbol sequence for the purpose of establishing synchronization is inserted into a transmission frame having such a frame configuration, and this fixed symbol sequence is used as a known symbol.
P shown in the first frame of the frame configuration _n , P _{n + 8} , And P in the next frame _{n + 128} (P shown in the first frame _n At a position of 128 symbols, which is one frame length), corresponds to a fixed symbol sequence.
FIG. _n And P _{n + 128} , A frequency deviation sequence obtained by calculation from, and reference numeral 100 denotes a frequency deviation axis; ₋₀ Is P _n And P _{n + 128} This represents a frequency deviation directly calculated from the phase difference between the two signals (if the frequency deviation is 0, the position is at 0 Hz on the frequency deviation axis 100).
In addition, the frequency deviation 101 ₋₀ Besides, the frequency deviation 101 ₋₀ Candidate values 101 of frequency deviation at 125 Hz intervals _-H (H = 1, 2,..., 16), and candidate values 101 of these frequency deviations ₋₀ , 101 _-H Is the input signal of each terminal A of the comparison selector 13.
[0024]
FIG. 2C shows a fixed symbol sequence P in one frame. _n And P _{n + 8} , The frequency deviation obtained by the calculation from the reference numeral 102, a reference numeral 102 represents a frequency deviation axis, and a reference numeral 103 _n And P _{n + 8} (The frequency deviation calculated from the phase difference between the two signals is 0 Hz on the frequency deviation axis 102 if the frequency deviation is 0).
The value of this frequency deviation is determined only within ± 1000 Hz, but includes an error due to the influence of noise or the like.
The value 12a of the frequency deviation becomes an input signal at the terminal B of the comparison selector 13.
The comparison selector 13 selects the frequency deviation 101 closest to the frequency deviation 103 input to the terminal B from the frequency deviation values 11a input to each terminal A. _-8 Is output from the terminal c, and is output from the frequency deviation signal output terminal 14 to another circuit.
In the example described above, the limit value of the maximum frequency deviation was relaxed from ± 62.5 Hz to ± 1000 Hz without losing accuracy.
[0025]
【The invention's effect】
According to the present invention, it is possible to provide a frequency deviation detector and a frequency deviation detection method that realize highly accurate detection of a frequency deviation in a wide frequency range.
[Brief description of the drawings]
FIG. 1 is a block diagram showing an embodiment of a frequency deviation detector according to the present invention.
FIG. 2 is an explanatory diagram of a specific operation of the embodiment shown in FIG. 1;
FIG. 3 is a block diagram illustrating a configuration of a demodulation unit of the digital wireless device.
FIG. 4 is an explanatory diagram of an influence of a frequency deviation.
FIG. 5 is an explanatory diagram of the principle of frequency deviation detection according to the related art.
FIG. 6 is a block diagram showing a configuration of a conventional frequency deviation detector.
[Explanation of symbols]
1, 2, 3, 31, 61, 62 reception signal input terminals,
4, 5, 64 complex multipliers,
6, 7, 63 conjugate arithmetic unit,
8, 9, 65 phase calculator,
10 adder,
11, 12, 66, 44 multipliers,
13 comparison selector,
14, 67 frequency deviation signal output terminal,
32 synchronous detector,
33, 34 low-pass filters,
35, 36 A / D converter,
37, 38 receive filter,
39, 40 samplers,
41 common mode component output terminal,
42 orthogonal component output terminal,
43 frequency deviation detector,
45 loop filter,
46 integrator,
47 Voltage controlled oscillator.

Claims

A frequency deviation detector of a receiver to which a received signal is input, wherein a plurality of received signals received at different times are input, and a plurality of phase difference calculating means for respectively obtaining phase difference signals at a plurality of different time intervals; and And a frequency obtained by adding 2qπ radians in which q = −z to + z and z is a natural number to the phase difference signal having the longest time interval among the phase difference signals calculated by the phase difference calculation means. Frequency deviation candidate calculation means for obtaining a deviation candidate sequence , and a frequency deviation information calculation means for obtaining frequency deviation information from the phase difference signal of the shortest time interval among the phase difference signals calculated by the phase difference calculation means, A frequency deviation detector which outputs a frequency deviation value of a frequency deviation candidate closest to the frequency deviation information from the frequency deviation candidate sequence as a frequency deviation signal.

First means for obtaining a phase difference signal between predetermined symbol signals of a plurality of digital reception signals received at different times; and a predetermined means for determining a plurality of digital reception signals received at different times having a longer time interval than the different times. A second means for obtaining a phase difference signal between the symbol signals, and a third means for obtaining one frequency deviation signal candidate by multiplying the phase difference signal input from the second means by a predetermined coefficient. And a phase signal of 2qπ radian where q = −z to + z and z is a natural number is added to the phase difference signal input from the second means, and further multiplied by a predetermined coefficient to obtain a plurality of signals. A fourth means for obtaining a candidate for a frequency deviation signal; a fifth means for obtaining a frequency deviation signal by multiplying a phase difference signal input from the first means by a predetermined coefficient; Input from 4 means Comparing and selecting means for selecting and outputting a frequency deviation signal having a frequency deviation closest to the frequency deviation signal inputted from the fifth means from among a plurality of frequency deviation signal candidates to be inputted, A frequency deviation detector for outputting a frequency deviation signal having the closest frequency deviation from among signal candidates as a more accurate frequency deviation signal.

3. The frequency deviation detector according to claim 2 , wherein said first means and said second means convert a predetermined symbol signal of two sets of digital reception signals received at different time intervals into the same predetermined signal. A frequency deviation detector characterized in that a phase difference signal is obtained by using three predetermined symbol signals.

3. A frequency deviation detector according to claim 2 , wherein said first means and said second means are inserted in one set of frames of two sets of digital received signals received at different times. A frequency deviation detector for determining a phase difference signal using the two predetermined symbol signals and one predetermined symbol signal inserted in the next set of frames.

A plurality of reception signals received at different times are input, and phase difference signals at a plurality of different time intervals are respectively obtained. The phase difference signals obtained at the longest time interval are: q = −z to + z, and z is A frequency deviation candidate sequence obtained by adding 2qπ radians composed of natural numbers is obtained, frequency deviation information is obtained from the phase difference signal at the shortest time interval, and a frequency deviation of a value closest to the frequency deviation information is obtained from the frequency deviation candidate sequence. A frequency deviation detection method, wherein a frequency deviation value of a candidate is output as a frequency deviation signal.

A phase difference signal between two sets of predetermined symbol signals having different time intervals of a plurality of digital reception signals received at different times is obtained, and q = −z to + z is added to the phase difference signal obtained from one set having a long time interval. Where z is a natural number, and adds a 2qπ radian phase signal, and further multiplies by a predetermined coefficient to obtain a plurality of frequency deviation signal candidates. One frequency deviation signal candidate is obtained by multiplying a predetermined coefficient, and one frequency deviation signal is obtained by multiplying a phase difference signal obtained from a set having a short time interval by a predetermined coefficient to obtain one frequency deviation signal. From the one and a plurality of frequency deviation signal candidates obtained from one set, a frequency deviation signal whose frequency deviation is closest to the frequency deviation signal obtained from the set having the short time interval is selected, and a more accurate frequency deviation signal is selected. Faith Frequency deviation detecting method and outputs a.