JPH1056267A - Multilayer printed wiring board and its manufacture - Google Patents
Multilayer printed wiring board and its manufactureInfo
- Publication number
- JPH1056267A JPH1056267A JP20951196A JP20951196A JPH1056267A JP H1056267 A JPH1056267 A JP H1056267A JP 20951196 A JP20951196 A JP 20951196A JP 20951196 A JP20951196 A JP 20951196A JP H1056267 A JPH1056267 A JP H1056267A
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- wiring board
- resin
- multilayer printed
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Manufacturing Of Printed Wiring (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、多層プリント配線
板及びその製造方法に関する。さらに詳しくは、湿度に
よる絶縁劣化を防止し、また多層積層を容易にするプリ
ント配線板及びその製造方法に関する。The present invention relates to a multilayer printed wiring board and a method for manufacturing the same. More specifically, the present invention relates to a printed wiring board that prevents insulation deterioration due to humidity and facilitates multilayer lamination, and a method for manufacturing the same.
【０００２】[0002]
【従来の技術】電子機器の小型化が急速に進むにつれ、
プリント配線板は益々高密度であることが要求されてい
る。高密度化のために益々多層化と配線の微細化が進め
られている。従来、精々６層でピン間３本の線（0.3mm
ピッチの配線）で良かったものが、現在では８層から１
０層でピン間５本（0.2mmピッチの配線）のスペックが
要求され、さらには0.1mmピッチも要求され始めてい
る。2. Description of the Related Art As the miniaturization of electronic devices progresses rapidly,
Printed wiring boards are required to be increasingly dense. In order to increase the density, more layers and finer wiring are being promoted. Conventionally, at most 6 layers, 3 lines between pins (0.3mm
Pitch wiring), but now 8 layers to 1
Specs of five layers (interconnects with a pitch of 0.2 mm) between the pins in the 0 layer are required, and a 0.1 mm pitch is beginning to be required.
【０００３】多層の方法は幾つかある。それらは、下記
の方法等が代表的である。 （１）従来からの方法で両面板をプリプレーグ間に挟ん
で加圧加熱し、プリプレーグの樹脂が硬化した後、スル
ーホールで層間の電気的接続を取るスルーホール方法。 （２）コアーである両面または多層基板に絶樹体脂縁層
を積層し、この絶縁体樹脂層にビア穴を開けた後に、め
っきにより銅箔層を形成し、エッチングして配線層を重
ねて行くビルドアップ方法。 （３）コアーである両面または多層基板に、導電性ペー
ストをバイアホールに埋め込んだプリプレーグと銅箔を
重ね加圧加熱して接着した後に、表層銅箔をエッチング
して配線層を重ねて行くスタック方式。There are several multi-layer methods. The following methods are typical. (1) A through-hole method in which a double-sided board is sandwiched between prepregs and heated under pressure by a conventional method, and after the resin of the prepreg is cured, electrical connection between the layers is established through the through-holes. (2) Laminate an insulating layer on a double-sided or multilayer substrate as a core, form a via hole in the insulating resin layer, form a copper foil layer by plating, and etch to laminate a wiring layer. How to build up. (3) A stack in which a prepreg in which a conductive paste is embedded in a via hole and a copper foil are overlaid on a double-sided or multilayer substrate serving as a core and bonded by applying pressure and heating, followed by etching of a surface copper foil and stacking of wiring layers. method.
【０００４】配線の微細化には配線銅箔の厚みを薄くし
たり、エッチング方法を工夫するなどが一般に行われて
いる。[0004] In order to miniaturize the wiring, generally, the thickness of the wiring copper foil is reduced, or an etching method is devised.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、上記の
多層化と微細化には幾つかの問題があった。即ち、 （１）配線層を重ねて行くとき、下の配線層の凸凹が表
層に現れ、微細な配線を形成する障害になる。 （２）絶縁体樹脂層を重ねるとき下の配線層の微細なパ
ターンがあるために、また塵埃等のために微細な部分に
樹脂が入り込みにくく、絶縁性の劣化をきたすことが多
くなる。等の課題があった。However, there are several problems with the above-mentioned multilayering and miniaturization. That is, (1) when wiring layers are stacked, unevenness of a lower wiring layer appears on a surface layer, which is an obstacle to forming fine wiring. (2) When the insulating resin layer is overlaid, the fine pattern of the lower wiring layer is present, and it is difficult for the resin to enter the fine part due to dust and the like, and the insulating property often deteriorates. And other issues.
【０００６】本発明は、前記従来の問題を解決するた
め、スルーホール方式、ビルドアップ方式、スタック方
式等の多層プリント配線板において、多層に重ねるとき
に問題となる凸凹の発生を防止するかまたは緩和し、さ
らにパターンが微細になっても絶縁劣化を起こしにくい
多層プリント配線板及びその製造方法を提供することを
目的とする。SUMMARY OF THE INVENTION The present invention solves the above-mentioned conventional problems by preventing the occurrence of unevenness which is a problem when a multilayer printed wiring board of a through-hole type, a build-up type, a stack type or the like is stacked in multiple layers. It is an object of the present invention to provide a multilayer printed wiring board which is less likely to cause insulation deterioration even if the pattern becomes finer and the pattern becomes finer, and a method for manufacturing the same.
【０００７】[0007]
【課題を解決するための手段】前記目的を達成するた
め、本発明の多層プリント配線板は、単層または多層プ
リント配線板の表層の配線間スペースに樹脂が埋め込ま
れ、その上に樹脂絶縁体と配線が積層されているという
構成を備えたものである。In order to achieve the above object, a multilayer printed wiring board according to the present invention has a resin embedded in a space between wirings on a surface layer of a single-layer or multilayer printed wiring board, and a resin insulator formed thereon. And wiring are laminated.
【０００８】前記多層プリント配線板おいては、樹脂の
埋め込みが、部分的であってもよい。また、配線間スペ
ースに周辺と異なる樹脂が埋め込まれていてもよい。ま
た、前記多層プリント配線板おいては、樹脂の埋め込み
により、単層または多層プリント配線板の表層が平坦に
なっていることが好ましい。In the multilayer printed wiring board, the resin may be partially embedded. Further, a resin different from the surroundings may be embedded in the space between the wirings. Further, in the multilayer printed wiring board, it is preferable that the surface layer of the single-layer or multilayer printed wiring board is made flat by embedding the resin.
【０００９】また、前記多層プリント配線板おいては、
プリント配線板の表層の配線間スペースに樹脂が埋め込
まれた表面に、絶縁体樹脂層が積層され、かつ前記絶縁
体樹脂層に穴が開けられ、その表面にめっきによる導体
箔が形成され、パターンエッチングにより導体配線が形
成されていることが好ましい。Further, in the multilayer printed wiring board,
An insulating resin layer is laminated on the surface of the printed wiring board in which the resin is embedded in the inter-wiring space on the surface layer, and a hole is formed in the insulating resin layer. It is preferable that the conductor wiring is formed by etching.
【００１０】また、前記多層プリント配線板おいては、
プリント配線板の表層の配線間スペースに樹脂が埋め込
まれた表面に、絶縁体樹脂層と導体箔が張り付けられ、
かつビア穴が開けられ、その表面にめっきによる導体箔
が形成され、パターンエッチングにより導体配線が形成
されていることが好ましい。[0010] In the multilayer printed wiring board,
An insulating resin layer and conductive foil are attached to the surface of the printed wiring board where the resin is embedded in the space between the wiring layers on the surface,
In addition, it is preferable that a via hole is formed, a conductive foil is formed on the surface of the via hole, and a conductive wiring is formed by pattern etching.
【００１１】また、前記多層プリント配線板おいては、
表層の配線間スペースに樹脂が埋め込まれたプリント配
線板の表面に、ビア穴に導電性ペーストを埋め込んだプ
リプレーグと導体箔が張り付けられ、かつパターンエッ
チングにより導体配線が形成されていることが好まし
い。[0011] In the multilayer printed wiring board,
It is preferable that a prepreg in which a conductive paste is embedded in a via hole and a conductive foil are adhered to a surface of a printed wiring board in which a resin is embedded in a space between wirings on a surface layer, and the conductive wiring is formed by pattern etching.
【００１２】また、前記多層プリント配線板おいては、
プリプレーグが、アラミド繊維（全芳香族ポリアミド）
を補強材とし、これにエポキシ樹脂を含浸したアラミド
エポキシプリプレーグであることが好ましい。Further, in the multilayer printed wiring board,
Preplagu is made of aramid fiber (wholly aromatic polyamide)
Is preferably used as an aramid epoxy prepreg impregnated with an epoxy resin.
【００１３】次に本発明の多層プリント配線板の製造方
法は、予め作成した単層または多層プリント配線板を用
いて、更に層数の多い多層プリント配線板を作成する方
法において、プリント配線板の表層の配線間スペースに
樹脂を埋め込み、その後に樹脂絶縁体と配線を積層する
ことを特徴とする。Next, a method of manufacturing a multilayer printed wiring board according to the present invention is a method of manufacturing a multilayer printed wiring board having a larger number of layers by using a previously prepared single-layer or multilayer printed wiring board. A resin is buried in a space between wirings on a surface layer, and thereafter, a resin insulator and wirings are laminated.
【００１４】前記方法においては、プリント配線板の配
線間スペースに樹脂を埋め込む手段が、スキージによる
手段であることが好ましい。スキージを用いると、配線
間スペースに樹脂を埋め込むことが効率良くできるから
である。In the above method, it is preferable that the means for embedding the resin in the space between the wirings of the printed wiring board is a means using a squeegee. This is because, when a squeegee is used, resin can be efficiently embedded in the space between wirings.
【００１５】また前記方法においては、樹脂の埋め込み
が、部分的であってもよい。また前記方法においては、
予め作成した単層または多層プリント配線板の表層の配
線間スペースに樹脂を埋め込んだ後に、絶縁体樹脂層を
積層し、前記絶縁体樹脂層に穴を開け、その上にめっき
による導体箔を形成し、パターンエッチングして導体配
線を形成することが好ましい。In the above method, the resin may be partially embedded. In the above method,
After embedding resin in the space between wirings on the surface layer of a single-layer or multilayer printed wiring board prepared in advance, an insulating resin layer is laminated, a hole is formed in the insulating resin layer, and a conductive foil is formed thereon by plating. Then, it is preferable to form conductor wiring by pattern etching.
【００１６】また前記方法においては、予め作成した単
層または多層プリント配線板の表層の配線間スペースに
樹脂を埋め込んだ後に、絶縁体樹脂層と導体箔を張り付
け、ビア穴を開け、めっきによる導体箔を形成し、パタ
ーンエッチングして導体配線を形成することが好まし
い。Further, in the above method, after a resin is embedded in a space between wirings on a surface layer of a single-layer or multilayer printed wiring board prepared in advance, an insulating resin layer and a conductor foil are attached, a via hole is formed, and a conductor is formed by plating. It is preferable to form a foil and pattern-etch to form conductor wiring.
【００１７】また前記方法においては、予め作成した単
層または多層プリント配線板の表層の配線間スペースに
樹脂を埋め込んだ後に、あらかじめビア穴に導電性ペー
ストを埋め込んだプリプレーグと導体箔を張り付け、パ
ターンエッチングして導体配線を形成することが好まし
い。In the above method, a resin is buried in a space between wirings on a surface layer of a single-layer or multilayer printed wiring board prepared in advance, and a pre-preg in which a conductive paste is buried in a via hole in advance and a conductive foil are attached. It is preferable to form conductor wiring by etching.
【００１８】また前記方法においては、予め作成した複
数枚の単層または多層プリント配線板の表層の配線間ス
ペースに樹脂を埋め込んだ後に、各プリント配線板の間
にあらかじめビア穴に導電性ペーストを埋め込んだプリ
プレーグを挟み、加熱加圧することが好ましい。In the above method, a resin is embedded in a space between wirings on a surface layer of a plurality of single-layer or multilayer printed wiring boards prepared in advance, and then a conductive paste is embedded in via holes between the printed wiring boards in advance. It is preferable to heat and press the prepreg.
【００１９】また前記方法においては、プリプレーグが
アラミド繊維を補強材としエポキシ樹脂を含浸したアラ
ミドエポキシプリプレーグであることが好ましい。以上
のとおり本発明によれば、配線層の凸凹が平坦化され積
層が容易になるとともに、かつ微細になっても絶縁劣化
をきたさないプリント配線板が得られる。In the above method, the prepreg is preferably an aramid epoxy prepreg using aramid fiber as a reinforcing material and impregnated with an epoxy resin. As described above, according to the present invention, it is possible to obtain a printed wiring board in which the unevenness of the wiring layer is flattened, the lamination becomes easy, and the insulation does not deteriorate even when the wiring layer becomes fine.
【００２０】[0020]
【発明の実施の形態】以下、本発明の実施の形態につい
て、図面に基づいて説明する。 （実施の形態１）図１（ａ）〜（ｆ）は本発明の一実施
の形態によるビルドアップ基板の製造プロセスを示す。
図１（ａ）は、基板の表面に配線１０２(通常銅配線）
がある片面基板（単層プリント配線板）１０１である。
プリント配線板１０１は通常ガラスエポキシ基材や紙フ
ェノール基材またはポリイミド基材等を用いることがで
きる。これに加えて最近提案されているアラミド基材も
好ましく使用できる。従来のビルドアップ基板の製造プ
ロセスでは、この配線の上に絶縁体樹脂層をコーティン
グするか張り付け積層してバイアホールを開けるのであ
るが、本発明のプロセスでは図１（ｂ）のように、配線
間スペース１０３に樹脂１０４を前以て埋め込んでお
く。この樹脂はプリント配線板１０１や次に積層する絶
縁体樹脂の材料と異なっていてもよいし、同一でもよ
い。しかし、埋め込み時に粘度が低いほうが配線間スペ
ースに埋まりやすい。従って埋め込み用の樹脂は粘度調
整用に溶剤を含ませることが多い。Embodiments of the present invention will be described below with reference to the drawings. (Embodiment 1) FIGS. 1A to 1F show a manufacturing process of a build-up substrate according to an embodiment of the present invention.
FIG. 1A shows a wiring 102 (usually copper wiring) on the surface of the substrate.
Is a single-sided substrate (single-layer printed wiring board) 101.
As the printed wiring board 101, a glass epoxy substrate, a paper phenol substrate, a polyimide substrate, or the like can be generally used. In addition, the recently proposed aramid substrate can also be preferably used. In the conventional build-up board manufacturing process, a via hole is formed by coating or laminating an insulating resin layer on the wiring, but in the process of the present invention, as shown in FIG. A resin 104 is embedded in the interspace 103 in advance. This resin may be different from or the same as the material of the printed wiring board 101 or the insulating resin to be laminated next. However, the lower the viscosity at the time of embedding, the easier it is to bury the space between the wirings. Therefore, the resin for embedding often contains a solvent for adjusting the viscosity.
【００２１】図２に示すようにスキージ２０１を用い
て、配線１０２上をなぞって樹脂２０２を配線間スペー
スに埋め込むのが簡単である。この際、配線表面に樹脂
絶縁体が残ることがあるが、後の工程からわかるように
問題ではない。溶剤を乾燥させた後、または樹脂を硬化
させた後は、従来のビルドアップ法と同一であり、図１
（ｃ）に示すように、樹脂絶縁体１０５をコーティング
または張り付けて(好ましくは加圧加熱して）積層す
る。前記において、好ましい条件は、樹脂がエポキシ樹
脂の場合、温度：１５０〜１８０℃、加圧力２０〜６０
kg/cm2である。As shown in FIG. 2, it is easy to trace the wiring 102 using the squeegee 201 and embed the resin 202 in the space between the wirings. At this time, a resin insulator may remain on the wiring surface, but this is not a problem as will be understood from a later step. After the solvent is dried or the resin is cured, it is the same as the conventional build-up method.
As shown in (c), the resin insulator 105 is laminated by coating or pasting (preferably by heating under pressure). In the above, preferable conditions are as follows: when the resin is an epoxy resin, the temperature is 150 to 180 ° C., and the pressure is 20 to 60.
kg / cm 2 .
【００２２】積層する絶縁体樹脂並びに埋め込み用樹脂
はエポキシ樹脂が好ましい。この際、既に配線間スペー
スは埋められて凸凹が少なくなっているために、その後
の処理（例えば積層など）が容易である。The insulating resin and the filling resin to be laminated are preferably epoxy resins. At this time, since the space between the wirings has already been filled and the unevenness has been reduced, subsequent processing (for example, lamination) is easy.
【００２３】その後、図１（ｄ）に示すように、バイア
ホール１０６を形成する。このバイアホールはレーザま
たは樹脂絶縁体が感光性の場合にはフォトエッチング法
等により形成する。Thereafter, as shown in FIG. 1D, a via hole 106 is formed. This via hole is formed by a photo-etching method or the like when the laser or the resin insulator is photosensitive.
【００２４】次に図１（ｅ）に示すように、配線導体と
なる導体箔１０７（通常は銅）をめっきなどにより積層
し、図１（ｆ）に示すように、エッチングして配線１０
８を形成する。更に配線を重ねる場合は、配線１０８の
間の配線間スペース１０９に樹脂を埋め込んでプロセス
図１（ｂ）から（ｆ）を繰り返す。このとき配線間スペ
ースは図１（ｂ）の工程で埋められるために、出来上が
る表層の凸凹は従来法に比較して緩和される。Next, as shown in FIG. 1E, a conductor foil 107 (usually copper) serving as a wiring conductor is laminated by plating or the like, and as shown in FIG.
8 is formed. In the case where wirings are further overlapped, resin is buried in the space 109 between the wirings 108 and the process diagrams 1 (b) to 1 (f) are repeated. At this time, since the space between the wirings is filled in the process of FIG. 1B, the resulting unevenness of the surface layer is reduced as compared with the conventional method.
【００２５】配線間スペースに樹脂を埋め込む際に、基
板全面に埋め込む必要は無い。微細配線のところのみ部
分的に樹脂を埋め込むことが可能で、全面に樹脂を埋め
込むのに比較して簡単でコストが安くなる。絶縁劣化対
策にはこれで十分である。When embedding the resin in the space between the wirings, it is not necessary to embed the resin over the entire surface of the substrate. It is possible to partially embed the resin only in the fine wiring, which is simpler and less expensive than embedding the resin in the entire surface. This is sufficient for insulation deterioration countermeasures.
【００２６】埋め込み用の樹脂は、特別に選択されるこ
とが好ましい。プリント配線板１０１の材料や絶縁体樹
脂は、配線材料との接着力や吸湿性や難燃性等プリント
基板としての特性を維持するために、厳しい条件が課せ
られている。しかし、埋め込み用の樹脂にはそのような
特性をすべて満足させる必要もなく、埋め込みが容易で
（粘度が適当で、例えば５００〜３０００ポイズ）、接
着力が強ければ使える。最も、絶縁性を劣化させる原因
である不純物イオン等の含有量が少ないことや、吸湿が
少ないほうが好ましい。したがって配線間スペースに埋
め込む樹脂は、周辺の樹脂（前記プリント配線板の樹脂
並びに絶縁体樹脂）と異なっていてもよい。もちろん同
一の樹脂も使用できる。It is preferable that the resin for embedding is specifically selected. Strict conditions are imposed on the material of the printed wiring board 101 and the insulating resin in order to maintain the properties as a printed circuit board, such as adhesive strength with the wiring material, moisture absorption, and flame retardancy. However, the embedding resin does not need to satisfy all of these characteristics, and can be used if the embedding is easy (appropriate viscosity, for example, 500 to 3000 poise) and adhesion is strong. It is most preferable that the content of impurity ions or the like which cause the deterioration of the insulating property is small and that the moisture absorption is small. Therefore, the resin to be embedded in the space between the wirings may be different from the surrounding resin (the resin of the printed wiring board and the insulating resin). Of course, the same resin can be used.
【００２７】前記のように予め埋め込みやすい樹脂を埋
め込むことにより、配線が微細になったときに配線間に
ゴミが存在していても、ゴミを包み込んでしまうために
絶縁劣化の問題が著しく改善される。By embedding a resin which is easy to be embedded in advance as described above, even if dust is present between the wires when the wires become fine, the problem of insulation deterioration is remarkably improved because the dust is wrapped around. You.
【００２８】図１（ａ）に示す基板は片面でも両面でも
よいことは明かである。両面に上記プロセスをそれぞれ
一回施せば、４層基板を得ることができる。 （実施の形態２）次に図３（ａ）〜（ｅ）は、前記図１
で説明した実施の形態１のなかで少し触れたが、絶縁体
樹脂層付きの銅箔を張り付ける多層基板の製造プロセス
を示す。前記実施の形態１に比較して、図１（ｃ）に相
当する工程以降の積層工程が異なるのみである。スキー
ジ等で配線間スペースに樹脂を埋め込んだ後に、図３
（ｃ）に示すように、未硬化の絶縁体樹脂をコーティン
グした導体箔３０１を、図３（ｄ）に示すように、加熱
加圧（温度：１５０〜１８０℃、加圧力２０〜６０kg/c
m2）して積層接着する。次に図３（ｅ）に示すように、
バイアホールとなるべき位置に導体箔に穴を開け（例え
ばフォトリソとエッチングによる）、露出した樹脂をレ
ーザまたはプラズマまたは化学エッチングで下の配線表
面まで穴を開ける。次に図３（ｆ）に示すように、バイ
アホール接続のために導体箔１０７をめっきなどにより
積層し、図３（ｇ）に示すように、エッチングして配線
１０８を形成する。It is clear that the substrate shown in FIG. 1A may have one side or both sides. By performing the above process once on each side, a four-layer substrate can be obtained. (Embodiment 2) Next, FIGS. 3 (a) to 3 (e)
As described briefly in the first embodiment described above, a manufacturing process of a multilayer substrate to which a copper foil with an insulating resin layer is attached will be described. Only the laminating process after the process corresponding to FIG. 1C is different from the first embodiment. After embedding resin in the space between wirings with a squeegee, etc., FIG.
As shown in FIG. 3C, the conductor foil 301 coated with the uncured insulating resin is heated and pressed (temperature: 150 to 180 ° C., pressure 20 to 60 kg / c) as shown in FIG.
m 2 ) and laminate. Next, as shown in FIG.
A hole is formed in the conductive foil at a position to be a via hole (for example, by photolithography and etching), and the exposed resin is formed by laser, plasma, or chemical etching to the wiring surface below. Next, as shown in FIG. 3F, a conductor foil 107 is laminated by plating or the like for via hole connection, and as shown in FIG. 3G, the wiring 108 is formed by etching.
【００２９】（実施の形態３）図４は本発明の一実施の
形態によるスタック方式の多層プリント配線板の製造プ
ロセスを示す。前記実施の形態２に比較して図３（ｃ）
に相当する工程以降の積層工程が異なる。スキージ等で
配線間スペースに樹脂を埋め込んだ後に、図４（ｃ）に
示すように、予めバイアホール４０４に未硬化の導電性
ペースト４０３を埋め込んだプリプレーグ４０２と導体
箔４０１を基板の上に重ね、図４（ｄ）に示すように、
加熱加圧（温度：１５０〜１８０℃、加圧力２０〜６０
kg/cm2）してプリプレグ並びに導電性ペーストさらに配
線間スペースに埋め込んだ樹脂が、まだ未硬化の場合に
はこの樹脂もともに硬化して一体化する。その後、図４
（ｅ）に示すように、表層の導体箔をエッチングして配
線４０５を形成する。プリプレーグとしてアラミド不織
布を補強材にしてエポキシ樹脂を含浸したアラミドエポ
キシプリプレーグを用いれば容易に実現できる。(Embodiment 3) FIG. 4 shows a manufacturing process of a stack type multilayer printed wiring board according to an embodiment of the present invention. FIG. 3 (c) in comparison with the second embodiment.
The laminating process after the process corresponding to is different. After the resin is embedded in the space between the wirings with a squeegee or the like, as shown in FIG. 4C, the pre-preg 402 in which the uncured conductive paste 403 is embedded in the via hole 404 and the conductive foil 401 are overlaid on the substrate. , As shown in FIG.
Heat and pressure (Temperature: 150 to 180 ° C, Pressure 20 to 60
kg / cm 2 ), and the resin embedded in the prepreg, the conductive paste, and the space between the wirings, if not yet cured, is also cured and integrated together. Then, FIG.
As shown in (e), the wiring 405 is formed by etching the surface conductive foil. It can be easily realized by using an aramid epoxy prepreg in which an aramid nonwoven fabric is used as a reinforcing material and an epoxy resin is impregnated.
【００３０】（実施の形態４）図５（ａ）〜（ｄ）は本
発明の別のスタック方式の多層プリント配線板の製造製
造プロセスを示す。図５（ａ）に示すように、この実施
例では２枚の両面プリント配線板５０１を用いている。
両面プリント配線板の表裏の配線を接続するバイアホー
ル５０４は導電性ペーストで埋められていてもよいし、
通常貫通スルーホールで穴が埋められている物でもよ
い。(Embodiment 4) FIGS. 5 (a) to 5 (d) show another manufacturing process for a multilayer printed wiring board of the stack type according to the present invention. As shown in FIG. 5A, in this embodiment, two double-sided printed wiring boards 501 are used.
Via holes 504 connecting the front and back wiring of the double-sided printed wiring board may be filled with a conductive paste,
Usually, the hole may be filled with a through hole.
【００３１】次に図５（ｂ）に示すように、この工程で
２枚のプリント配線板の内側の表面の配線スペース１０
３に樹脂５０５を埋め込む。その後、図５（ｃ）に示す
ように、予めバイアホール５０４に未硬化の導電性ペー
スト５０３を埋め込んだプリプレーグ５０２を２枚のプ
リント配線板の間に挟み、図５（ｄ）に示すように、加
熱加圧（温度：１５０〜１８０℃、加圧力２０〜６０kg
/cm2）して、プリプレグ並びに導電性ペーストさらに配
線間スペースに埋め込んだ樹脂がまだ未硬化の場合には
この樹脂もともに硬化させて一体化して４層プリント配
線板を得る。更に多層にするために４層プリント配線板
を２枚同様のプロセスで積層して８層プリント配線板を
得ることもできる。Next, as shown in FIG. 5B, in this step, the wiring space 10 on the inner surface of the two printed wiring boards is formed.
3 is filled with resin 505. Thereafter, as shown in FIG. 5C, a prepreg 502 in which an uncured conductive paste 503 is embedded in via holes 504 in advance is sandwiched between two printed wiring boards, and heated as shown in FIG. 5D. Pressurization (Temperature: 150-180 ° C, Pressure 20-20kg
/ cm 2 ), and when the resin embedded in the prepreg, the conductive paste, and the space between the wirings is not yet cured, the resin is also cured and integrated to obtain a four-layer printed wiring board. In order to further increase the number of layers, two four-layer printed wiring boards can be laminated in the same process to obtain an eight-layer printed wiring board.
【００３２】図４並びに図５の積層と同時に上下の電極
（配線）を電気的に接続する方法はアラミド不織布を補
強材にしてエポキシ樹脂を含浸したアラミドエポキシプ
リプレーグを用いれば容易に実現できる。また、最初に
用意する図４の実施例のコアー基板や図５の実施例の２
枚の両面プリント配線板もアラミドプリプレーグを用い
たスタック方式で作られたプリント配線板であるとスル
ーホールのあなを埋めたりする手間が省けるという利点
がある。The method of electrically connecting the upper and lower electrodes (wiring) simultaneously with the lamination of FIGS. 4 and 5 can be easily realized by using an aramid epoxy prepreg impregnated with an epoxy resin using an aramid nonwoven fabric as a reinforcing material. The core substrate of the embodiment of FIG. 4 prepared first and the core substrate of the embodiment of FIG.
When the two double-sided printed wiring boards are also printed wiring boards made by a stack method using aramid prepreg, there is an advantage that labor for filling holes in through holes can be omitted.
【００３３】本発明の予め配線間スペースに樹脂を埋め
込んでおく方法はアラミドプリプレーグを使うスタック
法において特に有効である。スタック法の場合は導電性
ペーストによりバイアホール接続を行っているので、加
熱加圧時に導電性ペーストが動かないように含浸したエ
ポキシ樹脂があまり流動しない物を使用する。そのため
にパターンの細かい部分に樹脂が回り込みにくい傾向が
ある。したがって、予めパターンの細かい部分に樹脂を
埋め込んで置くことにより著しく絶縁劣化特性を向上さ
せることができる。The method of embedding the resin in the space between the wirings in advance according to the present invention is particularly effective in the stacking method using aramid prepreg. In the case of the stack method, the via hole connection is performed using a conductive paste, so that an epoxy resin impregnated so as not to flow so much that the conductive paste does not move when heated and pressed is used. Therefore, there is a tendency that the resin does not easily flow into a fine portion of the pattern. Therefore, by embedding a resin in a fine portion of the pattern in advance, the insulation deterioration characteristics can be remarkably improved.
【００３４】[0034]
【発明の効果】以上説明したように、本発明によれば、
多層に重ねるときに問題となる凸凹を緩和することがで
きるばかりでなく、パターンが微細になっても絶縁劣化
が起こらない多層プリント配線板を得ることができる。As described above, according to the present invention,
It is possible to not only relieve the unevenness which becomes a problem when superimposing in a multilayer, but also to obtain a multilayer printed wiring board in which insulation deterioration does not occur even if the pattern becomes fine.
【００３５】また本発明の多層プリント配線板の製造方
法によれば、前記多層プリント配線板を効率よく合理的
に製造することができる。According to the method for manufacturing a multilayer printed wiring board of the present invention, the multilayer printed wiring board can be efficiently and rationally manufactured.
【図１】 （ａ）〜（ｆ）は、本発明の実施の形態１の
ビルドアップ方式の多層プリント配線板の製造方法を示
す工程断面図。FIGS. 1A to 1F are process cross-sectional views illustrating a method of manufacturing a build-up type multilayer printed wiring board according to Embodiment 1 of the present invention.
【図２】 本発明の実施の形態１の配線間スペースにス
キージで樹脂を埋め込む方法を示す断面図。FIG. 2 is a cross-sectional view showing a method of embedding a resin with a squeegee in a space between wirings according to the first embodiment of the present invention.
【図３】 （ａ）〜（ｇ）は、本発明の実施の形態２の
ビルドアップ方式多層プリント配線板の製造方法を示す
工程断面図。FIGS. 3A to 3G are process cross-sectional views illustrating a method of manufacturing a build-up type multilayer printed wiring board according to Embodiment 2 of the present invention.
【図４】 （ａ）〜（ｅ）は、本発明の実施の形態３の
スタック方式多層プリント配線板の製造方法を示す工程
断面図。FIGS. 4A to 4E are process cross-sectional views illustrating a method for manufacturing a stacked multilayer printed wiring board according to Embodiment 3 of the present invention.
【図５】 （ａ）〜（ｄ）は、本発明の実施の形態４の
スタック方式プリント配線板の製造方法を示す工程断面
図。FIGS. 5A to 5D are process cross-sectional views illustrating a method of manufacturing a stacked printed wiring board according to Embodiment 4 of the present invention.
１０１ プリント配線板 １０２ 配線 １０３ 配線間スペース １０４ 樹脂 １０５ 樹脂絶縁体 １０６ バイアホール １０７ 導体箔 １０８ 配線 １０９ 配線間スペース ２０１ スキージ ２０２ 配線 ３０１ 導体箔 ４０１ 導体箔 ４０２ 導電性ペーストを埋め込んだプリプレーグ ４０３ 導電性ペースト ４０４ バイアホール ４０５ 配線 ５０１ プリント配線板 ５０２ プリプレーグ ５０３ 導電性ペースト ５０４ バイアホール ５０５ 樹脂 Reference Signs List 101 printed wiring board 102 wiring 103 wiring space 104 resin 105 resin insulator 106 via hole 107 conductive foil 108 wiring 109 wiring space 201 squeegee 202 wiring 301 conductive foil 401 conductive foil 402 prepreg 403 conductive paste embedded conductive paste 404 Via hole 405 Wiring 501 Printed wiring board 502 Prepreg 503 Conductive paste 504 Via hole 505 Resin
Claims (16)
配線間スペースに樹脂が埋め込まれ、その上に樹脂絶縁
体と配線が積層されている多層プリント配線板。1. A multilayer printed wiring board in which a resin is buried in a space between wirings on a surface layer of a single-layer or multilayer printed wiring board, and a resin insulator and wiring are laminated thereon.
１に記載の多層プリント配線板。2. The multilayer printed wiring board according to claim 1, wherein the resin is partially embedded.
め込まれている請求項１または２に記載の多層プリント
配線板。3. The multilayer printed wiring board according to claim 1, wherein a resin different from the surroundings is embedded in the space between the wirings.
プリント配線板の表層を平坦にした請求項１に記載の多
層プリント配線板。4. The multilayer printed wiring board according to claim 1, wherein the surface of the single-layer or multilayer printed wiring board is made flat by embedding a resin.
に樹脂が埋め込まれた表面に、絶縁体樹脂層が積層さ
れ、かつ前記絶縁体樹脂層に穴が開けられ、その表面に
めっきによる導体箔が形成され、パターンエッチングに
より導体配線が形成されている請求項１に記載の多層プ
リント配線板。5. An insulating resin layer is laminated on a surface of a printed wiring board in which a resin is embedded in an inter-wiring space on a surface layer, and a hole is formed in the insulating resin layer. The multilayer printed wiring board according to claim 1, wherein the conductive wiring is formed by pattern etching.
に樹脂が埋め込まれた表面に、絶縁体樹脂層と導体箔が
張り付けられ、かつビア穴が開けられ、その表面にめっ
きによる導体箔が形成され、パターンエッチングにより
導体配線が形成されている請求項１に記載の多層プリン
ト配線板。6. An insulating resin layer and a conductive foil are stuck on a surface of a printed wiring board in which a resin is embedded in a space between wirings on a surface layer, and a via hole is formed, and a conductive foil is formed on the surface by plating. The multilayer printed wiring board according to claim 1, wherein the conductive wiring is formed by pattern etching.
れたプリント配線板の表面に、ビア穴に導電性ペースト
を埋め込んだプリプレーグと導体箔が張り付けられ、か
つパターンエッチングにより導体配線が形成されている
請求項１に記載の多層プリント配線板。7. A prepreg having conductive paste embedded in via holes and a conductive foil are adhered to a surface of a printed wiring board in which resin is embedded in a space between wirings on a surface layer, and conductive wiring is formed by pattern etching. The multilayer printed wiring board according to claim 1.
族ポリアミド）を補強材とし、これにエポキシ樹脂を含
浸したアラミドエポキシプリプレーグである請求項７に
記載の多層プリント配線板。8. The multilayer printed wiring board according to claim 7, wherein the prepreg is an aramid epoxy prepreg having an aramid fiber (a wholly aromatic polyamide) as a reinforcing material and impregnated with an epoxy resin.
線板を用いて、更に層数の多い多層プリント配線板を作
成する方法において、プリント配線板の表層の配線間ス
ペースに樹脂を埋め込み、その後に樹脂絶縁体と配線を
積層することを特徴とする多層プリント配線板の製造方
法。9. A method for producing a multilayer printed wiring board having a larger number of layers by using a previously prepared single-layer or multilayer printed wiring board, wherein a resin is embedded in a space between wirings on a surface layer of the printed wiring board, and thereafter, A method for manufacturing a multilayer printed wiring board, comprising laminating a resin insulator and a wiring.
脂を埋め込む手段が、スキージによる手段である請求項
１に記載の多層プリント配線板の製造方法。10. The method for manufacturing a multilayer printed wiring board according to claim 1, wherein the means for embedding the resin in the space between the wirings of the printed wiring board is a means using a squeegee.
項９または１０に記載の多層プリント配線板の製造方
法。11. The method for manufacturing a multilayer printed wiring board according to claim 9, wherein the resin is partially embedded.
配線板の表層の配線間スペースに樹脂を埋め込んだ後
に、絶縁体樹脂層を積層し、前記絶縁体樹脂層に穴を開
け、その上にめっきによる導体箔を形成し、パターンエ
ッチングして導体配線を形成する請求項９，１０または
１１に記載の多層プリント配線板の製造方法。12. After a resin is buried in a space between wirings on a surface layer of a single-layer or multilayer printed wiring board prepared in advance, an insulating resin layer is laminated, holes are formed in the insulating resin layer, and plating is performed thereon. The method for manufacturing a multilayer printed wiring board according to claim 9, wherein a conductive foil is formed by using the method and the conductive wiring is formed by pattern etching.
配線板の表層の配線間スペースに樹脂を埋め込んだ後
に、絶縁体樹脂層と導体箔を張り付け、ビア穴を開け、
めっきによる導体箔を形成し、パターンエッチングして
導体配線を形成する請求項９，１０または１１に記載の
多層プリント配線板の製造方法。13. After a resin is embedded in a space between wirings on a surface layer of a single-layer or multilayer printed wiring board prepared in advance, an insulating resin layer and a conductive foil are attached, and a via hole is formed.
The method for manufacturing a multilayer printed wiring board according to claim 9, wherein a conductive foil is formed by plating, and the conductive wiring is formed by pattern etching.
配線板の表層の配線間スペースに樹脂を埋め込んだ後
に、あらかじめビア穴に導電性ペーストを埋め込んだプ
リプレーグと導体箔を張り付け、パターンエッチングし
て導体配線を形成する請求項９，１０または１１に記載
の多層プリント配線板の製造方法。14. After a resin is buried in a space between wirings on a surface layer of a single-layer or multilayer printed wiring board prepared in advance, a pre-preg in which a conductive paste is buried in a via hole and a conductive foil are pasted, and pattern etching is performed. The method for manufacturing a multilayer printed wiring board according to claim 9, wherein the wiring is formed.
プリント配線板の表層の配線間スペースに樹脂を埋め込
んだ後に、各プリント配線板の間にあらかじめビア穴に
導電性ペーストを埋め込んだプリプレーグを挟み、加熱
加圧する請求項９，１０または１１に記載の多層プリン
ト配線板の製造方法。15. After a resin is embedded in a space between wirings on a surface layer of a plurality of single-layer or multilayer printed wiring boards prepared in advance, a prepreg in which a conductive paste is embedded in a via hole in advance is sandwiched between the printed wiring boards. The method for producing a multilayer printed wiring board according to claim 9, wherein the heating and pressurizing are performed.
としエポキシ樹脂を含浸したアラミドエポキシプリプレ
ーグである請求項１５に記載の多層プリント配線板の製
造方法。16. The method for producing a multilayer printed wiring board according to claim 15, wherein the prepreg is an aramid epoxy prepreg impregnated with an epoxy resin using aramid fibers as a reinforcing material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20951196A JP3230727B2 (en) | 1996-08-08 | 1996-08-08 | Multilayer printed wiring board and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20951196A JP3230727B2 (en) | 1996-08-08 | 1996-08-08 | Multilayer printed wiring board and method of manufacturing the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH1056267A true JPH1056267A (en) | 1998-02-24 |
| JP3230727B2 JP3230727B2 (en) | 2001-11-19 |
Family
ID=16574014
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20951196A Expired - Fee Related JP3230727B2 (en) | 1996-08-08 | 1996-08-08 | Multilayer printed wiring board and method of manufacturing the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3230727B2 (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1168901A2 (en) * | 2000-06-24 | 2002-01-02 | rotra Leiterplatten Produktions- und Vetriebs-GmbH | Multilayer printed circuit board laminate and process for manufacturing the same |
| EP1180921A2 (en) * | 2000-08-17 | 2002-02-20 | Matsushita Electric Industrial Co., Ltd. | Multi-layer circuit board and method of manufacturing the same |
| JP2002185142A (en) * | 2000-12-19 | 2002-06-28 | Ibiden Co Ltd | Multilayer printed wiring board and its manufacturing method |
| EP1180920A3 (en) * | 2000-08-17 | 2005-12-07 | Matsushita Electric Industrial Co., Ltd. | Circuit board and method of manufacturing same |
| JP2005353660A (en) * | 2004-06-08 | 2005-12-22 | Shinko Seisakusho:Kk | Multilayer printed circuit board and its manufacturing method |
| JP2006295207A (en) * | 2006-06-22 | 2006-10-26 | Matsushita Electric Ind Co Ltd | Method of manufacturing circuit board |
-
1996
- 1996-08-08 JP JP20951196A patent/JP3230727B2/en not_active Expired - Fee Related
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1168901A2 (en) * | 2000-06-24 | 2002-01-02 | rotra Leiterplatten Produktions- und Vetriebs-GmbH | Multilayer printed circuit board laminate and process for manufacturing the same |
| EP1168901A3 (en) * | 2000-06-24 | 2003-03-26 | rotra Leiterplatten Produktions- und Vetriebs-GmbH | Multilayer printed circuit board laminate and process for manufacturing the same |
| EP1180921A2 (en) * | 2000-08-17 | 2002-02-20 | Matsushita Electric Industrial Co., Ltd. | Multi-layer circuit board and method of manufacturing the same |
| EP1180921A3 (en) * | 2000-08-17 | 2005-12-07 | Matsushita Electric Industrial Co., Ltd. | Multi-layer circuit board and method of manufacturing the same |
| EP1180920A3 (en) * | 2000-08-17 | 2005-12-07 | Matsushita Electric Industrial Co., Ltd. | Circuit board and method of manufacturing same |
| US6993836B2 (en) | 2000-08-17 | 2006-02-07 | Matsushita Electric Industrial Co., Ltd. | Circuit board and method of manufacturing same |
| JP2002185142A (en) * | 2000-12-19 | 2002-06-28 | Ibiden Co Ltd | Multilayer printed wiring board and its manufacturing method |
| JP2005353660A (en) * | 2004-06-08 | 2005-12-22 | Shinko Seisakusho:Kk | Multilayer printed circuit board and its manufacturing method |
| JP2006295207A (en) * | 2006-06-22 | 2006-10-26 | Matsushita Electric Ind Co Ltd | Method of manufacturing circuit board |
| JP4622939B2 (en) * | 2006-06-22 | 2011-02-02 | パナソニック株式会社 | Circuit board manufacturing method |
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|---|---|
| JP3230727B2 (en) | 2001-11-19 |
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