JP3230727B2 - Multilayer printed wiring board and method of manufacturing the same - Google Patents
Multilayer printed wiring board and method of manufacturing the sameInfo
- Publication number
- JP3230727B2 JP3230727B2 JP20951196A JP20951196A JP3230727B2 JP 3230727 B2 JP3230727 B2 JP 3230727B2 JP 20951196 A JP20951196 A JP 20951196A JP 20951196 A JP20951196 A JP 20951196A JP 3230727 B2 JP3230727 B2 JP 3230727B2
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- wiring board
- resin
- prepreg
- multilayer printed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、多層プリント配線
板及びその製造方法に関する。さらに詳しくは、湿度に
よる絶縁劣化を防止し、また多層積層を容易にするプリ
ント配線板及びその製造方法に関する。The present invention relates to a multilayer printed wiring board and a method for manufacturing the same. More specifically, the present invention relates to a printed wiring board that prevents insulation deterioration due to humidity and facilitates multilayer lamination, and a method for manufacturing the same.
【０００２】[0002]
【従来の技術】電子機器の小型化が急速に進むにつれ、
プリント配線板は益々高密度であることが要求されてい
る。高密度化のために益々多層化と配線の微細化が進め
られている。従来、精々６層でピン間３本の線（0.3mm
ピッチの配線）で良かったものが、現在では８層から１
０層でピン間５本（0.2mmピッチの配線）のスペックが
要求され、さらには0.1mmピッチも要求され始めてい
る。2. Description of the Related Art As the miniaturization of electronic devices progresses rapidly,
Printed wiring boards are required to be increasingly dense. In order to increase the density, more layers and finer wiring are being promoted. Conventionally, at most 6 layers, 3 lines between pins (0.3mm
Pitch wiring), but now 8 layers to 1
Specs of five layers (interconnects with a pitch of 0.2 mm) between the pins in the 0 layer are required, and a 0.1 mm pitch is beginning to be required.
【０００３】多層の方法は幾つかある。それらは、下記
の方法等が代表的である。 （１）従来からの方法で両面板をプリプレグ間に挟んで
加圧加熱し、プリプレグの樹脂が硬化した後、スルーホ
ールで層間の電気的接続を取るスルーホール方法。 （２）コアーである両面または多層基板に絶樹体脂縁層
を積層し、この絶縁体樹脂層にビア穴を開けた後に、め
っきにより銅箔層を形成し、エッチングして配線層を重
ねて行くビルドアップ方法。 （３）コアーである両面または多層基板に、導電性ペー
ストをバイアホールに埋め込んだプリプレグと銅箔を重
ね加圧加熱して接着した後に、表層銅箔をエッチングし
て配線層を重ねて行くスタック方式。There are several multi-layer methods. The following methods are typical. (1) A through-hole method in which a double-sided board is sandwiched between prepregs and pressurized and heated by a conventional method, and after the resin of the prepreg is cured, electrical connection between the layers is established through the through-holes. (2) Laminate an insulating layer on a double-sided or multilayer substrate as a core, form a via hole in the insulating resin layer, form a copper foil layer by plating, and etch to laminate a wiring layer. How to build up. (3) A stack in which a prepreg in which a conductive paste is embedded in a via hole and a copper foil are overlaid on a double-sided or multilayer substrate as a core and adhered by heating under pressure, and then the surface copper foil is etched and a wiring layer is overlaid. method.
【０００４】配線の微細化には配線銅箔の厚みを薄くし
たり、エッチング方法を工夫するなどが一般に行われて
いる。[0004] In order to miniaturize the wiring, generally, the thickness of the wiring copper foil is reduced, or an etching method is devised.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、上記の
多層化と微細化には幾つかの問題があった。即ち、 （１）配線層を重ねて行くとき、下の配線層の凸凹が表
層に現れ、微細な配線を形成する障害になる。 （２）絶縁体樹脂層を重ねるとき下の配線層の微細なパ
ターンがあるために、また塵埃等のために微細な部分に
樹脂が入り込みにくく、絶縁性の劣化をきたすことが多
くなる。等の課題があった。However, there are several problems with the above-mentioned multilayering and miniaturization. That is, (1) when wiring layers are stacked, unevenness of a lower wiring layer appears on a surface layer, which is an obstacle to forming fine wiring. (2) When the insulating resin layer is overlaid, the fine pattern of the lower wiring layer is present, and it is difficult for the resin to enter the fine portion due to dust and the like, and the insulating property often deteriorates. And other issues.
【０００６】本発明は、前記従来の問題を解決するた
め、スルーホール方式、ビルドアップ方式、スタック方
式等の多層プリント配線板において、多層に重ねるとき
に問題となる凸凹の発生を防止するかまたは緩和し、さ
らにパターンが微細になっても絶縁劣化を起こしにくい
多層プリント配線板及びその製造方法を提供することを
目的とする。SUMMARY OF THE INVENTION The present invention solves the above-mentioned conventional problems by preventing the occurrence of unevenness which is a problem when a multilayer printed wiring board of a through-hole type, a build-up type, a stack type or the like is stacked in multiple layers. It is an object of the present invention to provide a multilayer printed wiring board which is less likely to cause insulation deterioration even if the pattern becomes finer and the pattern becomes finer, and a method for manufacturing the same.
【０００７】[0007]
【課題を解決するための手段】前記目的を達成するた
め、本発明の多層プリント配線板は、プリント配線板の
表層の配線間スペースに前記配線の厚みと平坦になるよ
うに樹脂が埋め込まれ、前記配線面側に、ビア穴に導電
性ペーストが埋め込まれたプリプレグが積層され、その
表面に導体配線が積層されて一体化され、前記導体配線
と前記プリント配線基板の表層の配線とが前記導電性ペ
ーストによって前記プリント基板の厚さ方向に電気的に
接続されているという構成を備えたものである。In order to achieve the above object, a multilayer printed wiring board according to the present invention has a thickness equal to the thickness of the wiring in a space between wirings on a surface layer of the printed wiring board .
Uni resin is embedded, in the wiring side, the conductive vias holes
Pre-preg embedded with conductive paste is laminated,
The conductor wiring is laminated and integrated on the surface,
And the wiring on the surface layer of the printed wiring board are the conductive pen.
Electrically in the thickness direction of the printed circuit board.
It has a configuration of being connected .
【０００８】前記多層プリント配線板においては、樹脂
の埋め込みが、部分的であってもよい。また、配線間ス
ペースに周辺と異なる樹脂が埋め込まれていてもよい。[0008] In the multilayer printed wiring board, the resin may be partially embedded. Further, a resin different from the surroundings may be embedded in the space between the wirings.
【０００９】また、前記多層プリント配線板において
は、プリプレグが、アラミド繊維（全芳香族ポリアミ
ド）を補強材とし、これにエポキシ樹脂を含浸したアラ
ミドエポキシプリプレグであることが好ましい。In the multilayer printed wiring board, it is preferable that the prepreg is an aramid epoxy prepreg in which aramid fibers (wholly aromatic polyamide) are used as a reinforcing material and impregnated with an epoxy resin.
【００１０】また、前記多層プリント配線板において
は、プリプレグがアラミド繊維を補強材としエポキシ樹
脂を含浸したアラミドエポキシプリプレグであることが
好ましい。In the multilayer printed wiring board, the prepreg is preferably an aramid epoxy prepreg impregnated with an epoxy resin using aramid fibers as a reinforcing material.
【００１１】次に本発明の多層プリント配線板の第１番
目の製造方法は、予め作成した単層または多層プリント
配線板の表層の配線間スペースに前記配線の厚みと平坦
になるように樹脂を埋め込んだ後に、あらかじめビア穴
に導電性ペーストを埋め込んだプリプレグと導体箔を貼
り付け一体化して前記配線と前記導体箔とを前記導電性
ペーストにより前記プリント配線板の厚さ方向に電気的
に接続し、その後前記導体箔をパターンエッチングして
導体配線を形成することを特徴とする。Next, the first of the multilayer printed wiring boards of the present invention
The manufacturing method of the eye is that the thickness of the wiring and the flatness of the wiring are set in the space between the wirings on the surface layer of the single-layer or multilayer printed wiring board prepared in advance.
After embedding the resin so that, adhered prepregs and conductor foils embedded a conductive paste in advance via hole
The wiring and the conductor foil are integrated with the conductive
Electricity is applied in the thickness direction of the printed wiring board by the paste.
Then, the conductor foil is pattern-etched to form conductor wiring.
【００１２】次に本発明の多層プリント配線板の第２番
目の製造方法は、予め作成した複数枚の単層または多層
プリント配線板の表層の配線間スペースに前記配線の厚
みと平坦になるように樹脂を埋め込んだ後に、各プリン
ト配線板の間にあらかじめビア穴に導電性ペーストを埋
め込んだプリプレグを挟み、加熱加圧して一体化し前記
プリプレグの上下の配線を前記導電性ペーストにより前
記プリント配線基板の厚さ方向に電気的に接続すること
を特徴とする。 Next, the second aspect of the multilayer printed wiring board of the present invention will be described.
The manufacturing method of the eye is that the thickness of the wiring is set in a space between the wirings on the surface layer of a plurality of single-layer or multilayer printed wiring boards prepared in advance.
After embedding the resin so that it is flat and flat, sandwich the prepreg in which the conductive paste is embedded in the via holes in advance between the printed wiring boards, and integrate by heating and pressurizing, and the upper and lower wiring of the prepreg are mixed with the conductive paste. Previous
It is characterized in that it is electrically connected in the thickness direction of the printed wiring board .
【００１３】前記第１〜２番目の製造方法においては、
プリント配線板の配線間スペースに樹脂を埋め込む手段
が、スキージによる手段であることが好ましい。スキー
ジを用いると、配線間スペースに樹脂を埋め込むことが
効率良くできるからである。In the first and second manufacturing methods,
The means for embedding the resin in the space between the wirings of the printed wiring board is preferably a means using a squeegee. This is because, when a squeegee is used, resin can be efficiently embedded in the space between wirings.
【００１４】また前記第１〜２番目の製造方法において
は、樹脂の埋め込みが、部分的であることが好ましい。In the first and second manufacturing methods, it is preferable that the resin is partially embedded.
【００１５】また前記第１〜２番目の製造方法において
は、配線間スペースに周辺と異なる樹脂が埋め込まれて
いることが好ましい。In the first and second manufacturing methods, it is preferable that a resin different from the surroundings is buried in the space between the wirings.
【００１６】また前記第１〜２番目の製造方法において
は、プリプレグが、アラミド繊維（全芳香族ポリアミ
ド）を補強材とし、これにエポキシ樹脂を含浸したアラ
ミドエポキシプリプレグであることが好ましい。In the first and second production methods, it is preferable that the prepreg is an aramid epoxy prepreg in which aramid fibers (wholly aromatic polyamide) are used as a reinforcing material and impregnated with an epoxy resin.
【００１７】前記第１〜２番目の製造方法においては、
プリプレグがアラミド繊維を補強材としエポキシ樹脂を
含浸したアラミドエポキシプリプレグであることが好ま
しい。In the first and second manufacturing methods,
It is preferable that the prepreg is an aramid epoxy prepreg using an aramid fiber as a reinforcing material and impregnated with an epoxy resin.
【００１８】以上のとおり本発明によれば、配線層の凸
凹が平坦化され積層が容易になるとともに、かつ微細に
なっても絶縁劣化をきたさないプリント配線板が得られ
る。As described above, according to the present invention, it is possible to obtain a printed wiring board in which the unevenness of the wiring layer is flattened and the lamination is facilitated, and the insulation is not deteriorated even if it becomes fine.
【００１９】[0019]
【発明の実施の形態】以下、本発明の実施の形態につい
て、図面に基づいて説明する。Embodiments of the present invention will be described below with reference to the drawings.
【００２０】（比較例１） 図１（ａ）〜（ｆ）は比較例によるビルドアップ基板の
製造プロセスを示す。図１（ａ）は、基板の表面に配線
１０２(通常銅配線）がある片 面基板（単層プリント配
線板）１０１である。プリント配線板１０１は通常ガラ
スエポキシ基材や紙フェノール基材またはポリイミド基
材等を用いることができる。これに加えて最近提案され
ているアラミド基材も好ましく使用できる。従来のビル
ドアップ基板の製造プロセスでは、この配線の上に絶縁
体樹脂層をコーティングするか張り付け積層してバイア
ホールを開けるのであるが、本発明のプロセスでは図１
（ｂ）のように、配線間スペース１０３に樹脂１０４を
前以て埋め込んでおく。この樹脂はプリント配線板１０
１や次に積層する絶縁体樹脂の材料と異なっていてもよ
いし、同一でもよい。しかし、埋め込み時に粘度が低い
ほうが配線間スペースに埋まりやすい。従って埋め込み
用の樹脂は粘度調整用に溶剤を含ませることが多い。 Comparative Example 1 FIGS. 1A to 1F show a manufacturing process of a build-up substrate according to a comparative example . FIG. 1A shows a single-sided substrate (single-layer printed wiring board) 101 having a wiring 102 (usually a copper wiring) on the surface of the substrate. As the printed wiring board 101, a glass epoxy substrate, a paper phenol substrate, a polyimide substrate, or the like can be generally used. In addition, the recently proposed aramid substrate can also be preferably used. In a conventional build-up board manufacturing process, a via hole is formed by coating or laminating an insulating resin layer on the wiring.
As shown in (b), a resin 104 is embedded in the inter-wiring space 103 in advance. This resin is printed wiring board 10
The material may be different from or the same as that of the first or next insulating resin. However, the lower the viscosity at the time of embedding, the easier it is to bury the space between the wirings. Therefore, the resin for embedding often contains a solvent for adjusting the viscosity.
【００２１】図２に示すようにスキージ２０１を用い
て、配線１０２上をなぞって樹脂２０２を配線間スペー
スに埋め込むのが簡単である。この際、配線表面に樹脂
絶縁体が残ることがあるが、後の工程からわかるように
問題ではない。溶剤を乾燥させた後、または樹脂を硬化
させた後は、従来のビルドアップ法と同一であり、図１
（ｃ）に示すように、樹脂絶縁体１０５をコーティング
または張り付けて(好ましくは加圧加熱して）積層す
る。前記において、好ましい条件は、樹脂がエポキシ樹
脂の場合、温度：１５０〜１８０℃、加圧力２０〜６０
kg/cm2である。As shown in FIG. 2, it is easy to trace the wiring 102 using the squeegee 201 and embed the resin 202 in the space between the wirings. At this time, a resin insulator may remain on the wiring surface, but this is not a problem as will be understood from a later step. After the solvent is dried or the resin is cured, it is the same as the conventional build-up method.
As shown in (c), the resin insulator 105 is laminated by coating or pasting (preferably by heating under pressure). In the above, preferable conditions are as follows: when the resin is an epoxy resin, the temperature is 150 to 180 ° C., and the pressure is 20 to 60.
kg / cm 2 .
【００２２】積層する絶縁体樹脂並びに埋め込み用樹脂
はエポキシ樹脂が好ましい。この際、既に配線間スペー
スは埋められて凸凹が少なくなっているために、その後
の処理（例えば積層など）が容易である。The insulating resin and the filling resin to be laminated are preferably epoxy resins. At this time, since the space between the wirings has already been filled and the unevenness has been reduced, subsequent processing (for example, lamination) is easy.
【００２３】その後、図１（ｄ）に示すように、バイア
ホール１０６を形成する。このバイアホールはレーザま
たは樹脂絶縁体が感光性の場合にはフォトエッチング法
等により形成する。Thereafter, as shown in FIG. 1D, a via hole 106 is formed. This via hole is formed by a photo-etching method or the like when the laser or the resin insulator is photosensitive.
【００２４】次に図１（ｅ）に示すように、配線導体と
なる導体箔１０７（通常は銅）をめっきなどにより積層
し、図１（ｆ）に示すように、エッチングして配線１０
８を形成する。更に配線を重ねる場合は、配線１０８の
間の配線間スペース１０９に樹脂を埋め込んでプロセス
図１（ｂ）から（ｆ）を繰り返す。このとき配線間スペ
ースは図１（ｂ）の工程で埋められるために、出来上が
る表層の凸凹は従来法に比較して緩和される。Next, as shown in FIG. 1E, a conductor foil 107 (usually copper) serving as a wiring conductor is laminated by plating or the like, and as shown in FIG.
8 is formed. In the case where wirings are further overlapped, resin is buried in the space 109 between the wirings 108 and the process diagrams 1 (b) to 1 (f) are repeated. At this time, since the space between the wirings is filled in the process of FIG. 1B, the resulting unevenness of the surface layer is reduced as compared with the conventional method.
【００２５】配線間スペースに樹脂を埋め込む際に、基
板全面に埋め込む必要は無い。微細配線のところのみ部
分的に樹脂を埋め込むことが可能で、全面に樹脂を埋め
込むのに比較して簡単でコストが安くなる。絶縁劣化対
策にはこれで十分である。When embedding the resin in the space between the wirings, it is not necessary to embed the resin over the entire surface of the substrate. It is possible to partially embed the resin only in the fine wiring, which is simpler and less expensive than embedding the resin in the entire surface. This is sufficient for insulation deterioration countermeasures.
【００２６】埋め込み用の樹脂は、特別に選択されるこ
とが好ましい。プリント配線板１０１の材料や絶縁体樹
脂は、配線材料との接着力や吸湿性や難燃性等プリント
基板としての特性を維持するために、厳しい条件が課せ
られている。しかし、埋め込み用の樹脂にはそのような
特性をすべて満足させる必要もなく、埋め込みが容易で
（粘度が適当で、例えば５００〜３０００ポイズ）、接
着力が強ければ使える。最も、絶縁性を劣化させる原因
である不純物イオン等の含有量が少ないことや、吸湿が
少ないほうが好ましい。したがって配線間スペースに埋
め込む樹脂は、周辺の樹脂（前記プリント配線板の樹脂
並びに絶縁体樹脂）と異なっていてもよい。もちろん同
一の樹脂も使用できる。It is preferable that the resin for embedding is specifically selected. Strict conditions are imposed on the material of the printed wiring board 101 and the insulating resin in order to maintain the properties as a printed circuit board, such as adhesive strength with the wiring material, moisture absorption, and flame retardancy. However, the embedding resin does not need to satisfy all of these characteristics, and can be used if the embedding is easy (appropriate viscosity, for example, 500 to 3000 poise) and adhesion is strong. It is most preferable that the content of impurity ions or the like which cause the deterioration of the insulating property is small and that the moisture absorption is small. Therefore, the resin to be embedded in the space between the wirings may be different from the surrounding resin (the resin of the printed wiring board and the insulating resin). Of course, the same resin can be used.
【００２７】前記のように予め埋め込みやすい樹脂を埋
め込むことにより、配線が微細になったときに配線間に
ゴミが存在していても、ゴミを包み込んでしまうために
絶縁劣化の問題が著しく改善される。By embedding a resin which is easy to be embedded in advance as described above, even if dust is present between the wires when the wires become fine, the problem of insulation deterioration is remarkably improved because the dust is wrapped around. You.
【００２８】図１（ａ）に示す基板は片面でも両面でも
よいことは明かである。両面に上記プロセスをそれぞれ
一回施せば、４層基板を得ることができる。It is clear that the substrate shown in FIG. 1A may have one side or both sides. By performing the above process once on each side, a four-layer substrate can be obtained.
【００２９】（比較例２） 次に図３（ａ）〜（ｅ）は、前記図１で説明した比較例
１のなかで少し触れたが、絶縁体樹脂層付きの銅箔を張
り付ける多層基板の製造プロセスを示す。前記比較例１
に比較して、図１（ｃ）に相当する工程以降の積層工程
が異なるのみである。スキージ等で配線間スペースに樹
脂を埋め込んだ後に、図３（ｃ）に示すように、未硬化
の絶縁体樹脂をコーティングした導体箔３０１を、図３
（ｄ）に示すように、加熱加圧（温度：１５０〜１８０
℃、加圧力２０〜６０kg/cm2）して積層接着する。次に
図３（ｅ）に示すように、バイアホールとなるべき位置
に導体箔に穴を開け（例えばフォトリソとエッチングに
よる）、露出した樹脂をレーザまたはプラズマまたは化
学エッチングで下の配線表面まで穴を開ける。次に図３
（ｆ）に示すように、バイアホール接続のために導体箔
１０７をめっきなどにより積層し、図３（ｇ）に示すよ
うに、エッチングして配線１０８を形成する。( Comparative Example 2 ) Next, FIGS. 3 (a) to 3 (e) are briefly mentioned in Comparative Example 1 described with reference to FIG. 1 shows a manufacturing process of a substrate. Comparative Example 1
Only the laminating process after the process corresponding to FIG. After the resin is buried in the space between the wirings with a squeegee or the like, as shown in FIG.
As shown in (d), heating and pressing (temperature: 150 to 180
C. and a pressure of 20 to 60 kg / cm 2 ) for laminating and bonding. Next, as shown in FIG. 3 (e), a hole is made in the conductive foil at a position to be a via hole (for example, by photolithography and etching), and the exposed resin is removed by laser, plasma or chemical etching to a wiring surface below. Open. Next, FIG.
As shown in FIG. 3F, a conductor foil 107 is laminated by plating or the like for via hole connection, and as shown in FIG. 3G, the wiring 108 is formed by etching.
【００３０】（実施の形態１） 図４は本発明の一実施の形態によるスタック方式の多層
プリント配線板の製造プロセスを示す。前記比較例２に
比較して図３（ｃ）に相当する工程以降の積層工程が異
なる。スキージ等で配線間スペースに樹脂を埋め込んだ
後に、図４（ｃ）に示すように、予めバイアホール４０
４に未硬化の導電性ペースト４０３を埋め込んだプリプ
レグ４０２と導体箔４０１を基板の上に重ね、図４
（ｄ）に示すように、加熱加圧（温度：１５０〜１８０
℃、加圧力２０〜６０kg/cm2）してプリプレグ並びに導
電性ペーストさらに配線間スペースに埋め込んだ樹脂
が、まだ未硬化の場合にはこの樹脂もともに硬化して一
体化する。その後、図４（ｅ）に示すように、表層の導
体箔をエッチングして配線４０５を形成する。プリプレ
グとしてアラミド不織布を補強材にしてエポキシ樹脂を
含浸したアラミドエポキシプリプレグを用いれば容易に
実現できる。(Embodiment 1 ) FIG. 4 shows a manufacturing process of a stacked multilayer printed wiring board according to an embodiment of the present invention. The laminating process after the process corresponding to FIG. 3C differs from the comparative example 2. After resin is embedded in the space between the wirings with a squeegee or the like, as shown in FIG.
4, a prepreg 402 in which an uncured conductive paste 403 is embedded and a conductive foil 401 are overlapped on a substrate.
As shown in (d), heating and pressing (temperature: 150 to 180
C., a pressure of 20 to 60 kg / cm 2 ), and the resin embedded in the prepreg, the conductive paste, and the space between the wirings, if not yet cured, is also cured and integrated. Thereafter, as shown in FIG. 4E, the conductor foil on the surface layer is etched to form the wiring 405. It can be easily realized by using an aramid epoxy prepreg impregnated with an epoxy resin using an aramid nonwoven fabric as a reinforcing material as the prepreg.
【００３１】（実施の形態２） 図５（ａ）〜（ｄ）は本発明の別のスタック方式の多層
プリント配線板の製造製造プロセスを示す。図５（ａ）
に示すように、この実施例では２枚の両面プリント配線
板５０１を用いている。両面プリント配線板の表裏の配
線を接続するバイアホール５０４は導電性ペーストで埋
められていてもよいし、通常貫通スルーホールで穴が埋
められている物でもよい。(Embodiment 2 ) FIGS. 5 (a) to 5 (d) show another manufacturing process of a multilayer printed wiring board of a stack type according to the present invention. FIG. 5 (a)
As shown in FIG. 7, in this embodiment, two double-sided printed wiring boards 501 are used. The via hole 504 connecting the wiring on the front and back of the double-sided printed wiring board may be filled with a conductive paste, or may be a hole whose hole is usually filled with a through hole.
【００３２】次に図５（ｂ）に示すように、この工程で
２枚のプリント配線板の内側の表面の配線スペース１０
３に樹脂５０５を埋め込む。その後、図５（ｃ）に示す
ように、予めバイアホール５０４に未硬化の導電性ペー
スト５０３を埋め込んだプリプレグ５０２を２枚のプリ
ント配線板の間に挟み、図５（ｄ）に示すように、加熱
加圧（温度：１５０〜１８０℃、加圧力２０〜６０kg/c
m2）して、プリプレグ並びに導電性ペーストさらに配線
間スペースに埋め込んだ樹脂がまだ未硬化の場合にはこ
の樹脂もともに硬化させて一体化して４層プリント配線
板を得る。更に多層にするために４層プリント配線板を
２枚同様のプロセスで積層して８層プリント配線板を得
ることもできる。Next, as shown in FIG. 5B, in this step, the wiring space 10 on the inner surface of the two printed wiring boards is formed.
3 is filled with resin 505. Thereafter, as shown in FIG. 5C, a prepreg 502 in which an uncured conductive paste 503 is embedded in via holes 504 in advance is sandwiched between two printed wiring boards, and as shown in FIG. Pressurization (Temperature: 150-180 ° C, Pressure 20-20kg / c
m 2 ) Then, if the resin embedded in the prepreg, the conductive paste, and the space between the wirings is not yet cured, the resin is also cured and integrated to obtain a four-layer printed wiring board. In order to further increase the number of layers, two four-layer printed wiring boards can be laminated in the same process to obtain an eight-layer printed wiring board.
【００３３】図４並びに図５の積層と同時に上下の電極
（配線）を電気的に接続する方法はアラミド不織布を補
強材にしてエポキシ樹脂を含浸したアラミドエポキシプ
リプレグを用いれば容易に実現できる。また、最初に用
意する図４の実施例のコアー基板や図５の実施例の２枚
の両面プリント配線板もアラミドプリプレグを用いたス
タック方式で作られたプリント配線板であるとスルーホ
ールのあなを埋めたりする手間が省けるという利点があ
る。The method of electrically connecting the upper and lower electrodes (wirings) simultaneously with the lamination of FIGS. 4 and 5 can be easily realized by using an aramid epoxy prepreg impregnated with an epoxy resin using an aramid nonwoven fabric as a reinforcing material. Also, the core board of the embodiment of FIG. 4 and the two double-sided printed wiring boards of the embodiment of FIG. 5 which are prepared first are printed wiring boards made by a stack method using aramid prepreg. There is an advantage that the trouble of filling in can be omitted.
【００３４】本発明の予め配線間スペースに樹脂を埋め
込んでおく方法はアラミドプリプレグを使うスタック法
において特に有効である。スタック法の場合は導電性ペ
ーストによりバイアホール接続を行っているので、加熱
加圧時に導電性ペーストが動かないように含浸したエポ
キシ樹脂があまり流動しない物を使用する。そのために
パターンの細かい部分に樹脂が回り込みにくい傾向があ
る。したがって、予めパターンの細かい部分に樹脂を埋
め込んで置くことにより著しく絶縁劣化特性を向上させ
ることができる。The method of embedding resin in the space between wirings of the present invention is particularly effective in a stack method using aramid prepreg. In the case of the stack method, the via hole connection is performed using a conductive paste, so that an epoxy resin impregnated so as not to flow so much that the conductive paste does not move when heated and pressed is used. Therefore, there is a tendency that the resin does not easily flow into a fine portion of the pattern. Therefore, by embedding a resin in a fine portion of the pattern in advance, the insulation deterioration characteristics can be remarkably improved.
【００３５】[0035]
【発明の効果】以上説明したように、本発明によれば、
多層に重ねるときに問題となる凸凹を緩和することがで
きるばかりでなく、パターンが微細になっても絶縁劣化
が起こらない多層プリント配線板を得ることができる。As described above, according to the present invention,
It is possible to not only relieve the unevenness which becomes a problem when superimposing in a multilayer, but also to obtain a multilayer printed wiring board in which insulation deterioration does not occur even if the pattern becomes fine.
【００３６】また本発明の多層プリント配線板の製造方
法によれば、前記多層プリント配線板を効率よく合理的
に製造することができる。Further, according to the method for manufacturing a multilayer printed wiring board of the present invention, the multilayer printed wiring board can be efficiently and rationally manufactured.
【図１】 （ａ）〜（ｆ）は、比較例１のビルドアップ
方式の多層プリント配線板の製造方法を示す工程断面
図。FIGS. 1A to 1F are process cross-sectional views illustrating a method for manufacturing a build-up type multilayer printed wiring board of Comparative Example 1. FIGS.
【図２】 比較例１の配線間スペースにスキージで樹脂
を埋め込む方法を示す断面図。FIG. 2 is a cross-sectional view showing a method of embedding a resin with a squeegee in a space between wirings in Comparative Example 1.
【図３】 （ａ）〜（ｇ）は、比較例２のビルドアップ
方式多層プリント配線板の製造方法を示す工程断面図。3 (a) to 3 (g) are process cross-sectional views illustrating a method for manufacturing a build-up type multilayer printed wiring board of Comparative Example 2. FIG.
【図４】 （ａ）〜（ｅ）は、本発明の実施の形態１の
スタック方式多層プリント配線板の製造方法を示す工程
断面図。FIGS. 4A to 4E are process cross-sectional views illustrating a method of manufacturing a stacked multilayer printed wiring board according to Embodiment 1 of the present invention.
【図５】 （ａ）〜（ｄ）は、本発明の実施の形態２の
スタック方式プリント配線板の製造方法を示す工程断面
図。FIGS. 5A to 5D are process cross-sectional views illustrating a method of manufacturing a stacked printed wiring board according to Embodiment 2 of the present invention.
１０１ プリント配線板 １０２ 配線 １０３ 配線間スペース １０４ 樹脂 １０５ 樹脂絶縁体 １０６ バイアホール １０７ 導体箔 １０８ 配線 １０９ 配線間スペース ２０１ スキージ ２０２ 配線 ３０１ 導体箔 ４０１ 導体箔 ４０２ 導電性ペーストを埋め込んだプリプレグ ４０３ 導電性ペースト ４０４ バイアホール ４０５ 配線 ５０１ プリント配線板 ５０２ プリプレグ ５０３ 導電性ペースト ５０４ バイアホール ５０５ 樹脂 DESCRIPTION OF SYMBOLS 101 Printed wiring board 102 Wiring 103 Wiring space 104 Resin 105 Resin insulator 106 Via hole 107 Conductive foil 108 Wiring 109 Wiring space 201 Squeegee 202 Wiring 301 Conductive foil 401 Conductive foil 402 Prepreg embedded conductive paste 403 Conductive paste 404 Via hole 405 Wiring 501 Printed wiring board 502 Prepreg 503 Conductive paste 504 Via hole 505 Resin
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平７−15146（ＪＰ，Ａ) 特開 平４−312996（ＪＰ，Ａ) 特開 平４−278598（ＪＰ，Ａ) 特開 平７−115268（ＪＰ，Ａ) 特開 平２−290095（ＪＰ，Ａ) 特開 平８−293676（ＪＰ，Ａ) 特開 平８−264941（ＪＰ，Ａ) (58)調査した分野(Int.Cl.7，ＤＢ名) H05K 3/46 H05K 3/22 ────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-7-15146 (JP, A) JP-A-4-312996 (JP, A) JP-A-4-278598 (JP, A) JP-A-7-150 115268 (JP, A) JP-A-2-290095 (JP, A) JP-A-8-293676 (JP, A) JP-A-8-2644941 (JP, A) (58) Fields investigated (Int. Cl. 7 , DB name) H05K 3/46 H05K 3/22
Claims (12)
前記配線の厚みと平坦になるように樹脂が埋め込まれ、
前記配線面側に、ビア穴に導電性ペーストが埋め込まれ
たプリプレグが積層され、その表面に導体配線が積層さ
れて一体化され、 前記導体配線と前記プリント配線基板の表層の配線とが
前記導電性ペーストによって前記プリント基板の厚さ方
向に電気的に接続されている 多層プリント配線板。(1) In a space between wirings on a surface layer of a printed wiring board.
Resin is embedded so as to be flat with the thickness of the wiring ,
A conductive paste is embedded in the via hole on the wiring surface side.
Prepreg is laminated, and conductor wiring is laminated on its surface.
And the conductor wiring and the surface wiring of the printed wiring board are integrated.
The thickness of the printed circuit board depends on the conductive paste.
A multilayer printed wiring board that is electrically connected in the direction .
に記載の多層プリント配線板。2. The resin embedding is partial.
2. The multilayer printed wiring board according to item 1.
込まれている請求項１に記載の多層プリント配線板。3. The multilayer printed wiring board according to claim 1, wherein a resin different from the surroundings is embedded in the space between the wirings.
リアミド）を補強材とし、これにエポキシ樹脂を含浸し
たアラミドエポキシプリプレグである請求項１に記載の
多層プリント配線板。4. The multilayer printed wiring board according to claim 1, wherein the prepreg is an aramid epoxy prepreg in which an aramid fiber (a wholly aromatic polyamide) is used as a reinforcing material and impregnated with an epoxy resin.
ポキシ樹脂を含浸したアラミドエポキシプリプレグであ
る請求項１に記載の多層プリント配線板。5. The multilayer printed wiring board according to claim 1, wherein the prepreg is an aramid epoxy prepreg impregnated with an epoxy resin using aramid fibers as a reinforcing material.
板の表層の配線間スペースに前記配線の厚みと平坦にな
るように樹脂を埋め込んだ後に、あらかじめビア穴に導
電性ペーストを埋め込んだプリプレグと導体箔を貼り付
け一体化して前記配線と前記導体箔とを前記導電性ペー
ストにより前記プリント配線板の厚さ方向に電気的に接
続し、その後前記導体箔をパターンエッチングして導体
配線を形成する多層プリント配線板の製造方法。 6. The flatness of the thickness of the wiring in the space between the wirings on the surface layer of a single-layer or multilayer printed wiring board prepared in advance.
After embedding the resin so that, paste the prepreg and conductor foil with embedded conductive paste in advance via hole
The wiring and the conductive foil are integrated with the conductive page.
Electrical connection in the thickness direction of the printed wiring board
A method of manufacturing a multilayer printed wiring board, wherein the conductive foil is patterned and etched to form conductive wiring.
ント配線板の表層の配線間スペースに前記配線の厚みと
平坦になるように樹脂を埋め込んだ後に、各プリント配
線板の間にあらかじめビア穴に導電性ペーストを埋め込
んだプリプレグを挟み、加熱加圧して一体化し前記プリ
プレグの上下の配線を前記導電性ペース トにより前記プ
リント配線基板の厚さ方向に電気的に接続する多層プリ
ント配線板の製造方法。7. The thickness of the wiring in a space between wirings on a surface layer of a plurality of single-layer or multilayer printed wiring boards prepared in advance.
After embedding the resin so that the flat, sandwiched between the printed circuit plates in the prepreg embedded a conductive paste in advance via hole, by heating and pressing integrally the by the conductive paste to interconnect the top and bottom of the prepreg Step
A method for manufacturing a multilayer printed wiring board which is electrically connected in a thickness direction of a lint wiring board .
埋め込む手段が、スキージによる手段である請求項７に
記載の多層プリント配線板の製造方法。8. The method for manufacturing a multilayer printed wiring board according to claim 7, wherein the means for embedding the resin in the space between the wirings of the printed wiring board is a means using a squeegee.
または７に記載の多層プリント配線板の製造方法。9. The resin embedding is partial.
Or the method for producing a multilayer printed wiring board according to 7.
め込まれている請求項６または７に記載の多層プリント
配線板の製造方法。10. The method for manufacturing a multilayer printed wiring board according to claim 6, wherein a resin different from the surroundings is embedded in the space between the wirings.
ポリアミド）を補強材とし、これにエポキシ樹脂を含浸
したアラミドエポキシプリプレグである請求項６または
７に記載の多層プリント配線板の製造方法。11. The method for producing a multilayer printed wiring board according to claim 6, wherein the prepreg is an aramid epoxy prepreg in which aramid fibers (wholly aromatic polyamide) are used as a reinforcing material and impregnated with an epoxy resin.
エポキシ樹脂を含浸したアラミドエポキシプリプレグで
ある請求項６または７に記載の多層プリント配線板の製
造方法。12. The method according to claim 6, wherein the prepreg is an aramid epoxy prepreg impregnated with an epoxy resin using aramid fibers as a reinforcing material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20951196A JP3230727B2 (en) | 1996-08-08 | 1996-08-08 | Multilayer printed wiring board and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20951196A JP3230727B2 (en) | 1996-08-08 | 1996-08-08 | Multilayer printed wiring board and method of manufacturing the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH1056267A JPH1056267A (en) | 1998-02-24 |
| JP3230727B2 true JP3230727B2 (en) | 2001-11-19 |
Family
ID=16574014
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20951196A Expired - Fee Related JP3230727B2 (en) | 1996-08-08 | 1996-08-08 | Multilayer printed wiring board and method of manufacturing the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3230727B2 (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10126002A1 (en) * | 2000-06-24 | 2002-01-31 | Rotra Leiterplatten Produktion | Multilayered circuit board composite body used in the production of planar transformers and coils comprises two circuit boards joined by a composite foil |
| JP2002064270A (en) | 2000-08-17 | 2002-02-28 | Matsushita Electric Ind Co Ltd | Circuit board and its manufacturing method |
| JP3903701B2 (en) * | 2000-08-17 | 2007-04-11 | 松下電器産業株式会社 | Multilayer circuit board and manufacturing method thereof |
| JP2002185142A (en) * | 2000-12-19 | 2002-06-28 | Ibiden Co Ltd | Multilayer printed wiring board and its manufacturing method |
| JP4335075B2 (en) * | 2004-06-08 | 2009-09-30 | 株式会社伸光製作所 | Multilayer printed wiring board and manufacturing method thereof |
| JP4622939B2 (en) * | 2006-06-22 | 2011-02-02 | パナソニック株式会社 | Circuit board manufacturing method |
-
1996
- 1996-08-08 JP JP20951196A patent/JP3230727B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH1056267A (en) | 1998-02-24 |
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