JP4803919B2 - Manufacturing method of multilayer wiring board - Google Patents

Manufacturing method of multilayer wiring board Download PDF

Info

Publication number
JP4803919B2
JP4803919B2 JP2001231412A JP2001231412A JP4803919B2 JP 4803919 B2 JP4803919 B2 JP 4803919B2 JP 2001231412 A JP2001231412 A JP 2001231412A JP 2001231412 A JP2001231412 A JP 2001231412A JP 4803919 B2 JP4803919 B2 JP 4803919B2
Authority
JP
Japan
Prior art keywords
conductor
substrate
uncured
adhesive layer
copper foil
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2001231412A
Other languages
Japanese (ja)
Other versions
JP2003017857A (en
Inventor
智 梶田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2001231412A priority Critical patent/JP4803919B2/en
Publication of JP2003017857A publication Critical patent/JP2003017857A/en
Application granted granted Critical
Publication of JP4803919B2 publication Critical patent/JP4803919B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、半導体集積回路素子等の半導体素子や電子部品を搭載するための多層配線基板の製造方法に関するものである。
【0002】
【従来の技術】
近時、有機材料系の多層配線基板として、例えば図2に断面図で示すように、高密度化に対応し易い全層インターステシャルビアホール(IVH)構造を有する多層配線基板21が注目されている。この全層IVH構造を有する多層配線基板21としては、例えばアラミド不織布にエポキシ樹脂等の熱硬化性樹脂を含浸させて成る複数の絶縁板22の上下面に銅箔から成る配線導体23を設けるとともに各絶縁板22の上下に位置する配線導体23同士を各絶縁板22の貫通孔内に充填した導電性ペーストを硬化させて成る貫通導体25により電気的に接続したものが知られている。なお、このような多層配線基板21は、次に述べる方法により製作されている。
【0003】
先ず、図3(a)に断面図で示すように、プリプレグ22Aとしてアラミド不織布にエポキシ樹脂等の未硬化の熱硬化性樹脂を含浸させた材料を用い、このプリプレグ22Aに貫通孔24を穿孔した後、銅粉末等の導電性粒子とエポキシ樹脂等の未硬化の熱硬化性樹脂とを含有する導電性ペーストを貫通孔24へ充填して未硬化の貫通導体25Aを形成する。
【0004】
次に、図3(b)に断面図で示すように、プリプレグ22Aの上下両面に銅箔23Aを重ね、これらを加熱装置を備えた真空プレス機により上下から加熱加圧する。これにより、プリプレグ22A・未硬化の貫通導体25Aを硬化するとともに銅箔23Aを絶縁板22の上下両面に上下の銅箔23A同士が貫通導体25で互いに電気的に接合されるように被着する。
【0005】
次に、図3(c)に断面図で示すように、絶縁板22の上下両面に固着された銅箔23Aをフォトリソグラフィによりパターン加工することで、貫通導体25で互いに電気的に接続された複数の配線導体23を形成する。
【0006】
次に、図3(d)に断面図で示すように、配線導体23が形成された絶縁板22の上下両面に、図3(a)で示したプリプレグ22Aと同様に導電性ペーストを充填して成る未硬化の貫通導体25Aが形成されたプリプレグ22Aと、さらにその上に銅箔23Aとを位置合わせしながら順次積層するとともにこれらを上下から加熱加圧して図3(e)に断面図で示すような内層に配線導体23を有するとともに最外層に銅箔23Aが固着された積層体21Aを得る。
【0007】
そして最後に、図3(f)に断面図で示すように、最外層の銅箔23Aをフォトリソグラフィによりパターン加工して最外層の配線導体23を形成することにより全層IVH構造を有する多層配線基板21が製作される。
【0008】
【発明が解決しようとする課題】
しかしながら、従来の全層IVH構造を有する多層配線基板21は、上述したように、アラミド不織布に未硬化のエポキシ樹脂を含浸させて成るプリプレグ22Aに貫通孔24を設け、この貫通孔24内に導電性ペーストを充電して成る未硬化の貫通導体25Aを形成した後、このプリプレグ22Aを上下から加熱加圧してプリプレグ22A中の熱硬化性樹脂および貫通導体25A中の熱硬化性樹脂を熱硬化させることにより貫通導体25を有する絶縁板22を製作することから、加熱加圧時にプリプレグ22Aおよび未硬化の貫通導体25Aが軟化して変形が起こり、そのため貫通導体25の位置精度が悪くなったり、貫通導体25が大きく変形したりして各絶縁板22の上下に位置する配線導体23同士が貫通導体25により正確に接続されず各配線導体23間に接続不良が発生して、断線してしまうという問題点を有していた。
【0009】
本発明は上記従来技術における問題点に鑑み案出されたものであり、その目的は、貫通導体の位置精度を高く維持するとともに貫通導体に大きな変形を発生させることがなく、それにより各絶縁層の上下に位置する配線導体同士を貫通導体で正確に接続し、各配線導体同士の電気的接続信頼性の高い全層IVH構造の多層配線基板を提供することにある。
【0010】
【課題を解決するための手段】
本発明の多層配線板の製造方法は、硬化した熱硬化性樹脂およびガラスクロスを含む絶縁板の上下面に、未硬化の熱硬化性樹脂および30〜60重量%の無機フィラーを含むとともに硬化後の熱膨張係数が15×10 -6 〜30×10 -6 /℃である接着層および該接着層に対して剥離可能に設けられた保護層を積層する第1の工程と、前記絶縁板および前記接着層および前記保護層に、これらを貫通する貫通孔を形成する第2の工程と、前記貫通孔内に導電性ペーストを充填して未硬化の貫通導体を形成した後、前記保護層を剥離して、前記絶縁板と前記未硬化の貫通導体と前記未硬化の接着層とから成る第1の基板を得る第3の工程と、該第1の基板の上下面に第1の銅箔を積層した後、これらを加熱加圧して前記未硬化の貫通導体を硬化するとともに、前記未硬化の接着層硬化することによって前記第1の基板の上下面に前記銅箔を接着し、しかる後、前記第1の銅箔をパターン加工することにより硬化した貫通導体と電気的に接続された第1の配線導体を形成して、前記絶縁板と前記硬化した貫通導体と硬化した接着層と前記第1の配線導体とから成る第2の基板を得る第4の工程と、該第2の基板の上下面に、前記第1の基板と第2の銅箔とを順々に、前記第1の配線導体と前記第1の基板の前記未硬化の貫通導体とが電気的に接続されるように積層した後、これらを加熱加圧して前記第1の基板の前記未硬化の貫通導体を硬化するとともに、前記第1の基板の前記未硬化の接着層を硬化することによって前記第2の基板と前記第1の基板と前記第2の銅箔とを接着する第5の工程と、前記第2の銅箔をパターン加工することにより前記第1の基板の前記硬化した貫通導体と電気的に接続する第2の配線導体を形成して、上下に位置する前記第2の配線導体間を前記第1の基板および前記第2の基板の前記硬化した貫通導体で電気的に接続する第6の工程とを有することを特徴とするものである。
【0012】
本発明の多層配線基板の製造方法によれば、貫通導体および配線導体を硬化した有機材料系の絶縁板に形成し、その後、この貫通導体および配線導体を有する絶縁板を複数層積層することから、絶縁板の積層時の加熱加圧により絶縁板や貫通導体に変形が発生することはない。従って、絶縁板に形成された貫通導体を位置精度良く形成できるとともに、これによって各絶縁板の上下に位置する配線導体同士を貫通導体で正確に接続することができる。
【0013】
また、本発明の多層配線基板の製造方法によれば、硬化させた接着層の熱膨張係数が15×10-6〜30×10-6/℃であることから、硬化させた接着層の熱膨張係数を貫通導体の熱膨張係数に近似させることができ、それにより各貫通導体と配線導体との間の電気的接続信頼性が極めて高い全層IVH構造の多層配線基板を提供することができる。
【0014】
【発明の実施の形態】
次に、本発明の多層配線基板の製造方法について添付の図面に基づいて説明する。図1は、本発明の多層配線基板の製造方法の実施形態の一例を示す断面図である。
【0015】
まず、図1(a)に断面図で示すように、硬化した有機材料系の絶縁板1を準備するとともにこの上下面に未硬化の接着層2Aおよびこの接着層2Aに対して剥離可能に設けられた保護層3を積層する。なお、本発明で用いる硬化した有機材料系の絶縁基板1は、その硬化の程度が、Bステージと呼ばれる有機材料系の絶縁板1が後工程における加熱加圧によって軟化溶融する程度の半硬化状態よりも硬化が進んでおり、後工程における加熱加圧では軟化溶融しない程度のものをいう。
【0016】
絶縁板1は、その厚みが50〜300μmであり、例えばガラスクロスにエポキシ樹脂やビスマレイミドトリアジン樹脂等の未硬化の熱硬化性樹脂を含浸させたプリプレグを加熱加圧して熱硬化性樹脂を硬化させたものが用いられる。
【0017】
また、未硬化の接着層2Aは、その厚みが30〜50μmであり、例えば、エポキシ樹脂やビスマレイミドトリアジン樹脂等の未硬化の熱硬化性樹脂あるいはこのような未硬化の熱硬化性樹脂とアクリル系樹脂等の熱可塑性樹脂との複合樹脂に無機フィラーとして球状の溶融SiO2、Al23、BaTiO3、MgTiO3、CaTiO3等を分散させて成り、後述する銅箔6Aと絶縁板1および絶縁板1同士を接合するための接着剤として機能する。このような未硬化の接着層2Aは、例えばスクリーン印刷法を用いて絶縁板1の上下面に上記樹脂を印刷することにより形成される。あるいは、あらかじめ従来周知のテープ成形法を用いて上記樹脂から成るテープを成形し、このテープを絶縁板1の上下面に積層しても良い。
【0018】
他方、保護層3は、その厚みが20〜50μmであり、例えばPET(Polyethlen-terephthalate)フィルム等から成り、未硬化の接着層2Aを保護するための保護材として機能するとともに後述するように貫通導体5用の導電性ペーストをスクリーン印刷により貫通孔4に充填する際のマスクとして機能する。なお、この保護層3は、レーザ加工性が良好であることが好ましい。
【0019】
次に、図1(b)に断面図で示すように、積層された絶縁板1および未硬化の接着層2Aおよび保護層3にこれらを上下に貫通する貫通孔4をレーザ加工あるいはドリル加工により穿孔する。貫通孔4は、その直径が通常は100〜300μmであり、例えばレーザ加工により形成する場合、ビーム径を50〜200μmに絞った炭酸ガスレーザを保護層3上から照射することにより形成される。なお、UVレーザやエキシマレーザを利用することにより、貫通孔4の直径を50μm以下と小さなものとすることも可能である。
【0020】
次に、図1(c1)に断面図で示すように、貫通孔4へ導電性ペーストを充填して未硬化の貫通導体5Aを形成する。導電性ペーストとしては、銅や銀・はんだ等の金属粉末をエポキシ樹脂等の未硬化の熱硬化性樹脂あるいはこれとアクリル系樹脂等の熱可塑性樹脂との樹脂混合物に添加混合したものが用いられる。また、貫通孔4への未硬化の導電性ペーストの充填は、保護層3を印刷用のマスクとして用い、この保護層3の上からスクリーン印刷で埋め込む方法が採用される。
【0021】
なお、保護層3の厚みは20〜50μmの範囲が好ましく、20μm未満であるとスクリーン印刷で導電性ペーストを貫通孔4に埋め込む際に保護層3が破れ易くなる傾向があり、また50μmを越えると、後述する保護層3を剥離した際に、未硬化の貫通導体5Aが未硬化の接着層2Aの表面から保護層3の厚み分だけ大きくはみ出してしまい、その後、第1の銅箔6Aまたは第2の銅箔6Bを積層して加熱加圧すると、未硬化の貫通導体5Aの大きくはみ出した部分が未硬化の接着層2Aの表面に大きく広がってしまい、第1の銅箔6Aおよび第2の銅箔6Bをパターン加工する際に余分な時間を要するとともに精度良く配線導体6Cおよび第2の配線導体6Dを形成することが困難となる傾向がある。従って、保護層3の厚みは20〜50μmの範囲とすることが好ましい。
【0022】
次に、図1(c2)に断面図で示すように、保護層3を剥離して、絶縁板1と未硬化の貫通導体5Aと未硬化の接着層2Aとから成る第1の基板7を得る。なお、本発明の多層配線基板の製造方法においては、未硬化の貫通導体5Aが、保護層3の厚み分だけ接着層2Aより外側にはみだしていることから、第1の銅箔6Aおよび後述する第2の銅箔6Bを接着層2Aに積層して加熱加圧した際に、保護層3の厚み分だけ接着層2Aより外側にはみだした導電性ペーストが適度に広がり、第1の銅箔6Aおよび第2の銅箔6Bと貫通導体5との接続面積が大きくなり、接合強度を強固なものとすることができる。
【0023】
次に、図(d1)に断面図で示すように、第1の基板7の上下面の略全面に第1の銅箔6Aを積層し、真空プレス装置を用いて真空度が4kPa以下、温度が180〜200℃、圧力が2〜4MPa、時間が90〜120分の条件で加熱加圧を行い、未硬化の接着層2Aおよび未硬化の貫通導体5Aを硬化するとともに第1の基板7の上下面に銅箔6Aを接着する。
【0024】
本発明の多層配線基板の製造方法においては、絶縁板1は加熱加圧の前にすでに硬化しているので、絶縁板としてプリプレグを用いた場合のように銅箔6Aを接着する際の加熱加圧によって絶縁板1に変形が発生することはなく、従って、貫通導体5に大きな変形が発生することもなく貫通導体5を位置精度良く形成することができる。
【0025】
次に、図1(d2)に断面図で示すように、第1の基板7の上下面に被着された銅箔6Aをフォトリソグラフィによりパターン加工することで、絶縁板1と硬化した貫通導体5と硬化した接着層2と第1の配線導体6Cとから成る第2の基板8を得る。なおこの際、第2の基板8の上下面に貫通導体5と電気的に接続しないダミー電極6Eを設けてもよい。このような第1の銅箔6Aをパターン加工して第1の配線導体6Cを形成するには、例えば、第1の銅箔6Aの表面にエッチングマスクをドライフィルムレジストにより形成した後、エッチングマスクから露出した銅箔6Aをアンモニア系の塩化第二銅のエッチング液で1〜2分間エッチングすればよい。
【0026】
次に、図1(e)に断面図で示すように、第2の基板8の上下面に、第1の基板7と第2の銅箔6Bとを順次、第1の配線導体6Cと第1の基板7の未硬化の貫通導体5Aとが電気的に接続されるように積層した後、これらを真空プレス装置を用いて真空度が4kPa以下、温度が180〜200℃、圧力が2〜4MPa、時間が90〜120分の条件で加熱加圧して第1の基板7の未硬化の貫通導体5Aおよび未硬化の接着層2Aを硬化するとともに第2の基板8と第1の基板7と第2の銅箔6Bとを接着し、第2の基板8と第1の基板7と第2の銅箔6Bとから成る積層板11Aを得る。
【0027】
最後に、図1(f)に断面図で示すように、第2の銅箔6Bをパターン加工して第2の配線導体6Dを形成することにより、全層IVH構造を有する多層配線基板11が製作される。
【0028】
なお、第2の銅箔6Bをパターン加工して第2の配線導体6Dを形成するには、第1の配線導体6Cの形成と同様に、第2の銅箔6Bの表面にエッチングマスクをドライフィルムレジストにより形成した後、エッチングマスクから露出した第2の銅箔6Bをアンモニア系の塩化第二銅のエッチング液で1〜2分間エッチングすればよい。
【0029】
本発明の多層配線基板の製造方法においては、絶縁板1は加熱加圧の前にすでに硬化しているので、第1の基板7と第2の基板8との積層の際の加熱加圧によって絶縁板1に変形が発生することはない。従って、貫通導体5に大きな変形が発生することはなく、貫通導体5の位置精度を極めて高く維持することができ、その結果、貫通導体5を有する絶縁板1を複数層積層して全層IVH構造を有する多層配線基板11を製作した場合においても、上下面の配線導体6同士が電気的に良好に接続された多層配線基板11を得ることができる。
【0030】
なお、本発明においては、硬化させた接着層2の熱膨張係数を15×10-6〜30×10-6/℃とすることにより硬化した接着層2の熱膨張係数を貫通導体5の熱膨張係数に近似させることができ、それにより接着層2と貫通導体5との熱膨張係数の差に起因して貫通導体5と配線導体6との間に大きな応力が印加されるのを有効に防止することができ、その結果、貫通導体5と配線導体6との電気的接続信頼性を極めて高いものとすることができる。したがって、硬化した接着層2の熱膨張係数を15×10-6〜30×10-6/℃の範囲とすることが好ましい。
【0031】
未硬化の接着層2Aを硬化させて、その硬化した接着層2の熱膨張係数を15×10-6〜30×10-6/℃とするには、未硬化の接着層2A中に30〜60重量%程度の無機フィラーを予め含有させておき、この接着層2Aを略完全に硬化させればよい。未硬化の接着層中の無機フィラーの含有量が30重量%未満の場合には、硬化した接着層2の熱膨張係数を30×10-6/℃以下とすることが困難となり、60重量%を超える場合には、硬化した接着層2の熱膨張係数を15×10-6/℃以上とすることが困難となるとともに接着層2の接着力が低いものとなる傾向にある。従って、未硬化の接着層2Aを硬化させる際、その硬化した接着層2の熱膨張係数を15×10-6〜30×10-6/℃の範囲とすることが好ましい。
【0032】
かくして、本発明の配線基板の製造方法によれば、絶縁板1は加熱加圧の前にすでに硬化しているので、第1の基板7と第2の基板8との積層の際の加熱加圧によって絶縁板1に変形が発生することはない。従って、貫通導体5に大きな変形が発生することはなく、貫通導体5の位置精度を極めて高く維持することができ、その結果、貫通導体5を有する絶縁板1を複数層積層して全層IVH構造を有する多層配線基板11を製作した場合においても、上下面の配線導体6同士が電気的に良好に接続された多層配線基板11を得ることができる。
【0033】
なお、本発明は上述の実施例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々変更は可能である。例えば、上述の実施の形態の例で得られた多層配線基板11の上面および/または下面に第1の基板7と第2の銅箔6Bとを交互に積層して、加熱加圧した後、第2の銅箔6Bをパターン加工して第2の配線導体6Dを形成することにより多層化することも可能である。
【0034】
【発明の効果】
本発明の多層配線基板の製造方法によれば、貫通導体および配線導体を硬化した有機材料系の絶縁板に形成し、その後、この貫通導体および配線導体を有する絶縁板を複数層積層することから、絶縁板の積層時の加熱加圧により絶縁板や貫通導体に変形が発生することはない。従って、絶縁板に形成された貫通導体を位置精度良く形成できるとともに、これによって各絶縁板の上下に位置する配線導体同士を貫通導体で正確に接続することができる。
【0035】
また、本発明の多層配線基板の製造方法によれば、硬化させた接着層の熱膨張係数が15×10-6〜30×10-6/℃であることから、硬化させた接着層の熱膨張係数を貫通導体の熱膨張係数に近似させることができ、それにより各貫通導体と配線導体との間の電気的接続信頼性が極めて高い全層IVH構造の多層配線基板を提供することができる。
【図面の簡単な説明】
【図1】(a)〜(f)は、本発明の多層配線基板の製造方法を説明するための工程毎の断面図である。
【図2】従来の多層配線基板の実施例を示す断面図である。
【図3】(a)〜(f)は、図2に示す従来の多層配線基板の製造方法を説明するための工程毎の断面図である。
【符号の説明】
1・・・・・・・絶縁板
2・・・・・・・接着層
2A・・・・・未硬化の接着層
3・・・・・・・保護層
4・・・・・・・貫通孔
5・・・・・・・貫通導体
5A・・・・・未硬化の貫通導体
6A・・・・・・・第1の銅箔
6B・・・・・・・第2の銅箔
6C・・・・・・・第1の配線導体
6D・・・・・・・第2の配線導体
7・・・・・・・・第1の基板
8・・・・・・・・第2の基板
11・・・・・・・多層配線基板
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a multilayer wiring board for mounting a semiconductor element such as a semiconductor integrated circuit element or an electronic component.
[0002]
[Prior art]
Recently, a multilayer wiring board 21 having an all-layer interstitial via hole (IVH) structure that can easily cope with high density is attracting attention as an organic material-based multilayer wiring board, for example, as shown in a sectional view in FIG. Yes. As the multilayer wiring board 21 having this all-layer IVH structure, for example, wiring conductors 23 made of copper foil are provided on the upper and lower surfaces of a plurality of insulating plates 22 formed by impregnating an aramid nonwoven fabric with a thermosetting resin such as an epoxy resin. It is known that wiring conductors 23 positioned above and below each insulating plate 22 are electrically connected by a through conductor 25 formed by curing a conductive paste filled in a through hole of each insulating plate 22. Such a multilayer wiring board 21 is manufactured by the method described below.
[0003]
First, as shown in a cross-sectional view in FIG. 3A, a material obtained by impregnating an aramid nonwoven fabric with an uncured thermosetting resin such as an epoxy resin is used as the prepreg 22A, and a through hole 24 is drilled in the prepreg 22A. Thereafter, the through hole 24 is filled with a conductive paste containing conductive particles such as copper powder and an uncured thermosetting resin such as an epoxy resin to form an uncured through conductor 25A.
[0004]
Next, as shown in a cross-sectional view in FIG. 3B, copper foils 23A are stacked on both upper and lower surfaces of the prepreg 22A, and these are heated and pressurized from above and below by a vacuum press machine equipped with a heating device. Thus, the prepreg 22A and the uncured through conductor 25A are cured, and the copper foil 23A is attached to the upper and lower surfaces of the insulating plate 22 so that the upper and lower copper foils 23A are electrically connected to each other by the through conductor 25. .
[0005]
Next, as shown in a cross-sectional view in FIG. 3C, the copper foils 23A fixed to the upper and lower surfaces of the insulating plate 22 are patterned by photolithography to be electrically connected to each other through the through conductors 25. A plurality of wiring conductors 23 are formed.
[0006]
Next, as shown in a sectional view in FIG. 3D, the upper and lower surfaces of the insulating plate 22 on which the wiring conductors 23 are formed are filled with a conductive paste in the same manner as the prepreg 22A shown in FIG. A prepreg 22A having an uncured through conductor 25A formed thereon and a copper foil 23A are sequentially laminated on the prepreg 22A while being aligned and heated and pressed from above and below to show a cross-sectional view in FIG. A laminated body 21A having the wiring conductor 23 in the inner layer as shown and the copper foil 23A fixed to the outermost layer is obtained.
[0007]
Finally, as shown in a sectional view in FIG. 3 (f), the outermost layer copper foil 23A is patterned by photolithography to form the outermost layer wiring conductor 23, thereby forming a multilayer wiring having an all-layer IVH structure. A substrate 21 is manufactured.
[0008]
[Problems to be solved by the invention]
However, as described above, the multilayer wiring board 21 having the conventional all-layer IVH structure is provided with a through hole 24 in a prepreg 22A formed by impregnating an aramid nonwoven fabric with an uncured epoxy resin, and the through hole 24 is electrically conductive. After forming the uncured through conductor 25A formed by charging the conductive paste, the prepreg 22A is heated and pressurized from above and below to thermally cure the thermosetting resin in the prepreg 22A and the thermosetting resin in the through conductor 25A. Since the insulating plate 22 having the through conductor 25 is manufactured by this, the prepreg 22A and the uncured through conductor 25A are softened and deformed during heating and pressurization, so that the positional accuracy of the through conductor 25 is deteriorated, The conductor 25 is greatly deformed, and the wiring conductors 23 located above and below each insulating plate 22 are not accurately connected to each other by the through conductor 25, resulting in a connection failure between the wiring conductors 23 and disconnection. We had a problem in that.
[0009]
The present invention has been devised in view of the above-described problems in the prior art, and the object thereof is to maintain a high positional accuracy of the through conductor and to prevent the through conductor from being greatly deformed. It is an object to provide a multilayer wiring board having an all-layer IVH structure in which wiring conductors positioned above and below are accurately connected by through conductors and electrical connection reliability between the wiring conductors is high.
[0010]
[Means for Solving the Problems]
The method for producing a multilayer wiring board of the present invention includes an uncured thermosetting resin and 30 to 60% by weight of an inorganic filler on the upper and lower surfaces of an insulating board containing a cured thermosetting resin and glass cloth, and after curing. A first step of laminating an adhesive layer having a thermal expansion coefficient of 15 × 10 −6 to 30 × 10 −6 / ° C. and a protective layer provided to be peelable from the adhesive layer; A second step of forming a through-hole penetrating through the adhesive layer and the protective layer; and forming an uncured through conductor by filling the through-hole with a conductive paste; A third step of peeling to obtain a first substrate comprising the insulating plate, the uncured through conductor, and the uncured adhesive layer, and a first copper foil on the upper and lower surfaces of the first substrate after stacking and to cure the through conductors of said uncured them by heating and pressing Together, the said copper foil adhered to the upper and lower surfaces of the first substrate by curing the adhesive layer of uncured, thereafter, cured through conductor electrically by patterning the first copper foil A fourth step of forming a first wiring conductor connected to each other to obtain a second substrate comprising the insulating plate, the cured through conductor, a cured adhesive layer, and the first wiring conductor; The first substrate and the second copper foil are sequentially connected to the upper and lower surfaces of the second substrate, and the first wiring conductor and the uncured through conductor of the first substrate are electrically connected to each other. after stacking so as to be connected, as well as curing the through conductors of said uncured first substrate them by heating and pressing, curing the adhesive layer of the uncured first substrate the adhering the second copper foil between the first substrate and the second substrate by And a second wiring conductor electrically connected to the cured through conductor of the first substrate by patterning the second copper foil, and the second copper conductor positioned above and below the second copper foil. And a sixth step of electrically connecting the wiring conductors with the hardened through conductors of the first substrate and the second substrate.
[0012]
According to the method for manufacturing a multilayer wiring board of the present invention, the through conductor and the wiring conductor are formed on a cured organic material insulating plate, and then the insulating plate having the through conductor and the wiring conductor is laminated in a plurality of layers. The insulating plate and the through conductor are not deformed by heating and pressurization when the insulating plates are laminated. Accordingly, the through conductors formed on the insulating plate can be formed with high positional accuracy, and thereby the wiring conductors positioned above and below each insulating plate can be accurately connected by the through conductor.
[0013]
Further, according to the method for producing a multilayer wiring board of the present invention, since the thermal expansion coefficient of the cured adhesive layer is 15 × 10 −6 to 30 × 10 −6 / ° C., the heat of the cured adhesive layer The expansion coefficient can be approximated to the thermal expansion coefficient of the through conductor, thereby providing a multilayer wiring board having an all-layer IVH structure with extremely high electrical connection reliability between each through conductor and the wiring conductor. .
[0014]
DETAILED DESCRIPTION OF THE INVENTION
Next, the manufacturing method of the multilayer wiring board of this invention is demonstrated based on attached drawing. FIG. 1 is a cross-sectional view showing an example of an embodiment of a method for manufacturing a multilayer wiring board according to the present invention.
[0015]
First, as shown in a cross-sectional view in FIG. 1A, a cured organic material insulating plate 1 is prepared, and an uncured adhesive layer 2A and an adhesive layer 2A are provided on the upper and lower surfaces so as to be peelable from each other. The obtained protective layer 3 is laminated. The cured organic material-based insulating substrate 1 used in the present invention is in a semi-cured state in which the degree of curing is such that the organic material-based insulating plate 1 called a B stage is softened and melted by heating and pressing in a subsequent process. It is hardened more than that and is not softened and melted by heating and pressurization in the subsequent process.
[0016]
The insulating plate 1 has a thickness of 50 to 300 μm. For example, a prepreg obtained by impregnating a glass cloth with an uncured thermosetting resin such as an epoxy resin or a bismaleimide triazine resin is heated and pressed to cure the thermosetting resin. Used.
[0017]
The uncured adhesive layer 2A has a thickness of 30 to 50 μm. For example, an uncured thermosetting resin such as an epoxy resin or a bismaleimide triazine resin, or such an uncured thermosetting resin and acrylic. Spherical molten SiO 2 , Al 2 O 3, BaTiO 3, MgTiO 3, CaTiO 3, etc. are dispersed as inorganic fillers in a composite resin with a thermoplastic resin such as a resin based on copper foil 6A and insulating plate 1 described later. And it functions as an adhesive for joining the insulating plates 1 together. Such an uncured adhesive layer 2A is formed by printing the resin on the upper and lower surfaces of the insulating plate 1 using, for example, a screen printing method. Alternatively, a tape made of the above resin may be formed in advance using a conventionally known tape forming method, and this tape may be laminated on the upper and lower surfaces of the insulating plate 1.
[0018]
On the other hand, the protective layer 3 has a thickness of 20 to 50 μm and is made of, for example, a PET (Polyethlen-terephthalate) film, and functions as a protective material for protecting the uncured adhesive layer 2A and penetrates as described later. It functions as a mask when the conductive paste for the conductor 5 is filled in the through holes 4 by screen printing. The protective layer 3 preferably has good laser processability.
[0019]
Next, as shown in a cross-sectional view in FIG. 1 (b), through-holes 4 penetrating vertically through the laminated insulating plate 1, uncured adhesive layer 2A and protective layer 3 are formed by laser machining or drilling. Perforate. The diameter of the through hole 4 is normally 100 to 300 μm. For example, when the through hole 4 is formed by laser processing, the through hole 4 is formed by irradiating the protective layer 3 with a carbon dioxide gas laser with a beam diameter reduced to 50 to 200 μm. Note that the diameter of the through hole 4 can be made as small as 50 μm or less by using a UV laser or an excimer laser.
[0020]
Next, as shown in a sectional view in FIG. 1 (c1), the through hole 4 is filled with a conductive paste to form an uncured through conductor 5A. As the conductive paste, a powder obtained by adding metal powder such as copper, silver, or solder to an uncured thermosetting resin such as an epoxy resin or a resin mixture of this and a thermoplastic resin such as an acrylic resin is used. . Further, the filling of the uncured conductive paste into the through holes 4 is performed by using the protective layer 3 as a printing mask and embedding the protective layer 3 by screen printing.
[0021]
The thickness of the protective layer 3 is preferably in the range of 20 to 50 μm. If the thickness is less than 20 μm, the protective layer 3 tends to break when the conductive paste is embedded in the through holes 4 by screen printing, and exceeds 50 μm. When the protective layer 3 described later is peeled off, the uncured through conductor 5A protrudes from the surface of the uncured adhesive layer 2A by the thickness of the protective layer 3, and then the first copper foil 6A or When the second copper foil 6B is laminated and heated and pressed, the part of the uncured through conductor 5A that protrudes greatly spreads over the surface of the uncured adhesive layer 2A, and the first copper foil 6A and the second copper foil 6A When patterning the copper foil 6B, extra time is required and it is difficult to form the wiring conductor 6C and the second wiring conductor 6D with high accuracy. Therefore, the thickness of the protective layer 3 is preferably in the range of 20 to 50 μm.
[0022]
Next, as shown in a sectional view in FIG. 1 (c2), the protective layer 3 is peeled off, and the first substrate 7 composed of the insulating plate 1, the uncured through conductor 5A, and the uncured adhesive layer 2A is formed. obtain. In the method for manufacturing a multilayer wiring board according to the present invention, the uncured through conductor 5A protrudes outside the adhesive layer 2A by the thickness of the protective layer 3, and therefore the first copper foil 6A and a later-described method. When the second copper foil 6B is laminated on the adhesive layer 2A and heated and pressed, the conductive paste protruding outside the adhesive layer 2A by the thickness of the protective layer 3 spreads moderately, and the first copper foil 6A And the connection area of the 2nd copper foil 6B and the penetration conductor 5 becomes large, and it can make joint strength strong.
[0023]
Next, as shown in the cross-sectional view of FIG. (D1), the first copper foil 6A is laminated on substantially the entire upper and lower surfaces of the first substrate 7, and the degree of vacuum is 4 kPa or less using a vacuum press apparatus. 180 to 200 ° C., a pressure of 2 to 4 MPa, and a time of 90 to 120 minutes for heating and pressurizing to cure the uncured adhesive layer 2A and the uncured through conductor 5A and the first substrate 7 The copper foil 6A is bonded to the upper and lower surfaces.
[0024]
In the method for manufacturing a multilayer wiring board according to the present invention, since the insulating plate 1 is already cured before heating and pressurization, it is possible to apply heating when bonding the copper foil 6A as in the case of using a prepreg as the insulating plate. The insulating plate 1 is not deformed by the pressure, and therefore, the through conductor 5 can be formed with high positional accuracy without large deformation of the through conductor 5.
[0025]
Next, as shown in a sectional view in FIG. 1 (d2), the copper foil 6A deposited on the upper and lower surfaces of the first substrate 7 is patterned by photolithography, whereby the insulating plate 1 and the cured through conductor are cured. 5, a second substrate 8 comprising the cured adhesive layer 2 and the first wiring conductor 6C is obtained. At this time, dummy electrodes 6E that are not electrically connected to the through conductors 5 may be provided on the upper and lower surfaces of the second substrate 8. In order to form the first wiring conductor 6C by patterning the first copper foil 6A, for example, an etching mask is formed on the surface of the first copper foil 6A with a dry film resist, and then the etching mask is used. The copper foil 6A exposed from the substrate may be etched with an ammonia-based cupric chloride etchant for 1 to 2 minutes.
[0026]
Next, as shown in a sectional view in FIG. 1 (e), the first substrate 7 and the second copper foil 6B are sequentially formed on the upper and lower surfaces of the second substrate 8, and the first wiring conductor 6C and the second After being laminated so that the uncured through conductor 5A of one substrate 7 is electrically connected, the degree of vacuum is 4 kPa or less, the temperature is 180 to 200 ° C., and the pressure is 2 to 2 using a vacuum press device. The second substrate 8 and the first substrate 7 are cured while the uncured through conductor 5A and the uncured adhesive layer 2A of the first substrate 7 are cured by heating and pressing at 4 MPa for a time of 90 to 120 minutes. The second copper foil 6B is bonded to obtain a laminated plate 11A composed of the second substrate 8, the first substrate 7, and the second copper foil 6B.
[0027]
Finally, as shown in a cross-sectional view in FIG. 1 (f), the second copper foil 6B is patterned to form a second wiring conductor 6D, whereby a multilayer wiring board 11 having an all-layer IVH structure is obtained. Produced.
[0028]
In order to form the second wiring conductor 6D by patterning the second copper foil 6B, an etching mask is dried on the surface of the second copper foil 6B in the same manner as the formation of the first wiring conductor 6C. After forming with a film resist, the second copper foil 6B exposed from the etching mask may be etched with an ammonia-based cupric chloride etchant for 1 to 2 minutes.
[0029]
In the method for manufacturing a multilayer wiring board according to the present invention, since the insulating plate 1 has already been cured before heating and pressing, the insulating board 1 is heated and pressed when the first substrate 7 and the second substrate 8 are stacked. There is no deformation in the insulating plate 1. Accordingly, the through conductor 5 is not greatly deformed, and the position accuracy of the through conductor 5 can be maintained extremely high. As a result, a plurality of insulating plates 1 having the through conductor 5 are laminated to form the entire layer IVH. Even when the multilayer wiring board 11 having the structure is manufactured, the multilayer wiring board 11 in which the upper and lower wiring conductors 6 are electrically connected to each other can be obtained.
[0030]
In the present invention, the thermal expansion coefficient of the cured adhesive layer 2 is set to 15 × 10 −6 to 30 × 10 −6 / ° C. so that the thermal expansion coefficient of the cured adhesive layer 2 is the heat of the through conductor 5. The expansion coefficient can be approximated, thereby effectively applying a large stress between the through conductor 5 and the wiring conductor 6 due to the difference in thermal expansion coefficient between the adhesive layer 2 and the through conductor 5. As a result, the electrical connection reliability between the through conductor 5 and the wiring conductor 6 can be made extremely high. Therefore, it is preferable that the thermal expansion coefficient of the cured adhesive layer 2 is in the range of 15 × 10 −6 to 30 × 10 −6 / ° C.
[0031]
In order to cure the uncured adhesive layer 2A so that the thermal expansion coefficient of the cured adhesive layer 2 is 15 × 10 −6 to 30 × 10 −6 / ° C., 30 to 30 in the uncured adhesive layer 2A About 60% by weight of an inorganic filler is previously contained, and the adhesive layer 2A may be cured almost completely. When the content of the inorganic filler in the uncured adhesive layer is less than 30% by weight, it becomes difficult to make the thermal expansion coefficient of the cured adhesive layer 2 30 × 10 −6 / ° C. or less, and 60% by weight In the case of exceeding, it becomes difficult to set the thermal expansion coefficient of the cured adhesive layer 2 to 15 × 10 −6 / ° C. or more and the adhesive force of the adhesive layer 2 tends to be low. Therefore, when the uncured adhesive layer 2A is cured, it is preferable that the thermal expansion coefficient of the cured adhesive layer 2 be in the range of 15 × 10 −6 to 30 × 10 −6 / ° C.
[0032]
Thus, according to the method for manufacturing a wiring board of the present invention, since the insulating plate 1 has already been cured before heating and pressurization, it is possible to apply heating during the lamination of the first substrate 7 and the second substrate 8. The insulation plate 1 is not deformed by the pressure. Accordingly, the through conductor 5 is not greatly deformed, and the position accuracy of the through conductor 5 can be maintained extremely high. As a result, a plurality of insulating plates 1 having the through conductor 5 are laminated to form the entire layer IVH. Even when the multilayer wiring board 11 having the structure is manufactured, the multilayer wiring board 11 in which the upper and lower wiring conductors 6 are electrically connected to each other can be obtained.
[0033]
In addition, this invention is not limited to the above-mentioned Example, A various change is possible if it is the range which does not deviate from the summary of this invention. For example, after the first substrate 7 and the second copper foil 6B are alternately laminated on the upper surface and / or the lower surface of the multilayer wiring board 11 obtained in the above-described embodiment, and heated and pressurized, The second copper foil 6B can be patterned to form a second wiring conductor 6D to be multilayered.
[0034]
【The invention's effect】
According to the method for manufacturing a multilayer wiring board of the present invention, the through conductor and the wiring conductor are formed on a cured organic material insulating plate, and then the insulating plate having the through conductor and the wiring conductor is laminated in a plurality of layers. The insulating plate and the through conductor are not deformed by heating and pressurization when the insulating plates are laminated. Accordingly, the through conductors formed on the insulating plate can be formed with high positional accuracy, and thereby the wiring conductors positioned above and below each insulating plate can be accurately connected by the through conductor.
[0035]
Further, according to the method for producing a multilayer wiring board of the present invention, since the thermal expansion coefficient of the cured adhesive layer is 15 × 10 −6 to 30 × 10 −6 / ° C., the heat of the cured adhesive layer The expansion coefficient can be approximated to the thermal expansion coefficient of the through conductor, thereby providing a multilayer wiring board having an all-layer IVH structure with extremely high electrical connection reliability between each through conductor and the wiring conductor. .
[Brief description of the drawings]
FIGS. 1A to 1F are cross-sectional views for each process for explaining a method of manufacturing a multilayer wiring board according to the present invention.
FIG. 2 is a cross-sectional view showing an example of a conventional multilayer wiring board.
FIGS. 3A to 3F are cross-sectional views for each process for explaining a method of manufacturing the conventional multilayer wiring board shown in FIG.
[Explanation of symbols]
1 .... Insulating plate 2 ... Adhesive layer 2A ... Uncured adhesive layer 3 ... Protective layer 4 ... Penetration Hole 5 .... Through conductor 5A ... Uncured through conductor 6A ... First copper foil 6B ... Second copper foil 6C First wiring conductor 6D Second wiring conductor 7 First substrate 8 Second substrate
11 ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ Multilayer wiring board

Claims (1)

硬化した熱硬化性樹脂およびガラスクロスを含む絶縁板の上下面に、未硬化の熱硬化性樹脂および30〜60重量%の無機フィラーを含むとともに硬化後の熱膨張係数が15×10 -6 〜30×10 -6 /℃である接着層および該接着層に対して剥離可能に設けられた保護層を積層する第1の工程と、
前記絶縁板および前記接着層および前記保護層に、これらを貫通する貫通孔を形成する第2の工程と、
前記貫通孔内に導電性ペーストを充填して未硬化の貫通導体を形成した後、前記保護層を剥離して、前記絶縁板と前記未硬化の貫通導体と前記未硬化の接着層とから成る第1の基板を得る第3の工程と、
該第1の基板の上下面に第1の銅箔を積層した後、これらを加熱加圧して前記未硬化の貫通導体を硬化するとともに、前記未硬化の接着層硬化することによって前記第1の基板の上下面に前記銅箔を接着し、しかる後、前記第1の銅箔をパターン加工することにより硬化した貫通導体と電気的に接続された第1の配線導体を形成して、前記絶縁板と前記硬化した貫通導体と硬化した接着層と前記第1の配線導体とから成る第2の基板を得る第4の工程と、
該第2の基板の上下面に、前記第1の基板と第2の銅箔とを順々に、前記第1の配線導体と前記第1の基板の前記未硬化の貫通導体とが電気的に接続されるように積層した後、これらを加熱加圧して前記第1の基板の前記未硬化の貫通導体を硬化するとともに、前記第1の基板の前記未硬化の接着層を硬化することによって前記第2の基板と前記第1の基板と前記第2の銅箔とを接着する第5の工程と、
前記第2の銅箔をパターン加工することにより前記第1の基板の前記硬化した貫通導体と電気的に接続する第2の配線導体を形成して、上下に位置する前記第2の配線導体間を前記第1の基板および前記第2の基板の前記硬化した貫通導体で電気的に接続する第6の工程とを有することを特徴とする多層配線基板の製造方法。
The upper and lower surfaces of the insulating plate containing the cured thermosetting resin and glass cloth contain an uncured thermosetting resin and 30 to 60% by weight of an inorganic filler and have a thermal expansion coefficient after curing of 15 × 10 −6 to A first step of laminating an adhesive layer that is 30 × 10 −6 / ° C. and a protective layer that is detachable from the adhesive layer;
A second step of forming a through-hole penetrating the insulating plate, the adhesive layer, and the protective layer; and
After forming an uncured through conductor by filling the through hole with a conductive paste, the protective layer is peeled off, and the insulating plate, the uncured through conductor, and the uncured adhesive layer are formed. A third step of obtaining a first substrate;
After laminating the first copper foil on the upper and lower surfaces of the first substrate, while curing the through conductors of said uncured them by heating and pressing, the second by curing the adhesive layer of the uncured 1 Bonding the copper foil to the upper and lower surfaces of the substrate, and then forming a first wiring conductor electrically connected to the cured through conductor by patterning the first copper foil, A fourth step of obtaining a second substrate comprising an insulating plate, the cured through conductor, a cured adhesive layer, and the first wiring conductor;
The first wiring conductor and the uncured through conductor of the first substrate are electrically connected to the upper and lower surfaces of the second substrate in order of the first substrate and the second copper foil. After being laminated so as to be connected to each other, they are heated and pressed to cure the uncured through conductors of the first substrate and by curing the uncured adhesive layer of the first substrate . A fifth step of bonding the second substrate, the first substrate, and the second copper foil;
By patterning the second copper foil, a second wiring conductor that is electrically connected to the hardened through conductor of the first substrate is formed, and between the second wiring conductors positioned above and below And a sixth step of electrically connecting the first and second substrates with the hardened through conductors of the second substrate.
JP2001231412A 2001-04-27 2001-07-31 Manufacturing method of multilayer wiring board Expired - Fee Related JP4803919B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001231412A JP4803919B2 (en) 2001-04-27 2001-07-31 Manufacturing method of multilayer wiring board

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2001133234 2001-04-27
JP2001-133234 2001-04-27
JP2001133234 2001-04-27
JP2001231412A JP4803919B2 (en) 2001-04-27 2001-07-31 Manufacturing method of multilayer wiring board

Publications (2)

Publication Number Publication Date
JP2003017857A JP2003017857A (en) 2003-01-17
JP4803919B2 true JP4803919B2 (en) 2011-10-26

Family

ID=26614526

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001231412A Expired - Fee Related JP4803919B2 (en) 2001-04-27 2001-07-31 Manufacturing method of multilayer wiring board

Country Status (1)

Country Link
JP (1) JP4803919B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5463315B2 (en) * 2011-03-17 2014-04-09 富士フイルム株式会社 Electrode sheet, electrode sheet manufacturing method, and touch panel

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63234589A (en) * 1987-03-24 1988-09-29 新日鐵化学株式会社 Multilayer interconnection board
JP3014365B2 (en) * 1997-07-16 2000-02-28 松下電器産業株式会社 Wiring board, intermediate connector, method of manufacturing wiring board, and method of manufacturing intermediate connector
JP2001015919A (en) * 1999-06-25 2001-01-19 Ibiden Co Ltd Multilayer printed wiring board, circuit-board therefor and its manufacture

Also Published As

Publication number Publication date
JP2003017857A (en) 2003-01-17

Similar Documents

Publication Publication Date Title
JP3197213B2 (en) Printed wiring board and method of manufacturing the same
JP6200178B2 (en) Electronic component built-in substrate and manufacturing method thereof
US8178191B2 (en) Multilayer wiring board and method of making the same
JP5581218B2 (en) Method for manufacturing printed wiring board
KR101116079B1 (en) Method for manufacturing multilayer printed circuit board and multilayer printed circuit board
WO2001045478A1 (en) Multilayered printed wiring board and production method therefor
WO1997048260A1 (en) One-sided circuit board for multi-layer printed wiring board, multi-layer printed wiring board, and method for its production
JP4040389B2 (en) Manufacturing method of semiconductor device
WO2006118141A1 (en) Multilayer wiring board and method for producing same
JP2002076578A (en) Printed wiring board and manufacturing method therefor
JP2008300819A (en) Printed circuit board and method for manufacturing the same
JP4378511B2 (en) Electronic component built-in wiring board
KR101205464B1 (en) Method for manufacturing a printed circuit board
JP4803918B2 (en) Manufacturing method of multilayer wiring board
JP2004273575A (en) Multilayer printed wiring board and its manufacturing method
JP4803919B2 (en) Manufacturing method of multilayer wiring board
JP4899409B2 (en) Multilayer printed wiring board and manufacturing method thereof
JP4816343B2 (en) High heat dissipation substrate and manufacturing method thereof
JP4797742B2 (en) Multilayer wiring board and manufacturing method thereof
JP4892924B2 (en) Multilayer printed wiring board and manufacturing method thereof
JPH1056267A (en) Multilayer printed wiring board and its manufacture
JP2002329967A (en) Method of manufacturing multilayer printed wiring board
JP4622939B2 (en) Circuit board manufacturing method
JP3840953B2 (en) Circuit board and manufacturing method thereof
JP2007115952A (en) Interposer substrate and manufacturing method thereof

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20080317

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20100915

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100921

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20101119

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20110712

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20110809

R150 Certificate of patent (=grant) or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140819

Year of fee payment: 3

LAPS Cancellation because of no payment of annual fees