JPH1051287A - Semiconductor relay circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the low-output capacitance type semiconductor relay circuit, suitable for controlling high-frequency signals without incurring a cost increase. SOLUTION: The output capacitance of a 1st output field effect transistor(TR) 5A and a 2nd output field effect TR 5B is reduced by realizing the configuration that a 1st PNP bipolar junction TR 23A, a 2nd PNP bipolar junction TR 23B, a 1st diode 19A and a 2nd diode 21A which configure a discharge circuit act like a simultaneous anti-parallel diode connection to respective gates of the 1st output field effect TR 5A and the 2nd output field effect TR 5B.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention converts an input signal into an optical signal by a light emitting diode, converts the optical signal into an electric signal by a photodiode array optically coupled to the light emitting diode, and outputs the electric signal by the electric signal. M
The present invention relates to a semiconductor relay circuit that drives an OS field-effect transistor to obtain an output contact signal, and more particularly to a low output capacitance type semiconductor relay circuit suitable for controlling a high-frequency signal.

[0002]

2. Description of the Related Art Heretofore, for example, there have been the following types of semiconductor relay circuits.

FIG. 2 is a circuit diagram of a conventional semiconductor relay circuit. This semiconductor relay circuit has input terminals 7A and 7B.
, A photodiode array 3 optically coupled to the light emitting diode 1, a resistance impedance element 11 connected in parallel with the photodiode array 3, and a drain connected to the output terminal 9A. Output MOS field effect transistor (hereinafter referred to as “M
OSFET ". 5) and an output MOSFET 5B having a drain connected to the output terminal 9B. The gates of the output MOSFETs 5A and 5B are both connected to the anode side of the photodiode array 3, and the sources are both connected to the cathode side of the photodiode array 3.

With the above configuration, when an input current flows between the input terminals 7A and 7B, the light emitting diode 1 generates an optical signal, and a photoelectromotive force is generated at both ends of the photodiode array 3 by the optical signal. The photoelectromotive force generated at both ends of the photodiode array 3 is applied between the gate and the source of the output MOSFETs 5A and 5B, whereby the output MOSFETs 5A and 5B are turned on. On the other hand, when the input current between the input terminals 7A and 7B is cut off, the generation of photovoltaic power by the photodiode array 3 stops. Then, the electric charge accumulated in the capacitance between the gate and the source of the output MOSFETs 5A and 5B is discharged through the resistance impedance element 11, and is output.
The SFETs 5A and 5B are turned off.

In this semiconductor relay circuit, an output MOS
By discharging the electric charge accumulated in the capacitance between the gate and the source of the FET 5 through the resistance impedance element 11, the output MOSFET 5 is turned off from the ON state.
The discharge time is determined by the CR time constant, and high-speed discharge is impossible. Therefore, the semiconductor relay circuit cannot realize high-speed operation.

On the other hand, as a semiconductor relay circuit having a configuration enabling high-speed discharge, for example, there is one shown in FIG. The same components as those of the conventional example shown in FIG. 2 are denoted by the same reference numerals.

The semiconductor relay circuit shown in FIG. 3 is different from the semiconductor relay circuit shown in FIG. 2 in that a discharge circuit composed of a resistive impedance element 11 is connected to a photodiode array 3 in parallel with a junction type field effect. This is replaced with a discharge circuit including a transistor (J-FET) 13 and a resistive impedance element 11 connected between the gate and the source of the junction field effect transistor (J-FET) 13.

In this semiconductor relay circuit, the photovoltaic power generated at both ends of the photodiode array 3 is applied to the output MOS.
When a voltage is applied between the gate and source of the FETs 5A and 5B, a reverse bias voltage is simultaneously applied between the gate and source of the junction field effect transistor 13, so that the junction field effect transistor 13 instantaneously enters a high impedance state. On the other hand, when the electric charge accumulated in the capacitance between the gate and the source of the output MOSFETs 5A and 5B is discharged through the junction field effect transistor 13, there is no bias between the gate and the source of the junction field effect transistor 13. Therefore, the junction field effect transistor 13 is turned on.

Further, the semiconductor relay circuit shown in FIG. 4 can also perform high-speed discharge. The same components as those of the conventional example shown in FIG. 2 are denoted by the same reference numerals.

The semiconductor relay circuit shown in FIG. 4 is different from the semiconductor relay circuit shown in FIG. 2 in that a discharge circuit composed of a resistive impedance element 11 is replaced with a bipolar junction transistor (parallel to the photodiode array 3). BJT) 15 and a bipolar junction transistor 15
A diode 17 having an anode connected to the emitter and a cathode connected to the base, and a bipolar junction transistor 15
Is replaced by a discharge circuit composed of a resistive impedance element 11 connected between the base and the collector.

In this semiconductor relay circuit, the photovoltaic power generated at both ends of the photodiode array 3 is generated by the output MOS.
When the voltage is applied between the gate and the source of the FETs 5A and 5B, the voltage which turns on between the base and the emitter of the bipolar junction transistor 15 is not biased. When discharging the electric charge accumulated in the capacitance between the gate and the source of the MOSFETs 5A and 5B, the base and the emitter of the bipolar junction transistor 15 are biased in the forward direction, the bipolar junction transistor 15 is turned on, and the collector A current that flows between the emitter and the base is h _FE (current amplification factor) times the current flowing between the base and the emitter.

Here, when the semiconductor relay circuit shown in FIGS. 2, 3 and 4 is used for controlling a high-frequency signal, it is necessary to reduce the output capacitance of the output MOSFETs 5A and 5B. This is because if the output capacitance is large, the high-frequency component flows through the output capacitance even if the output MOSFETs 5A and 5B are in the OFF state, but the output M that can realize such low output capacitance can be realized.
An OSFET is disclosed in Japanese Patent Application Laid-Open No. 5-21803.

In this output MOSFET, by connecting a diode to the gate in series, the sum of the gate-source capacitance and the diode capacitance comes in series with the gate-drain capacitance. The output capacity can be reduced.

Accordingly, the output MOSFE described above is used.
When T is used in the semiconductor relay circuits shown in FIGS. 2, 3 and 4, the diode 19 is connected to the gates of the output MOSFETs 5A and 5B as shown in FIGS.
A, 19B, 21A and 21B are connected.

[0015]

However, the conventional semiconductor relay circuits shown in FIG. 5, FIG. 6 and FIG.
There were the following problems.

In the semiconductor relay circuits shown in FIGS. 5, 6 and 7, the diode 19 is provided in the charge / discharge loop.
Since A, 19B, 21A, and 21B are connected in series, the voltage applied between the gate and source of the output MOSFETs 5A and 5B is smaller than the photovoltaic power of the photodiode array 3 by the voltage drop generated by the diode. Only the voltage becomes low. Therefore, in order to obtain the same performance as when the output MOSFET described in JP-A-5-21803 is not used, it is necessary to increase the number of photodiodes forming the photodiode array 3. This leads to an increase in the chip area, which leads to a significant cost increase. The diode 19
The addition of the four diodes A, 19B, 21A, and 21B is a cause of an increase in cost.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a low output capacity type semiconductor relay circuit suitable for controlling a high frequency signal without increasing the cost. .

[0018]

According to the present invention, there is provided a light emitting diode for generating an optical signal in response to an input signal, and a photodiode array for receiving the optical signal and generating a photoelectromotive force. A first output field effect transistor having a gate connected to the anode of the photodiode array and a source connected to the cathode; and a first output field effect transistor having a gate connected to the anode of the photodiode array and a source connected to the cathode. 2, a first pnp-type bipolar junction transistor having an emitter connected to the gate of the first output field-effect transistor and a collector connected to the source, and the second output field-effect transistor. A second pnp-type transistor whose emitter is connected to the gate of the effect transistor and whose collector is connected to the source; Over La junction transistor and the first pnp-type bipolar junction transistors and said second
A resistive impedance element connected between the base of the pnp-type bipolar junction transistor and the collectors of the first pnp-type bipolar junction transistor and the second pnp-type bipolar junction transistor; and the first pnp-type bipolar junction transistor A first diode having an anode connected to the base of the junction transistor and a cathode connected to the emitter; and a second diode having an anode connected to the base of the second pnp bipolar junction transistor and a cathode connected to the emitter. And a diode.

According to the above configuration, a combination of a bipolar junction transistor and a diode is provided for each of the first output field-effect transistor and the second output field-effect transistor. This realizes a configuration in which a diode is connected in series to the gate like the MOSFET for output described in Japanese Patent Application Laid-Open No. Hei 5-21803, and four new diodes are added as in the prior art. There is no necessity, and therefore, there is no cost increase that has been a problem in the past. Further, since the number of diodes connected in series in the charging / discharging loop is smaller than in the related art, it is possible to reduce the voltage drop caused by the diodes.

Here, specifically, a first chip including the light emitting diode, the photodiode array, the first pnp type bipolar junction transistor,
A second chip including the second pnp bipolar junction transistor, the resistive impedance element, the first diode, and the second diode;
And the third chip including the second output field effect transistor.

[0021]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram of a semiconductor relay circuit according to an embodiment of the present invention. The same components as those of the conventional example shown in FIG. 2 are denoted by the same reference numerals.

Referring to FIG. 1, a semiconductor relay circuit according to an embodiment of the present invention includes a light emitting diode 1 connected between input terminals 7A and 7B, a photodiode array 3 optically coupled to light emitting diode 1, Bipolar junction transistors 23A and 23B connected in parallel with photodiode array 3, and bipolar junction transistors 2
A resistive impedance element 11 connected between the base and collector of 3A and connected between the base and collector of bipolar junction transistor 23B, and a diode 19A connected between the base and emitter of bipolar junction transistor 23A. A diode 21A connected between the base and the emitter of the bipolar junction transistor 23B, an output MOSFET 5A having a drain connected to the output terminal 9A, and an output MOSFET 5B having a drain connected to the output terminal 9B. I have. The gates of the output MOSFETs 5 and 5B are both connected to the anode of the photodiode array 3, and the sources are both connected to the cathode of the photodiode array 3.

Here, the bipolar junction transistor 23
As A and 23B, ordinary npn-type bipolar junction transistors are used.

Next, the operation of the semiconductor relay circuit will be described.

When an input current flows between the input terminals 7A and 7B, the light emitting diode 1 generates an optical signal, and a photoelectromotive force is generated at both ends of the photodiode array 3 by the optical signal. Then, the photoelectromotive force generated at both ends of the photodiode array 3 is applied between the gate and source of the output MOSFETs 5A and 5B, and charges between the gate and source.

At this time, a reverse bias is applied between the emitter and the base of the bipolar junction transistor 23A by the diode 19A, and a forward bias is applied between the collector and the base by the resistive impedance element 11.
9B, a reverse bias is applied between the emitter and the base of the bipolar junction transistor 23B, and a forward bias is applied between the collector and the base by the resistive impedance element 11, so that the bipolar junction transistors 23A and 23B
The state becomes the FF state. Therefore, the current due to the photovoltaic voltage generated at both ends of the photodiode array 3 does not flow through the collector-emitter of the normally-off type driving transistor 15, and most of the current flows through the output MOSFE.
Since the current charges the capacitance between the gate and the source of T5A and 5B, the output MOSFETs 5A and 5B can be turned on in a short time.

On the other hand, when the input current between the input terminals 7A and 7B is cut off, the generation of photovoltaic power by the photodiode array 3 stops, and the output MOSFETs 5A and 5B
Of the electric charge accumulated in the capacitance between the gate and the source of the semiconductor device is discharged.

At this time, the bipolar junction transistor 23A is turned on by the diode 19A and the resistive impedance element 11, and the bipolar junction transistor 23B is turned on by the diode 19B and the resistive impedance element 11. Therefore, the output MOSF
The electric charge accumulated in the capacitance between the gate and the source of the ETs 5A and 5B is quickly discharged via the bipolar junction transistors 23A and 23B, and the output MOSFETs 5A and 5B are turned off in a short time. be able to.

The feature of this embodiment is that the output M
By providing a combination of a bipolar junction transistor and a diode for each of the OSFETs 5A and 5B, a diode is functionally connected to the gate like the output MOSFET described in the above-mentioned Japanese Patent Application Laid-Open No. Hei 5-21803. The point is that the configuration is realized. That is, since diodes (diodes 19C and 21C) are equivalently formed between the emitters and the bases of the bipolar junction transistors 23A and 23B, it is not necessary to add four additional diodes as in the related art. However, there is no increase in cost, which has been a problem in the past.

Further, in the semiconductor relay circuit according to the present embodiment, since only diodes 19A and 21A are connected in series in the charging / discharging loop, conventional diodes shown in FIGS. 5, 6 and 7 are used. It is possible to reduce the voltage drop caused by the diode as compared with a semiconductor relay circuit.

[0031]

As described above, according to the present invention, a low output capacity type semiconductor relay circuit suitable for controlling a high frequency signal without increasing the cost can be realized.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a semiconductor relay circuit according to an embodiment of the present invention.

FIG. 2 is a circuit diagram of a conventional semiconductor relay circuit.

FIG. 3 is a circuit diagram of a conventional semiconductor relay circuit capable of high-speed discharge.

FIG. 4 is another circuit diagram of a conventional semiconductor relay circuit capable of high-speed discharge.

FIG. 5 is a circuit diagram when the semiconductor relay circuit shown in FIG. 2 is of a low output capacitance type.

6 is a circuit diagram when the semiconductor relay circuit shown in FIG. 3 is of a low output capacitance type.

FIG. 7 is a circuit diagram when the semiconductor relay circuit shown in FIG. 4 is of a low output capacitance type.

[Explanation of symbols]

Reference Signs List 1 light emitting diode 3 photodiode array 5A, 5B output MOSFET 7A, 7B input terminal 9A, 9B output terminal 11 resistive impedance element 13 junction type field effect transistor (J-FET) 15 bipolar junction transistor 17, 19A, 19B, 19C , 21A, 21B, 21
C diode 23A, 23B pnp type bipolar junction transistor

Claims (2)

[Claims] 1. A light emitting diode that generates an optical signal according to an input signal, a photodiode array that receives the optical signal and generates a photoelectromotive force, a gate connected to an anode of the photodiode array, and a source connected to a cathode. A first output field-effect transistor connected to the photodiode array, a second output field-effect transistor having a gate connected to the anode of the photodiode array and a source connected to the cathode, and the first output field-effect transistor. A first pnp-type bipolar junction transistor having an emitter connected to the gate of the effect transistor and a collector connected to the source; and an emitter connected to the gate of the second output field effect transistor and a collector connected to the source. A second pnp bipolar junction transistor and the first pnp bipolar transistor LA junction transistor and the second
A resistive impedance element connected between the base of the pnp-type bipolar junction transistor and the collectors of the first pnp-type bipolar junction transistor and the second pnp-type bipolar junction transistor; and the first pnp-type bipolar junction transistor A first diode having an anode connected to the base of the junction transistor and a cathode connected to the emitter; and a second diode having an anode connected to the base of the second pnp bipolar junction transistor and a cathode connected to the emitter. A semiconductor relay circuit having a diode. 2. The semiconductor relay circuit includes a first chip including the light emitting diode, the photodiode array, the first pnp bipolar junction transistor, the second pnp bipolar junction transistor, and the resistor. A second chip including a neutral impedance element, the first diode and the second diode;
2. The semiconductor relay circuit according to claim 1, further comprising a third chip including the first output field effect transistor and the second output field effect transistor.