JPH1041636A - Manufacture of multilayer printed wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the positioning accuracy of a photomask by laying a photomask film having a reference mark pattern and conductor pattern on a photosensitive resin insulation film and setting positioning marks on reference marks of a lower layer recognizable through the photosensitive resin layer and inter-layer insulation layer. SOLUTION: A substrate 1 has a reference mark 2 formed by cutting a circular hole through a part of a conductor surface. An interlayer insulation film is formed on the substrate 1 and dried, a photomask film 4 having circular positioning marks 51 and circular pattern 52a drawn for forming via holes is laid thereon to set the mark 51 to a reference mark 2 which is recognizable through the interlayer insulation layer and provides via-forming holes after positioning. A photosensitive resin layer is the formed. The mark 2 is recognizable through the interlayer insulation layer and photosensitive resin layer, thereby improving the photomask positioning accuracy.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer printed wiring board, and more particularly, to a method for manufacturing a multilayer printed wiring board using fiducial marks excellent in the positioning accuracy of a photomask used for forming a plating resist. It relates to a manufacturing method.

[0002]

2. Description of the Related Art In a method of manufacturing a so-called build-up multilayer printed wiring board, an uncured interlayer resin insulating material (adhesive for electroless plating) is applied by a roll coater, dried and cured, and then a via hole is formed. Formed and subjected to electroless plating to form a conductor circuit. In such a manufacturing method, if the position of the via hole or the position where the pattern is formed shifts, a connection failure occurs. In the formation of via holes and pattern formation in plating resist, generally, a reference mark formed on a substrate is used to align a photomask on which a pattern is drawn with the reference mark, or the reference mark is visually recognized. The via hole formation position is calculated by using the laser, and the hole is opened by the laser.

[0003]

However, in the build-up multilayer printed wiring board, since the interlayer insulating material is always laminated, a plurality of interlayer insulating materials are formed on the reference mark. I will hide it. For this reason, when several layers were laminated, the fiducial marks could not be recognized and the positioning could not be performed. An object of the present invention is to provide a manufacturing method for forming via holes and patterns with high precision, which can be used for build-up multilayer printed wiring boards and can always recognize reference marks even when a plurality of layers are formed. .

[0004]

According to the present invention, there is provided a method for manufacturing a multilayer printed wiring board, comprising the following steps (a) to (e). (A) A part of the conductor surface is circular A step of forming an interlayer resin insulating material layer on a substrate provided with a reference mark formed by hollowing out (b) providing a hole for forming a via hole in the interlayer resin insulating material layer using the reference mark; (C) a step of forming a photosensitive resin layer (d) a positioning mark composed of a circle having the same diameter as or smaller than the hollowed-out circular portion serving as a reference mark, and a part of the surface formed into a circle A photomask film on which a reference mark pattern and a conductor pattern formed by hollowing are drawn is placed on the photosensitive resin layer, and the positioning mark is recognized through the photosensitive resin layer and the interlayer resin insulating material layer. Can Forming a plating resist for forming a new reference mark at a position that does not overlap the conductive pattern and the lower reference mark after exposing and developing the photosensitive resin layer after the alignment with the lower reference mark. (E) Step of forming conductive pattern and reference mark by electroless plating ”.

[0005] In the present invention, "a part of a conductor surface is formed by hollowing out a circle" means "a form in which a conductor surface is removed by etching in a circle" and "a form in which a plating resist is formed in a circle". Is provided, plating is deposited around a circular plating resist to form a conductor surface, and as a result, a part of the conductor surface is hollowed out in a circular shape ”.

In the present invention, since the reference mark is recognized through one interlayer insulating material layer or one interlayer insulating material layer and a photosensitive resin layer for forming a plating resist, two or more reference marks are formed. The reference mark is not always hidden by the interlayer resin insulating material layer, the reference mark can be always recognized, and the positioning of the photomask for forming a via hole and the photomask for forming a pattern can be performed accurately and easily. .

Further, even when a via hole is formed by a laser, the reference mark is formed by cutting a part of the conductor surface into a circular shape. The reference mark can be easily recognized, and positioning can be performed by image processing.

According to the present invention, an interlayer resin insulation layer is formed by dispersing cured heat-resistant resin particles soluble in an acid or an oxidizing agent in an uncured heat-resistant resin that is hardly soluble in an acid or an oxidizing agent. It is particularly advantageous when "things" are used.
This is because such an interlayer resin insulating material cannot recognize a reference mark when two or more layers overlap because it contains particles, and the present invention solves this problem.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a method for manufacturing a multilayer printed wiring board according to the present invention will be described in detail. (A) The substrate (core material) 1 used in the present invention is formed by etching a copper-clad laminate to form a copper pattern or bonding to a glass epoxy substrate, a polyimide substrate, a ceramic substrate, a metal substrate, or the like for electroless plating. A copper layer can be formed by forming an agent layer, roughening the layer, forming a roughened surface, and performing electroless plating on the roughened surface. In any case, the substrate 1 is provided with a reference mark 2 having a form in which a part of a conductor surface (most commonly made of copper) is hollowed out in a circle (FIG. 1). FIG. 9 is a diagram viewed from above the substrate. In FIGS. 1 and 9, the center of the square conductor surface is hollowed out to provide a perfect circle reference mark. The circle does not necessarily have to be provided on a square conductor surface, but may be formed on a conductor having a wide surface, and may be formed on a triangular surface or a plane surface used for power supply layers and ground layers. Good. A perfect circle has a uniform distance from the center point and is easy to perform two-dimensional positioning. Through holes are formed in the core substrate to electrically connect the wiring layers on the front surface and the back surface.

(B) Next, an interlayer resin insulating material layer 3 is formed on the substrate 1 (FIG. 2). FIG. 10 illustrates a diagram viewed from above the substrate. Interlayer insulating material layer, epoxy resin, polyimide resin, bismaleimide triazine resin,
Thermosetting resins such as phenolic resins, photosensitive resins obtained by sensitizing them, thermoplastic resins such as polyethersulfone, composites of thermoplastic resin and thermosetting resin, and composites of photosensitive resin and thermoplastic resin Can be used. Also,
The interlayer insulating agent is preferably an adhesive for electroless plating. As the adhesive for electroless plating, an adhesive obtained by dispersing cured heat-resistant resin particles soluble in an acid or an oxidizing agent in an uncured heat-resistant resin hardly soluble in an acid or an oxidizing agent is most suitable. . This is because by roughening and removing the heat-resistant resin particles soluble in an acid or an oxidizing agent, an octopus-shaped anchor can be formed on the surface and the adhesion to the conductor circuit can be improved.

As the heat-resistant resin hardly soluble in an acid or an oxidizing agent, a photosensitive thermosetting resin or a composite of a photosensitive thermosetting resin and a thermoplastic resin is desirable. By sensitizing, via holes can be easily formed by exposure and development. Further, by forming a composite with a thermoplastic resin, the toughness can be improved, the peel strength of the conductor circuit can be improved, and the occurrence of cracks in the via holes due to the heat cycle can be prevented.

Specifically, epoxy acrylate obtained by reacting an epoxy resin with acrylic acid or methacrylic acid, or a composite of epoxy acrylate and polyether sulfone is preferred. Epoxy acrylate has two of all epoxy groups.
It is desirable that 0 to 80% react with acrylic acid or methacrylic acid.

Further, the heat-resistant resin particles include:
Heat-resistant resin powder having an average particle size of 10 μm or less, aggregated particles obtained by aggregating a heat-resistant resin powder having an average particle size of 2 μm or less,
A mixture of a heat-resistant powder resin powder having an average particle size of 10 μm or less and a heat-resistant resin powder having an average particle size of 2 μm or less, on the surface of the heat-resistant resin powder having an average particle size of 2 μm to 10 μm,
It is desirable to select from pseudo particles obtained by adhering at least one of a heat-resistant resin powder and an inorganic powder having an average particle diameter of 2 μm or less. These are because they can form complex anchors.

As the heat-resistant resin particles, epoxy resin, amino resin (melamine resin, urea resin, guanamine resin) and the like are preferable. The solubility of the epoxy resin in an acid or an oxidizing agent can be arbitrarily changed by changing the type of the oligomer, the type of the curing agent, and the crosslink density. For example, a bisphenol A-type epoxy resin oligomer cured with an amine-based curing agent is easily dissolved in an oxidizing agent. However, the novolak epoxy resin oligomer cured with an imidazole-based curing agent is hardly dissolved in the oxidizing agent.

The acid used in the present invention includes phosphoric acid, hydrochloric acid, sulfuric acid, and organic acids such as formic acid and acetic acid, and organic acids are particularly preferable. This is because when the roughening treatment is performed, the metal conductor layer exposed from the via hole is hardly corroded.
The oxidizing agent is preferably chromic acid or permanganate (such as potassium permanganate). In particular, in the case of dissolving and removing the amino resin, it is preferable to perform a roughening treatment alternately with an acid and an oxidizing agent. Note that the interlayer insulating material layer does not need to be formed by one application, but may be formed by applying a plurality of times.

(C) The interlayer resin insulating material layer 3 is dried. The photomask film 4 on which the circular positioning mark 51 and the via-hole forming circular pattern 52 are drawn is placed, and the positioning mark 51 is aligned with the reference mark 2 recognized through the interlayer resin insulating material layer (FIG. 3). Specifically, the positioning mark 51 is prepared so that the circle of the positioning mark 51 falls within the circle that is the reference mark 2. FIG. 11 shows a view from above the substrate. The reference mark 2 can be recognized through only one interlayer resin insulating material layer 3.

The difference between the diameter of the circle of the reference mark 2 and the diameter of the circle of the positioning mark 51 is an allowable deviation width. Whether the diameter of the circle of the positioning mark 51 is the same as the diameter of the reference mark 2,
Or small. In the opposite case, the positioning cannot be performed. Next, exposure and development are performed to provide holes 6 for forming via holes (FIG. 4). FIG. 12 shows a view from above the substrate. At this time, a hole 61 is formed in the interlayer resin insulating material layer 3 by the positioning mark 51. The difference between the center point of the circle of the hole 61 and the reference mark 2 and the center point of the hole 61 indicates the amount of deviation of the via hole.

FIG. 3 shows an example in which the photosensitive resin is used to carry out the exposure and development processing. However, even if laser irradiation is performed to burn the interlayer resin insulating material layer 3 to form the holes 6 for forming via holes. Good. In this case, no hole 61 is formed.

In the case of a laser, the reference mark 2 is recognized by a silhouette obtained by reflected light or transmitted light of the conductor surface recognized through the interlayer resin insulating material layer.
The position of the substrate is recognized from the center point of the hollow, the data of the coordinates of the formation position of the via hole is calculated from the position, and the position is irradiated with a laser to provide a hole 6 for forming a via hole.

Next, after the surface is roughened (omitted for simplicity in the figure), a catalyst nucleus is provided. The catalyst nucleus is preferably a noble metal ion or a colloid, and generally uses palladium chloride or a palladium colloid. It is desirable to perform a heat treatment to fix the catalyst core. The catalyst core is preferably palladium.

(D) After providing the catalyst nuclei, a photosensitive resin layer 7 for forming a plating resist is formed (FIG. 5). FIG. 13 shows a view from above the substrate. The hole 61 is filled with the photosensitive resin. As the photosensitive resin for forming the plating resist, commercially available products may be used, or a composition or epoxy acrylate comprising an epoxy acrylate and an imidazole curing agent obtained by reacting an epoxy resin with acrylic acid or methacrylic acid, A composition comprising a polyether sulfone and an imidazole curing agent is preferred.

The epoxy acrylate is preferably one in which 20 to 80% of all epoxy groups have reacted with acrylic acid or methacrylic acid. If the acrylate ratio is too high, the hydrophilicity due to the OH group increases, and the hygroscopicity increases. If the acrylate ratio is too low, the resolution decreases. As the epoxy resin as the basic skeleton resin, a novolak type epoxy resin is desirable. High crosslinking density, 0.1% water absorption of cured product
This is because it can be adjusted to the following, and has excellent base resistance. Novolak type epoxy resins include cresol novolak type and phenol novolak type.

After the formation of the photosensitive resin layer 7, the conductor pattern 8
3. A photomask film 8 on which a reference mark pattern 82 in which a part of a square surface is hollowed out and a positioning mark 81 is drawn is placed. Next, the circle of the lower reference mark 2 that can be recognized through the photosensitive resin layer for forming the plating resist and the interlayer resin insulating material layer is positioned as the positioning mark 81.
(Fig. 6). In this case, the difference between the diameter of the reference mark circle and the diameter of the positioning mark 81 is the deviation allowable amount. The diameter of the positioning mark 81 is the same as or smaller than the circle of the reference mark 2. In the opposite case, the positioning cannot be performed.

FIG. 14 shows a view from above the substrate.
The reference mark 2 can be recognized through only one of the interlayer resin insulating material layers 3 and the light-transmitting photosensitive resin layer 7. After alignment, the substrate is exposed to ultraviolet light. Then, development treatment is performed with an organic solvent such as DMTG (triethylene glycol dimethyl ether) or the like to form a plating resist 71 (FIG. 7). FIG. 15 shows a view from above the substrate.

(E) Portion where plating resist 71 is not formed (conductor pattern forming portion 73, reference mark forming portion 72, and hole 74 formed by positioning mark)
Is subjected to primary plating. As the primary plating, it is necessary to use at least two kinds of metal ions selected from copper, nickel, cobalt, and phosphorus. This is because these alloys have high strength and improve peel strength. Because it can be. In the primary electroless plating solution, it is necessary to use at least two or more types of metal ions selected from copper, nickel and cobalt. This is because these alloys have high strength and improve peel strength. Because you can do it. Also, a hydroxycarboxylic acid is required because it acts as a complexing agent and forms a stable complex with copper, nickel and cobalt ions under basic conditions.

This electroless plating solution requires a reducing agent, but this is for reducing metal ions to metal elements. The reducing agent is preferably hypophosphite. This is because nickel can be precipitated.

The pH adjuster used in the present invention is at least one selected from sodium hydroxide, potassium hydroxide and calcium hydroxide, and is a basic compound.
This is because hydroxycarboxylic acid forms a complex with nickel ions and the like under basic conditions.

The reducing agent is desirably at least one selected from aldehydes, hypophosphites (called phosphinates), borohydrides, and hydrazines. This is because these reducing agents are water-soluble and have excellent reducing power. As the hydroxycarboxylic acid, citric acid, malic acid, tartaric acid and the like are desirable. They are,
This is because it is easy to form a complex with nickel, cobalt, and copper.

The primary plating film formed by using the plating solution of the present invention has excellent followability to the roughened surface of the adhesive layer for electroless plating, and traces the form of the roughened surface as it is. Therefore, the primary plating film has an anchor like the roughened surface. Therefore, the anchor of the secondary plating film formed on the primary plating film is secured by the anchor. Since the primary plating film controls the peel strength, a plating film deposited by the plating solution of the present invention having high strength is desirable, and the secondary plating film has high electric conductivity,
Since a high deposition rate is desirable, simple copper plating is more desirable than composite plating.

The secondary plating film is a copper plating film. The secondary plating film is desirably formed by dipping in the next electroless plating solution. An electroless plating solution comprising copper ions, trialkanolamine, a reducing agent, and a pH adjuster. The trialkanolamine is desirably at least one selected from triethanolamine, triisopanolamine, trimethanolamine, and tripropanolamine. Because it is water-soluble.

The reducing agent used in the secondary electroless plating solution is desirably at least one selected from aldehyde, hypophosphite, borohydride, and hydrazine. This is because it is water-soluble and has a reducing power under basic conditions. Further, the pH adjuster is at least one selected from sodium hydroxide, potassium hydroxide and calcium hydroxide.
Desirably a seed.

In this manner, the conductor pattern 91 composed of the primary plating film and the secondary plating film, the via hole 93, the new reference mark 92 (the plating is deposited around the reference mark 92, and the non-deposited portion, ie, the circular plating The resist portion is used as a reference mark 92). The plating is also filled in the hole 74 formed by the positioning mark, and the index mark 94 is formed.

The new reference mark 92 is provided at a position not overlapping with the first reference mark 2 when viewed from above the substrate and adjacent to the reference mark 2 (FIG. 1).
6). This is because if they overlap, it is difficult to recognize the fiducial marks, and if they are far apart, the fiducial marks must be searched for, which lowers the work efficiency. The deviation between the center point of the index mark 94 and the center point of the circle of the first reference mark 2 is the pattern 9
1 or the amount of deviation of the via hole 93.

In the case of further multilayering, the steps (a) to (e) are repeated for a new reference mark 92.

[0034]

As described above in detail, according to the present invention, the reference mark can always be recognized only through the photosensitive resin layer and the interlayer resin insulating material layer, regardless of which layer is formed. The reference mark is not unrecognizable even when the layers are multilayered, and the alignment accuracy of the photomask is excellent, so that a build-up multilayer printed wiring board can be manufactured with high accuracy.

[Brief description of the drawings]

FIG. 1

FIG. 8 is a conceptual diagram (perspective view) of the manufacturing method of the present invention.

FIG. 9

FIG. 16 is a conceptual diagram of the manufacturing method of the present application (a plan view as viewed from above the substrate).

[Brief description of reference numerals]

 REFERENCE SIGNS LIST 1 substrate 2 fiducial mark (first) 3 interlayer resin insulating material layer 4 photomask film 51 positioning mark 52 circular pattern of via hole 6 hole for forming via hole 71 photosensitive resin layer 72 new fiducial mark forming part 73 Forming part of conductor pattern 74 Hole formed by positioning mark 8 Photomask film 81 Positioning mark 82 Pattern of reference mark 83 Conductor pattern 91 Conductor circuit 93 Via hole 92 New reference mark 94 Index mark

Claims (4)

[Claims] 1. A method for manufacturing a multilayer printed wiring board, comprising the following steps (a) to (e). (A) A step of forming an interlayer resin insulating material layer on a substrate provided with a reference mark formed by cutting a part of a conductor surface into a circular shape. (B) forming a hole for forming a via hole in the interlayer resin insulating material layer using the reference mark; (C) forming a photosensitive resin layer; (D) A positioning mark composed of a circle having the same diameter as or smaller than the hollow part which is the fiducial mark, a reference mark pattern and a conductor pattern formed by cutting a part of the surface into a circular shape. Is placed on the photosensitive resin layer, and the positioning mark is aligned with the lower reference mark that can be recognized through the photosensitive resin layer and the interlayer resin insulating material layer. Exposing and developing to form a plating resist for forming a new reference mark at a position that does not overlap the conductor pattern and the lower reference mark. (E) forming a conductor pattern and a reference mark by electroless plating; 2. In the step (b), the reference mark is image-recognized based on the silhouette of the conductor surface reflected by metallic luster or transmitted light, and the position of the substrate is recognized. The method for manufacturing a multilayer printed wiring board according to claim 1, wherein the calculation is performed, and a hole is formed in the interlayer resin insulating material layer by a laser. 3. In the step (b), a positioning mark comprising a circle pattern corresponding to a hole for forming a via hole and a circle having a diameter equal to or smaller than that of a hollowed-out circular portion serving as a reference mark. A photomask film on which is drawn is placed, and the positioning mark is aligned with a lower reference mark that can be recognized through the interlayer resin insulating material layer, and then exposed and developed to make a hole in the interlayer resin insulating material layer. A method for manufacturing a multilayer printed wiring board according to claim 1. 4. The method according to claim 1, wherein the steps (a) to (e) are repeated two or more times.