JPH10327423A - Solid-state image pickup device and its signal generating method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To allow a signal processing section to process per each line in the case of reading a signal at a high speed from a certain portion in a valid pixel area. SOLUTION: In a solid-state image pickup device 1, charges obtained by photoelectric conversion in a CCD 2 are read by a charge transfer section and the charges are transferred based on a horizontal synchronizing signal HD and a vertical synchronizing signal VD outputted from a timing generator 3. In the case of transferring the charges obtained by photoelectric conversion at a certain portion of the CCD 2 at a charge transfer section, a synchronizing signal generator 51 generates a horizontal synchronizing signal HD in matching with the transfer of charge per one line in the part area.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a solid-state imaging device for transferring and outputting charges obtained by photoelectrically converting a plurality of sensor units in a sensor area in which a plurality of sensor units are arranged in a matrix, and a signal generation method thereof.

[0002]

2. Description of the Related Art A CCD (Charge Coupled Device) solid-state imaging device sequentially transfers signal charges obtained in a sensor area in which a plurality of sensor units are arranged in a matrix using a vertical shift register and a horizontal shift register. It outputs an electric signal corresponding to an image.

In this CCD, signal charges for one line are taken out during one horizontal scanning period, and vertical correlation processing is performed on the basis of one horizontal scanning period. That is, by sequentially reading and outputting signal charges for each line from the sensor area in synchronization with a horizontal synchronization signal that defines one horizontal scanning period, the output signals corresponding to each line are aligned in the vertical direction. I have.

In recent years, a CCD solid-state image pickup device that effectively outputs signal charges of only a part of a sensor area for high-speed image pickup has been considered. In this CCD solid-state imaging device, for example, signal charges are output at a high speed only in the area of about 1/3 of the center of the horizontal effective pixel in the sensor area.

[0005]

However, in a solid-state imaging device corresponding to such high-speed imaging, signal charges for a plurality of lines are read and transferred during one horizontal scanning period. There is a problem that the vertical correlation processing of the output signal cannot be performed in synchronization. That is, since signals for a plurality of lines are output during one horizontal scanning period, if one line is formed based on the horizontal synchronizing signal, the output signals for a plurality of lines will be on the same line.

As described above, when output signals originally for a plurality of lines are on the same line, when this output signal is obtained and predetermined signal processing is performed based on a horizontal synchronization signal, the output signals for a plurality of lines are obtained. That is, the signal processing is performed at once. In order to avoid this, a circuit for performing vertical correlation is required separately.

[0007]

SUMMARY OF THE INVENTION The present invention relates to a solid-state imaging device and a signal generation method for solving the above-mentioned problems. That is, the solid-state imaging device of the present invention includes:
A photoelectric conversion unit having a sensor area in which a plurality of sensor units for performing photoelectric conversion are arranged in a matrix, and a charge for vertically and horizontally transferring electric charges obtained by photoelectric conversion in each sensor unit of the photoelectric conversion unit. A transfer unit, a timing generator that supplies a charge transfer signal to the charge transfer unit based on the horizontal synchronization signal and the vertical synchronization signal, and a charge transfer unit that performs photoelectric conversion on some of the sensor areas. For transfer, a synchronizing signal generator for generating a horizontal synchronizing signal in accordance with charge transfer for one line in a partial area is provided.

Further, according to the signal generation method of the present invention, the electric charge obtained by photoelectrically converting a part of the sensor area from a photoelectric conversion part having a sensor area in which a plurality of sensor parts are arranged in a matrix is provided. Is transferred based on the horizontal synchronizing signal and the vertical synchronizing signal, a horizontal synchronizing signal is generated in accordance with the charge transfer of one line in a part of the area.

In such a solid-state imaging device according to the present invention, when the charge obtained by photoelectric conversion in a part of the sensor area of the photoelectric conversion unit is transferred by the charge transfer unit, one of the charges is generated by the synchronization signal generator. Since the horizontal synchronizing signal is generated in accordance with the transfer of the charges for the lines, the charges for one line can be transferred within one horizontal synchronizing signal.

In the above-described signal generation method for a solid-state imaging device, the transfer of the electric charge obtained by photoelectric conversion in a part of the sensor area is performed in accordance with the transfer of one line of electric charge in the part of the sensor area. Since the horizontal synchronizing signal is generated by this, a signal for one line in a part of the area can be transferred to the signal processing unit corresponding to one line set based on the horizontal synchronizing signal.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of a solid-state imaging device and a signal generation method thereof according to the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram illustrating a solid-state imaging device according to the present embodiment, and FIG. 2 is a schematic configuration diagram illustrating a CCD.

That is, as shown in FIG. 1, a solid-state imaging device 1 according to the present embodiment mainly includes a CCD 2 for converting image information into a predetermined electric signal and transferring the same, and a timing generator 3 for supplying a driving signal to the CCD 2. A CDS / AGC circuit 4 for performing processing on an output signal output from the CCD 2, and a signal processing unit 5 for performing various signal processing.

The signal processing section 5 includes a first delay section D for delaying a signal output from the CDS / AGC circuit 4.
L1 and a delay line DL having a second delay section DL2, and a horizontal synchronization signal H to be output to the timing generator 3.
D, a synchronizing signal generator 51 for generating a vertical synchronizing signal VD and a timing signal to be given to various circuits in the signal processing unit 5;
/ C processing section 52, frame memory 53, synchronization signal addition section 54, burst signal addition section 55, modulation section 46, D / A converter 57a for converting an output signal (digital) from synchronization signal addition section 54 into an analog signal. And a D / A converter 57b for converting an output signal (digital) from the modulator 56 into an analog signal. Although not shown in FIG. 1, the solid-state imaging device 1 is also provided with an A / D converter for converting an output signal (analog) of the CDS / AGC circuit 4 into a digital signal and passing the digital signal to a signal processing unit 5. I have.

As shown in FIG. 2, the CCD 2 is adjacent to a sensor area 20 in which a plurality of sensor units 21 for performing photoelectric conversion are arranged in a matrix, and each of the plurality of sensor units 21 is arranged in a row in the vertical direction in the drawing. A vertical shift register 22 is provided, a horizontal shift register 23 provided below the sensor area 20 in the drawing, and an output unit 24 provided adjacent to the horizontal shift register 23.

Further, in the CCD 2, a control gate (not shown) is provided at a part along the horizontal shift register 23 between the vertical shift register 22 and the horizontal shift register 23. The transfer of electric charges from the vertical shift register 22 to the horizontal shift register 23 can be restricted in the portion where the charge is transferred.

In this CCD 2, a sensor unit 21 having a filter of Cy (cyan), a sensor unit 21 having a filter of Mg (magenta), a sensor unit 21 having a filter of Ye (yellow), and G (green) Are arranged in a predetermined arrangement.

Each sensor section 21 is formed of, for example, a photodiode formed of a PN junction and accumulates signal charges corresponding to the amount of received light. In addition, the signal charges accumulated in the sensor unit 21 are read out to the vertical shift register 22 by a readout pulse given from the timing generator 3 to the CCD 2 shown in FIG.

The vertical shift register 22 has the configuration shown in FIG.
, A vertical transfer pulse (for example, four drive pulses having different phases) is supplied, and the signal charges read from the sensor unit 21 are sequentially transferred in a downward direction in FIG. The signal charges transferred from the vertical shift register 22 are transferred to the horizontal shift register 23 every horizontal line in FIG.

When high-speed imaging, which will be described later, is performed using only a part of the sensor area 20 as an imaging area, control is performed such that charges in only the imaging area are transferred to the horizontal shift register 23 at the control gate described above. doing.

That is, the control gate restricts the transfer of electric charges other than the image pickup area out of the electric charge for each line transferred in the vertical direction by the vertical shift register 22 before the horizontal shift register 23 to correspond to the image pickup area. Is transferred to the horizontal shift register 23.

The horizontal shift register 23 is supplied with horizontal transfer pulses (for example, two drive pulses having different phases) from the timing generator 3 shown in FIG. The charges are sequentially transferred to the output unit 24.

The output section 24 includes a charge-to-voltage converter having, for example, a floating diffusion amplifier configuration, and outputs signal charges sequentially transferred from the horizontal shift register 23 as a voltage corresponding to the charge amount.

In such a CCD 2, when transferring signal charges for one line, two signal charges in the vertical direction are mixed and transferred in the sensor unit 21 for two lines indicated by "CR" in FIG. In the sensor unit 21 for two lines indicated by “CB” in FIG.
Each signal charge is mixed and transferred.

The timing generator 3 obtains the horizontal synchronizing signal HD and the vertical synchronizing signal VD generated by the synchronizing signal generator 51 of the signal processing unit 5, and outputs these signals at a predetermined timing.
Output to CD2. Further, a read pulse, a vertical transfer pulse, and a horizontal transfer pulse synchronized with the horizontal synchronizing signal HD and the vertical synchronizing signal VD are output to the CCD 2 at predetermined timing.

The CDS / AGC circuit 4 reduces the reset noise of the CCD 2 by a CDS circuit (correlated double sampling circuit), and keeps the output level constant by an AGC circuit (automatic gain control circuit).

The delay line DL of the signal processing unit 5
The signal output from the DS / AGC circuit 4 is delayed by a certain time and sent to the Y / C processing unit 52. For example, the signal is delayed by one horizontal scanning period via the first delay unit DL1.
Further, it is delayed by one horizontal scanning period (two horizontal scanning periods in total) via the second delay section DL2. In the delay line DL, a delay time can be set in accordance with the cycle of the horizontal synchronization signal output from the synchronization signal generator 51.

In the Y / C processing section 52, the delay line D
Based on the delayed signal given from L, a Y (luminance) signal and a C (color difference) signal are generated by a predetermined calculation.
The frame memory 53 stores the Y signal and the C signal generated by the Y / C processing unit 52 for each line.

In the synchronizing signal adding section 54, the Y / C processing section 5
2, a synchronizing signal is added to the Y (luminance) signal generated, and the signal is converted into an analog signal by the D / A converter 57a. The burst signal addition section 55 adds a burst signal to the C (color difference) signal generated by the Y / C processing section 52, and modulates the signal with a modulation section 56. Further, the modulated signal is converted into an analog signal by the D / A converter 57b.

In such a solid-state imaging device 1, CC
The signal charges obtained in the sensor area 20 of D2 are transferred by various transfer pulses given from the timing generator 3, and output as voltage signals. This output signal is separated into a Y (luminance) signal and a C (color difference) signal by a Y / C processing section 52 of the signal processing section 5 and stored in a frame memory 53. Further, the frame memory 5 is controlled based on a predetermined timing.
The Y / C signal read from 3 is output as an analog signal.

In the present embodiment, when an image is taken in a part of the sensor area 20 in the CCD 2, the signal charge is transferred for each line in the area from the synchronous signal generator 51. The horizontal synchronizing signal HD is generated in accordance with the charge transfer for the line.

In the case where imaging is performed a plurality of times in a part of the sensor area 20, the vertical synchronizing signal VD is generated from the synchronizing signal generator 51 for each number of times.

Next, generation of a synchronization signal in the solid-state imaging device 1 and transfer operation based on the synchronization signal will be described. In addition,
Hereinafter, the case of outputting all the signal charges read from all the areas (effective pixel areas) of the sensor area 20 is referred to as “during normal imaging”, and the signal charges read from a part of the sensor area 20 (read area). The case where only the image is output is referred to as “at the time of high-speed imaging”, and the transfer operation at the time of these two imagings will be described in order.

First, the transfer operation during normal imaging will be described with reference to the timing chart of FIG. During normal imaging,
As shown in FIG. 3A, signal charges are transferred line by line from the entire effective pixel area 21. That is, FIG.
As shown in (b), a signal corresponding to one line is transferred within one horizontal scanning period 1H between the horizontal synchronization signals HD.

Thus, the CCD outputs a signal (C) corresponding to the first line in FIG. 3A in the first horizontal scanning period 1H.
R), and outputs a signal (CB) corresponding to the second line in the next horizontal scanning period 1H.
And outputs a signal (CR) corresponding to the third line. Similarly, the subsequent lines are sequentially output within the horizontal scanning period.

The first delay section DL1 of the delay line DL shown in FIG. 1 outputs a signal delayed by one line from the CCD output, and the second delay section DL2 of the delay line DL outputs two signals from the CCD output. Outputs an output signal delayed by the number of lines.

The signals for each line output during the horizontal scanning period 1H are separated into Y / C signals by the Y / C processing section 52 shown in FIG. 1 and stored in the frame memory 53 for each line. The frame memory 53 stores a signal for each line based on the horizontal synchronization signal HD output from the synchronization signal generator 51. As a result, a vertical correlation can be obtained for the signal output from the CCD 2 for each line.

Next, the transfer operation at the time of high-speed imaging will be described with reference to the timing chart of FIG. Here,
As shown in FIG. 4 (a), a case where high-speed imaging is performed as a readout area 20b of a central area that is about １ ／ each in the vertical and horizontal directions in the effective pixel area 20a is taken as an example.

That is, when signals of, for example, four lines in the read area 20b are transferred, as shown in FIG. 4B, the horizontal synchronizing signal HD is applied to one of the horizontal scanning periods 1H in the above-described normal imaging. The signal is generated for each 1 / 3H that is / 3, and is made to correspond to each line.

That is, a horizontal synchronizing signal HD is generated from the synchronizing signal generator 51 shown in FIG.
One line of signal is transferred between 3H. by this,
The CCD outputs a signal (CR) corresponding to the first line in FIG. 4A in the first 1 / 3H, and outputs a signal (CB) corresponding to the second line in the next 1 / 3H. Next 1 / 3H
, A signal (CR) corresponding to the third line is output, and a signal (CB) corresponding to the fourth line is output within the next 1 / 3H. In the case of four or more lines (5 lines, 6 lines,...), Each line is sequentially output within 1 / 3H.

The first delay section DL1 of the delay line DL shown in FIG. 1 outputs a signal delayed by 1/3 line from the CCD output, and outputs a signal delayed by the second delay line DL.
The delay section DL2 outputs an output signal delayed by 2/3 line from the CCD output.

The signal for each line output within 1 / 3H is separated into Y / C signals by the Y / C processing section 52 shown in FIG. 1 and stored in the frame memory 53 for each line. The frame memory 53 is provided by the synchronization signal generators 51 to 1
Based on the horizontal synchronizing signal HD generated every / 3H, the signal is stored in a state of a signal for each line. This allows the CCD
The vertical correlation of the signal for each line in the read area 20b output from the second area can be obtained.

Further, the solid-state imaging device 1 according to the present embodiment
The synchronous signal generator 51 generates a vertical synchronous signal VD for each of a plurality of reading operations in the reading area 20b during high-speed imaging.

FIG. 5 is a diagram for explaining changes in the vertical synchronization signal. That is, when the charge readout of the readout area 20b (see FIG. 4) is performed twice, the vertical synchronization signal VD is generated at a half cycle of the vertical synchronization signal VD at the time of normal imaging, and the charge readout is performed three times. If the charge is read out nine times, the vertical synchronization signal VD is generated at a cycle of 1/3 of the vertical synchronization signal VD at the time of normal imaging. On the other hand, the vertical synchronizing signal VD is generated at a cycle of 1/9.

This makes it possible to synchronize the signals in the readout area 20b in units of one frame even at the time of high-speed imaging. Based on this vertical synchronizing signal VD, the automatic focusing in the optical system of the CCD 2 and the calculation in white balance are performed. It becomes possible to apply to.

Next, the rearrangement of signals by the frame memory will be described with reference to FIGS. Here, as shown in FIGS. 6A to 6C, the read area 20b
In this example, the rearrangement in the case of reading and outputting the signal of four lines three times is described as an example.

In each reading, signals for four lines are output line by line from the CCD 2 shown in FIG. 1 as described above, and are separated into Y / C signals by the Y / C processing unit 52. In other words, the first reading shown in FIG.
The signals of the fourth to fourth lines are sequentially transferred. CCD
As an output, as shown in FIG. 7A, signals are output in the order of the first to fourth lines in accordance with this transfer.

Next, in the second reading shown in FIG. 6B, the signals of the 1'th to 4'th lines are sequentially transferred. As shown in FIG. 7A, the CCD outputs are output in the order of the 1'th to 4'th lines following the signal output of the first to fourth lines transferred earlier.

Similarly, in the third reading shown in FIG. 6C, the signals of the first to fourth lines are sequentially transferred. As shown in FIG. 7A, the CCD output is outputted in the order of the 1'th to 4'th lines following the signal output of the 1'th to 4'th lines previously transferred. .

In the solid-state imaging device 1 of the present embodiment, the signals output in such an order are rearranged by using the frame memory 53 so that the signals can be displayed on a screen or the like in an arbitrary display form.

That is, when storing the signals output from the CCD in this order in the frame memory 53 or outputting the signals from the frame memory 53, the order is changed on a line-by-line basis so that the order of the CCD output is different from that of the CCD output. It becomes possible to change the display form by rearranging the display order.

For example, as in the case of the output after rearrangement shown in FIG. 7A, the output order of the line-by-line signals output via the frame memory 53 is determined by changing the output order of one horizontal scanning period between the horizontal synchronizing signals HD. Inside the first line, the 1 'line,
The first line, the second line within the next horizontal scanning period,
The 2′-th line, the 2 ″ -th line, and the third line within the next one horizontal scanning period are arranged in this order, so that the first to fourth lines as shown in the display screen G shown in FIG. The first captured image composed of the 1st line to the 2nd captured image composed of the 4th line, the 1st line to
The third captured image composed of the 4 ″ line is arranged side by side in the figure.

That is, in the first horizontal scanning period 1H, 1
By sequentially outputting the signals of the first line, the first line, and the first line from the frame memory 53, the signals shown in FIG.
6 corresponding to the first line of the display screen G shown in FIG.
The captured images of the first line, the 1 ′ line, and the 1 ″ line of (a) to (c) are displayed.

By sequentially outputting the signals of the second line, the second line, and the second line from the frame memory 53 within the next one horizontal scanning period 1H, the display screen shown in FIG. 6 (a) to 6 (b) corresponding to the second line of G.
The captured image of the second line, the 2 ′ line, and the 2 ″ line of (c) is displayed.

Similarly, the signals of the third, third, and third lines are sequentially output from the frame memory 53 in the next one horizontal scanning period 1H, thereby obtaining the signal shown in FIG.
6A to 6C corresponding to the third line of the display screen G shown in FIG.
The captured image of the third line, the 3′th line, and the 3 ″ th line of (c) is displayed, and the fourth line, the 4′th line, and the 4 ″ th line in the next horizontal scanning period 1H. Are sequentially output from the frame memory 53, so that the fourth line, the 4'th line in FIGS. 6A to 6C corresponding to the fourth line of the display screen G shown in FIG.
The captured image on the fourth line is displayed.

As described above, by performing signal output in line units in a different order from the CCD output order through the frame memory 53, each signal can be placed at an arbitrary position in the display screen G in addition to the above-described description. Images obtained by capturing can be displayed.

In the above-described embodiment,
In the effective pixel area 20a for vertical imaging,
Although the example in which the central area which is about 1/3 in the horizontal direction is the read area 20b is used, the present invention is not limited to this, and high-speed imaging may be performed in another size.

In this embodiment, the read area 2
Although the example in which the horizontal synchronizing signal is generated in response to the charge transfer of each line of 0b has been described, if at least the horizontal synchronizing signal is generated in synchronization with each line, more horizontal synchronizing signals are generated. Is also applicable.

[0058]

As described above, the solid-state imaging device and the signal generation method of the present invention have the following effects. That is, even when the electric charge obtained by photoelectric conversion is transferred in a part of the sensor area, the horizontal synchronizing signal is generated for each line in the part of the area. Based on this, it is possible to easily perform the vertical correlation processing on the output signal for each line.

Further, by generating a horizontal synchronizing signal in accordance with the charge transfer of one line in a part of the area, the signal of one line can be transferred to the signal processing unit as one line. The signal processing can be performed for each line without using the signal processing unit.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a solid-state imaging device according to an embodiment.

FIG. 2 is a schematic configuration diagram illustrating a CCD.

FIG. 3 is a timing chart during normal imaging.

FIG. 4 is a timing chart at the time of high-speed imaging.

FIG. 5 is a diagram illustrating a change in a vertical synchronization signal.

FIG. 6 is a diagram (part 1) for explaining reordering output by a frame memory;

FIG. 7 is a diagram (part 2) illustrating reordering output by the frame memory.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Solid-state imaging device 2 CCD 3 Timing generator 4 CDS / AGC circuit 5 Signal processing part 51
Synchronous signal generator 52 Y / C processing unit 53 Frame memory DL
Delay line

Claims (5)

[Claims] 1. A photoelectric conversion unit having a sensor area in which a plurality of sensor units for performing photoelectric conversion are arranged in a matrix, and a charge obtained by performing photoelectric conversion in each sensor unit of the photoelectric conversion unit is vertically and A charge transfer section for transferring in the horizontal direction, a timing generator for providing a charge transfer signal to the charge transfer section based on a horizontal synchronization signal and a vertical synchronization signal, and a photoelectric conversion in a part of the sensor area And a synchronous signal generator for generating the horizontal synchronizing signal in accordance with the transfer of one line of charges in the partial area when transferring the obtained charges by the charge transfer unit. Imaging device. 2. The synchronization signal generator according to claim 1, further comprising: transmitting a charge obtained by photoelectric conversion in a part of the sensor area to the charge transfer unit a plurality of times; 2. The solid-state imaging device according to claim 1, wherein: 3. The solid-state imaging device according to claim 1, further comprising: a memory for rearranging charges for each line in the partial area transferred by the charge transfer unit on a line-by-line basis. . 4. A horizontal synchronizing signal and a vertical synchronizing signal obtained from a photoelectric conversion unit having a sensor area in which a plurality of sensor units are arranged in a matrix, obtained by photoelectrically converting a part of the sensor area. A signal generation method for a solid-state imaging device, wherein, when transferring based on a signal, the horizontal synchronization signal is generated in accordance with charge transfer of one line in the partial area. 5. When transferring the electric charge obtained by photoelectric conversion in a part of the sensor area a plurality of times,
5. The signal generation method for a solid-state imaging device according to claim 4, wherein said vertical synchronizing signal is generated every plural times.