JP2725265B2 - Solid-state imaging device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a solid-state imaging device suitable for use in, for example, a single-chip color camera.

[Summary of the Invention]

According to the present invention, for example, in a solid-state imaging device suitable for use in a single-chip type color camera, two lines are simultaneously read after providing color filters of different colors for odd lines and even lines. A signal obtained by adding the output and a signal obtained by adding one line to the output after delaying one line are used to obtain primary color signals such as red R, green G, and blue B. The vertical resolution is improved as a configuration in which a primary color signal can be obtained in units of.

[Conventional technology]

2. Description of the Related Art Conventionally, as a solid-state imaging device used in a single-panel type color camera, one having a plan structure schematically shown in FIG. 8 has been proposed.

In FIG. 8, (1) shows a P-type silicon substrate, and in this solid-state imaging device, a light receiving element (2) (2)... (2) composed of a photodiode is provided on the surface side of the P-type silicon substrate (1). ) In matrix form 492 (vertical)
× 510 (horizontal) light receiving units (3) are provided,
A subject image is formed on the surface of the light receiving section (3), and a signal charge corresponding to the brightness of the subject image is applied to each of the light receiving elements (2) and (2).
... (2). in this case,
On the light receiving unit (3) surface, for example, white W, green G, yellow Ye, cyan C
A color filter array (not shown) in which 492 (vertical) × 510 (horizontal) color filters such as y are arranged, and each color filter of the color filter array is connected to each light receiving element (2)
(2)... Corresponding to (2), the signal charges based on the color light passing through each color filter are transferred to each light receiving element (2) (2)
... (2).

Also, the light receiving elements (2) (2) arranged in a matrix form
A vertical register (4) (4) composed of a charge-coupled device (hereinafter referred to as CCD) is provided for each column of (2), and each light-receiving element (2) (2) (2) Is read out by the frame accumulation method (frame reading method), that is, each light receiving element (2) (2)... (2)
Is read out for every horizontal line alternately for every field, and interlaced, and this signal charge is transferred in the vertical direction, that is, downward in the drawing.

Further, the first and second CCDs, which are read-out registers, are provided on the output side of the vertical registers (4), (4)... (4).
Horizontal registers (5) and (6) are provided in two columns, and the signal charges transferred by the vertical registers (4) (4)... (4) are transferred in the horizontal direction by two horizontal lines. ing. In this case, the two horizontal registers (5) and (6) are connected via the gate section (11),
The horizontal register (5) and the second horizontal register (6) transfer signals shifted by one horizontal line line by line.

On the output side of the horizontal registers (5) and (6), there are provided output units (7) and (8) composed of, for example, a floating diffusion amplifier, and the horizontal registers (5) and (8) are provided. An image signal based on the signal charge transferred by (6) can be obtained at output terminals (9) and (10) derived from the output units (7) and (8).

As this image signal, a color signal that changes according to the color arrangement state of the color filter array arranged on the light receiving section (3) is output. For this reason, for example, color filters arranged corresponding to the four light receiving elements (2) adjacent to each other are set to different colors,
As shown in FIG. 9, by providing signals S ₁ , S ₂ , S ₃ , and S _{4 of} different colors from the respective light receiving elements (2) constituting four pixels of two lines, moire is reduced. A good color imaging signal is obtained. That is, as described above, since the image signals of two adjacent horizontal lines are simultaneously output from the two horizontal registers (5) and (6), the output terminals (9),
At the same time the signal processing circuit to which a signal is supplied from the (10) signal processing can be performed with signal S ₁ to S ₄ with information of the four colors, for example so as to obtain a luminance signal Y by mixing the color signals of four colors Can be Then, assuming that the first chroma signal C ₁ and the second chroma signal C ₂ are required to convert into the red R, green G, and blue B color video signals, the first chroma signal C ₁
From the first line signals S ₁ and S ₂ and the second line signals S ₃ and S _4, and the second chroma signal C ₂ is obtained as shown in FIG.
The signal S ₁ ′ of the third line adjacent to the signals S _{1 to} S ₄ of the line,
The signal is obtained from S ₂ ′ and the signals S ₃ ′ and S ₄ ′ on the fourth line. In this case, the color filter array of the pixels corresponding to the signals S ₁ , S ₂ , S ₃ , S ₄ is changed to the array of the color filters of the pixels corresponding to the signals S ₁ ′, S ₂ ′, S ₃ ′, S ₄ ′. have been changed and, for example, the luminance signal Y as described above, and _{Y = S 1 + S 2 +} S 3 + S 4, the first chroma signals _{C 1, C 1 = (S} 1 + S 3) - (S 2 + S _4), and the second chroma signal _{C 2, C 2 = (S} 1 '+ S 3') - ( can be obtained as the S ₂ '-S _4').

Then, the luminance signal Y obtained from the 8 signals S ₁ to S of more pixels _{4, S 1 '~S 4'} , based on a chroma signal C _1, C _2, for example, red R,
Color image signals of three primary colors of green G and blue B can be obtained. A video signal obtained by two-line simultaneous readout in this manner has an advantage that color moire is small.

[Problems to be solved by the invention]

However, when a color video signal is obtained by simultaneous reading of two lines in this way, four horizontal lines are required to be read in order to obtain a video signal of one unit of primary color, so that the vertical resolution of the video signal is low. was there.

In order to solve this problem, for example, signals from four light receiving elements (2) on two adjacent lines shown in FIG.
_{S 1, S 2, S 3} , S 4 alone can be as high vertical resolution so as to obtain a luminance signal Y and the first and second chroma signal C ₁ and C _2. That is, the luminance signal Y is set to Y = S ₁ + S ₂ + S ₃ + S ₄ , the first chroma signal C ₁ is set to C ₁ = S ₁ −S _2, and the second chroma signal C ₂ is set to C ₂ = It may be adapted to be set to S ₃ -S _4. However, in this case, since only the signals from the four light receiving elements (2) are directly subtracted, the signal levels of the chroma signals C ₁ and C ₂ are small and the S / N ratio of the video signal is poor. .

SUMMARY OF THE INVENTION In view of the above, an object of the present invention is to provide a solid-state imaging device that performs two-line simultaneous reading in which a good video signal with high vertical resolution can be obtained.

[Means for solving the problem]

The solid-state imaging device according to the present invention, for example, as shown in FIG.
A light receiving element (2) (2)... (2) provided with color filters of different colors in the odd line and the even line, and a signal charge stored in the light receiving element in a direction orthogonal to the line. Transfer register (4) (4) to transfer (4)
And first and second read registers (5) and (6) for simultaneously reading two lines of signal charges transferred by the transfer register, and the first and second read registers (5) and (6). ) And the output of the second read-out register (6) are converted by a predetermined time in a time unit corresponding to the transfer time of the signal charge of one light receiving element (2). Delay means (23) for delaying, second adding means (22) for adding the output of the first read register (5) and the output of the delay means (23), and first adding means (21)
And primary color signal generation means (24) and (25) for obtaining a predetermined primary color signal based on the output of the second addition means (22).

[Action]

According to the solid-state imaging device of the present invention, by delaying a read signal of at least one horizontal line among a plurality of lines read at the same time for a predetermined period, the arrangement of the color filters arranged corresponding to the light receiving elements (2) can be changed. A signal in the same state as the changed signal is obtained. An undelayed signal and the delayed signal read out an array of colors corresponding to the actual number of horizontal lines or more. As a unit, a good video signal having a high SN ratio and a high vertical resolution can be obtained.

〔Example〕

Hereinafter, an embodiment of the solid-state imaging device according to the present invention will be described with reference to FIGS.
This will be described with reference to FIG. 1 to 4, parts corresponding to those in FIGS. 8 and 9 are denoted by the same reference numerals, and detailed description thereof will be omitted.

In this example, an interline transfer type solid-state imaging device capable of simultaneously reading out signal charges of two horizontal lines as in the conventional example. As shown in FIG. 1, a P-type silicon substrate (1) surface side The light receiving elements (2) (2)... (2) each formed of a photodiode are arranged in a matrix, for example, 492.
A (vertical) × 768 (horizontal) light receiving section (3) is provided, a subject image is coupled to the surface of the light receiving section (3), and a signal charge corresponding to the brightness of the subject image is transmitted to each light receiving element (3). 2)
(2) ... Store in (2). In this case, the color filter array (12) shown in FIG.
, And each color filter of the color filter array (12) is made to correspond to each light receiving element (2) (2)... (2), and a signal charge based on the color light passing through each filter is converted to each light receiving element ( 2) (2) ... Store in (2). The color filter array (12), the first horizontal line L _1, the third horizontal line L _3, ...... 491 respectively yellow Ye horizontal line L _491, cyan
Cy color filters are alternately arranged and the second horizontal line
L ₂ , fourth horizontal line L ₄ ,... 492th horizontal line L ₄₉₂ are configured by alternately arranging white W and green G color filters, respectively.

Further, the light receiving elements (2), (2),.
... Vertical register (4) consisting of CCD for each column of (2)
(4)... (4) is provided, and the light receiving elements (2) (2).
The signal charges stored in (2) can be transferred in the vertical direction, that is, downward in the drawing.

Further, a first horizontal register (5) made of a CCD is provided on the output side of the vertical registers (4) (4)... (4), and a second horizontal register also made of the CCD via a gate section (11). (6) is provided. A first signal amplification is performed on the output side of each of the horizontal registers (5) and (6).
And an output section (7) and a second output section (8), and the first and second output sections (7) and (8) respectively provide first and second output terminals (9) and (9). (10) is derived.

Then, the first and second output terminals (9) and (1
The read signal obtained in step (0) is supplied to a signal processing circuit as shown in FIG. That is, the first and second output terminals (9) and (10) are connected to one and the other addition signal input terminals of the first adder (21), respectively. Further, the first output terminal (9) is connected to one addition signal input terminal of the second adder (22), and the second output terminal (10) is connected to the delay circuit (2).
3) is connected to the other addition signal input terminal of the second adder (22). In this case, the delay circuit (23) is a circuit for delaying the transfer time of one pixel of the horizontal register (6) (the transfer time of the signal charge of one light receiving element (2)).

Then, the addition output signals of the first and second adders (21) and (22) are supplied to the sampling and separation circuit (24), respectively. The sampling separation circuit (24) separates the added read signal into a signal for each pixel reading period, as described later, and supplies the separated color signal to the matrix circuit (25). Further, the addition output signal output from the first addition circuit (21) is supplied to a matrix circuit (25), and R, R,
The primary color signals of G, B are converted, and the converted primary color signals of R, G, B are converted to red signal output terminal (26R) and green signal output terminal (2
6G) and the blue signal output terminal (26B).

Next, with the solid-state imaging device of this example, each light receiving element (2)
(2) (2) When the operation of the time of reading the signal charges accumulated by receiving, for example, the first horizontal register (5) is in the second horizontal line L ₂ light receiving element (2) (2 ) ...
... (2) reads out the signal charges of the second horizontal register (6) is first horizontal line L ₁ of the light receiving element (2) (2) ...
It is assumed that the signal charge of (2) is being read. At this time, the signal obtained at the output terminal (9) is shown in FIG.
As shown as S _A, the second horizontal line L ₂ of the color filter W, G,
W, ......... Color signals based on the arrangement of W and G are output and output terminals (1
Signal obtained 0) as shown as signal S _B in FIG. 3,
The first horizontal line L ₁ of the color filter Ye, Cy, the Ye ...... Ye, the color signal based on the sequence of Cy. Therefore, the addition signal first adder circuit (21) is outputted, both lines L _2, L ₁ signal
_A signal Sx obtained by adding S _A and S _B is obtained. In this signal Sx, white W and yellow Ye signals are simultaneously obtained at predetermined timing as color signals, and green G and cyan Cy signals are simultaneously obtained at another timing.

The signal supplied to the second addition circuit (22) is
As shown in FIG. 4, the first horizontal line is provided by the delay circuit (23).
Since signals S ₁ of L ₁ becomes delayed signal by one pixel, an addition signal Sy output from the second adding circuit (22), the signal of the white W and cyan Cy at a predetermined timing as the color signals The green G and yellow Ye signals are simultaneously obtained at different timings.

Then, the sampling / separation circuit (24) separates the signals into pixels obtained at the same time.
From the added signals Sx and Sy supplied from (22), a mixed signal of white W and yellow Ye A mixed signal of green G and cyan Cy A mixed signal of white W and cyan Cy A mixed signal of green G and yellow Ye And the respective mixed signals are supplied to the matrix circuit (25).

The matrix circuit (25) obtains color signals of the three primary colors R, G, and B from the mixed signal of these and the added signal Sx output from the first adding circuit (21), and converts the signals. The obtained primary color signals are supplied to output terminals (26R), (26G) and (26B).

As described above, according to the solid-state imaging device of this example, two adjacent
One unit (one pixel) based on signals (one each for W, G, Ye, and Cy) obtained from a total of four light receiving elements (2) on a horizontal line
Color video signals of the primary colors are obtained. For this reason, the vertical resolution is doubled as compared with the case where a color video signal of one unit of primary color is obtained using four horizontal lines as shown in the conventional example. Further, by using the delay circuit (23), the color arrangement of the signals from the four light receiving elements (2) on the two horizontal lines is substantially changed to obtain a signal in the same state as the signal from the four horizontal lines. The signal level does not decrease as in the case of obtaining a chroma signal by subtracting the signals from the four light-receiving elements. A good color video signal is obtained, and a good image with little noise is obtained.

Incidentally, an example of the signal processing performed by the matrix circuit (25) in the formula, first create a luminance signal Y and the first and second chroma signal C ₁ and C _2.

Luminance signal Y = W + Ye + G + Cy = 4G + 2R + 2B first chroma signal _{C 1 = (W + Ye)} - (G + Cy) = 2R second chroma signal _{C 2 = (W + Cy)} - (G + Ye) = 2B Noriyuki signal equal Y, C _1, obtaining R, G, and B primary color signals of C ₂ based.

In the above embodiment, the read signals from the respective light receiving elements are added outside the substrate (1). However, the signal charges are taken out using the floating gate, and the signals are read out from the substrate (1) on which the CDD is formed. The output may be obtained after adding by a circuit. That is, as shown in FIG. 5, a floating gate (31) for reading out signal charges of vertically adjacent pixels transferred to the first and second horizontal registers (5) and (6) and a horizontal gate. A floating gate (32) for reading signal charges of upper and lower pixels shifted by one pixel is provided, and a signal read by the floating gates (31) and (32) is separated by a sampling separation circuit (24) and a matrix circuit (25). ) May be supplied. In this case, for example, as shown in FIG.
One end of a floating gate (31a) composed of a capacitor for reading signal charges of the horizontal register (5) and one end of a floating gate (31b) composed of a capacitor for reading signal charges of the second horizontal register (6). And the other ends of the floating gates (31a) and (31b) are connected to the clock signal sources (33a) and (33b), respectively.
4) Connect to the source in common. And this FET (34)
Is connected to the power supply terminal V _DD (35), and the gate of the FET (34) is connected to the control terminal (36). In addition, FET (34)
Is connected to the detection signal output terminal (37). With this configuration, the signal charges of the predetermined pixels of the first horizontal register (5) and the signal charges of the predetermined pixels of the second horizontal register (6) are simultaneously read out to the output terminal (37). You.

By reading the signal using the floating gate in this manner, the read signal is added by the circuit on the substrate (1) in which the CCD is configured, and the influence of noise due to signal amplification at the output unit is reduced. And the SN ratio of the read signal is improved.

As shown in FIG. 7, the floating gate (3
As (8) and (39), signal charges of the same color light on the same horizontal line may be simultaneously read out for two adjacent pixels and added. In the case of the example of FIG. 7, the horizontal resolution is lower than that of the example of FIG. 5, but the signal level increases, and the SN ratio of the read signal further improves.

Further, the arrangement of the color filters shown in the above-described embodiment is an example, and other various arrangements may be selected. Furthermore, the present invention is not limited to the above-described embodiment, and it goes without saying that various other configurations can be adopted without departing from the gist of the present invention.

〔The invention's effect〕

According to the present invention, there is an advantage that a solid-state imaging device that performs two-line simultaneous reading that can obtain a good image with a high SN ratio and a high vertical resolution is obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a solid-state imaging device according to the present invention, and FIGS. 2, 3, and 4 are schematic diagrams for explaining the example of FIG. 1, FIG. 5, and FIG. 9 is a schematic diagram showing another embodiment of the present invention, FIG. 6 is a circuit diagram showing an output unit of the example of FIG. 5, FIG. 8 is a configuration diagram showing an example of a conventional solid-state imaging device, and FIG. The figure is a schematic diagram for explaining the example of FIG. (1) is a P-type silicon substrate, (2) is a light receiving element, (3)
Is a light receiving unit, (4) is a vertical register, (5) is a first horizontal register, (6) is a second horizontal register, and (21) is a first horizontal register.
(22) is a second addition circuit, (23) is a delay circuit, (24) is a sampling separation circuit, and (25) is a matrix circuit.

Claims (1)

(57) [Claims] 1. A light receiving element provided with color filters of different colors for odd lines and even lines, a transfer register for transferring signal charges accumulated in the light receiving elements in a direction orthogonal to the lines, A first and second read register for simultaneously reading two lines of signal charges transferred by the transfer register; and a first for adding outputs of the first and second read registers.
A delay means for delaying the output of the second read register for a predetermined time in a time unit corresponding to the transfer time of the signal charge of one light receiving element; and an output of the first read register. A solid-state device comprising: a second adder for adding the output of the delayer; and a primary color signal generator for obtaining a predetermined primary color signal based on the output of the first adder and the output of the second adder. Imaging device.