JPH10307855A - Method for wiring printed board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten the time required for the wiring design of a printed board and to improve the operability of wiring processing. SOLUTION: Total wiring section data 4-2 are divided into plural wiring section data 4-3-1 to 4-3-n, areas to be wired are respectively allocated to respective wiring section data 4-3-1 to 4-3-n, the wiring processing of respective wiring section data 4-3-1 to 4-3-n is executed in parallel by an interactive format or automatically executed in parallel with the interactive format, and the existence of interference in an added or changed wiring is checked in real time. Thus exclusive control is executed so that the same section can not be simultaneously processed by plural terminals. In the method, the wiring of plural sections can also be executed by dividing the section into plural areas and it is unnecessary to synthesize the wiring routes of respective areas.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for editing wiring of a printed wiring board, and more particularly to a method for editing wiring using a computer.

[0002]

2. Description of the Related Art In the conventional design of a printed wiring board, as a method of designing one board by using a plurality of graphic displays by a plurality of operators, a wiring design in the printed wiring board design is parallelized. There is a way to do it. For example, as disclosed in Japanese Unexamined Patent Publication No. 2-224182, in FIGS. 4 and 5, the substrate region division processing unit 31 divides the substrate 30 into a plurality of regions 31a,.
1c, and the wiring section data allocation processing unit 33 divides the wiring sections 32-1,... 32-5 into the respective areas 31a,.
· Assigned to 31c, then interactive wiring edit processing unit 3
5-1... 35-n perform wiring design in each area in parallel on the graphic display assigned to each area, and perform wiring paths 33-1.
-5c, and finally, the wiring route data merging unit 3
7 are divided into wiring paths 33-1,...
33-5c are merged to form a wiring section 33 extending between the respective regions.
-4 and 33-5 are merged by the interactive wiring processing unit 39 to obtain the wiring route of the entire board, thereby performing the wiring design in parallel.

As disclosed in Japanese Patent Application Laid-Open No. Hei 7-182385, in FIG. 6, data of a wiring board to be designed is fetched from a data storage unit 41 into a central processing unit 40, and The wiring / symbol mark dividing unit 42 divides the data into wiring design data 43a and symbol mark design data 45a, and the divided data is input to the wiring design processing unit 43 by the operation input from the first operation terminal 44. , The wiring design is performed interactively, and the symbol mark design processing unit 4
In 5, the symbol mark design is performed interactively by the operation input from the second operation terminal 46, and the design processing of the printed wiring board is performed. In this case, the wiring section is not divided.

[0004]

In the above-described conventional wiring method for a printed wiring board, the wiring board is divided into a plurality of areas, wiring sections are assigned to each area, and a wiring route is determined for each area. Therefore, wiring section data that spans a plurality of areas cannot be routed unless the divided areas are merged, and wiring section data that spans a plurality of areas is only routed to a portion included in each area. Is determined, when the wiring routes of the respective regions are merged, the wiring section data spanning the regions is not necessarily wired nearby, and the wiring route may be determined more quickly by reworking the wiring. For this reason, there is a disadvantage that all the wiring section data cannot be processed in parallel.

Furthermore, in the conventional technology, interactive wiring processing is performed in parallel, but parallel processing of interactive wiring and automatic wiring has not been proposed. Therefore, there is a disadvantage that the automatic wiring processing and the interactive wiring processing cannot be performed in parallel.

SUMMARY OF THE INVENTION An object of the present invention is to perform wiring processing in parallel for all wiring section data simultaneously and to perform wiring processing in parallel with interactive wiring and automatic wiring. It provides a system that can reduce the time required and improve the work efficiency, and also saves the trouble of wiring the wiring sections spanning each area after merging the conventional wiring route data divided into each area. Another object of the present invention is to improve the operability of wiring processing.

[0007]

According to the present invention, there is provided a printed wiring board wiring apparatus, comprising: a wiring dividing section for dividing all wiring section data; an interactive wiring section for interactively wiring each of the divided sections; Automatic wiring unit, and has a function of adding and revising the wiring route processed by each wiring unit to one wiring route data by a wiring result reflecting unit and performing a real-time interference check between the wirings. It has a check unit.

According to the wiring method for a printed wiring board of the present invention, all the wiring section data to be wired on the printed wiring board is divided into a plurality of wiring section data groups, and the printed wiring board to be wired is assigned to each wiring section data group. The wiring process of a plurality of wiring section data groups is processed in parallel by interactive wiring by each operation terminal corresponding to each wiring section data group, and wiring added or changed by each operation terminal. Is checked in real time, and exclusive control is performed so that the same section cannot be processed simultaneously by a plurality of operation terminals.

In addition to performing the above-described wiring processing of the plurality of wiring section data groups in parallel in an interactive manner,
Furthermore, automatic wiring is performed in parallel.

In the above-described wiring division section, all the wiring section data is divided to form divided wiring section data, and a wiring area corresponding to each section is assigned.
In the graphic display and the automatic wiring unit of each operation terminal, all the routable areas of the printed circuit board are displayed, so that it is possible to add wiring in areas other than the allocated areas. However, guard is applied by the exclusive processing mechanism so that the assigned wiring section cannot be changed.

As described above, by making it possible to add wiring to areas other than the allocated area, it becomes possible to wire the wiring allocated to each area by using the outside of the area. Wiring processing can be completed in each of the provided graphic displays and automatic wiring.

Further, since a wiring route can be added and revised in one wiring route data, even if a wiring is added to an area other than the assigned area, an interference check can be performed in real time. It is no longer necessary to combine wiring routes for which wiring processing has been performed in each case.

[0013]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a printed wiring board wiring apparatus according to an embodiment of the present invention.

FIG. 1 shows a printed wiring board wiring apparatus according to the present invention.
, The storage device 4 and the printed circuit board wiring control unit 5
, And a plurality of input devices 2 and output devices 3 which are operation terminals of the arithmetic processing device 10.

The configuration of the printed circuit board wiring controller 5 is such that the entire wiring section data 4-2 stored in the storage device 4 is divided into n groups, and the divided wiring section data 4-3-
1,..., 4--3-n, a wiring division unit 5-1 for assigning a wiring area corresponding to each of these divided wiring section data to the printed wiring board and storing the result.
And the divided wiring section data 4-
3-1... 4-3-n in an interactive manner, respectively, and a divided wiring section data 4-3-1,. An automatic wiring unit 5-3 for automatically wiring -n, a wiring result reflection unit 5-4 for reflecting the wiring result in the printed circuit board wiring route data 4-1 of the storage device 4, and a wiring interference check. A wiring check unit 5-5; an exclusive control unit 5-6 that guards the wiring so as not to be changed in a wiring section other than the wiring section to which the wiring area is assigned; And a wiring result reflecting unit 5-4 for reflecting the result.

The operation terminals of the arithmetic processing unit 10 include input devices 2-1,... 2-n and output devices 3-1,.
And the divided wiring section data 4-3-
1,... 4-3-n correspond to each other on a 1: 1 basis.

Next, the operation of the printed wiring board wiring method according to the embodiment of the present invention will be described with reference to FIGS. FIG. 2 is a flowchart showing the operation of the apparatus shown in FIG. First, in the wiring section dividing step 6 of FIG.
Divides the entire wiring section data 4-2 into groups of n pieces of wiring section data 4-3-1,... 4-3-n, and divides the wiring into each group. Assign a wiring area to the section data.

Next, wiring processing is performed for each group of wiring section data in accordance with the flow shown in FIG.
Taking the wiring processing of the divided wiring section data 4-3-1 of the first group as an example, first, in the wiring part selection step 7-1, either the interactive wiring part 5-2 or the automatic wiring part 5-3 is used. The user operates the input device 2-1 to specify whether to perform the wiring process. The first group specified an interactive format.

Next, in the wiring section extraction step 8-1,
A section in which the wiring route is not determined is extracted, and in the interactive wiring processing step 9-1, the wiring route is designated by the interactive wiring unit 5-2 in FIG.

Next, in a wiring interference checking step 10-1, it is checked by the wiring checking unit 5-5 in FIG. 1 whether interference has occurred with other wiring and the like. If interference is found, the process returns to the interactive wiring process step 9-1. If there is no interference, the next wiring path storing step 11-
The program proceeds to 1 and is stored in the printed circuit board wiring route data 4-1 by the wiring result reflecting unit 5-4 in FIG. When there is no longer a section in which the wiring route is not determined in the first wiring division group, the wiring processing of the first group ends.

In the same manner as in the above-described processing steps, wiring processing can be performed in parallel on n divided wiring section data 4-3-1,... 4-3-n. In this case, in the n-th group, in the wiring part selecting step 7-n,
The automatic wiring processing step 12 was selected. Also in this case, the same steps as described above can be performed in parallel.

[0022]

Next, an embodiment of the present invention will be described in detail with reference to FIG. FIG. 3 is a schematic perspective view of one embodiment of the present invention when the wiring area of the printed wiring board 15 is divided into six layers in layer units.

All wiring sections, divided wiring sections, and wiring paths of the printed wiring board 15 are stored in the storage device 4 of FIG. In the printed wiring board 15, the layer 15-1 and the layer 15-2 are divided into the wiring region 2 by the wiring dividing section 5-1 in FIG.
1, the layer 15-4 and the layer 15-5 are allocated as the wiring region 22, and the layer 15-3 and the layer 15-6 are allocated.
Are allocated as the wiring region 23.

Next, the operation of the embodiment of the present invention will be described in detail with reference to FIG. 1, FIG. 2, and FIG. As an example, the wiring process performed in the wiring area 23 of FIG. 3 will be described by way of an example when viewed from a display terminal.

The divided wiring section data 4-3 divided in the wiring section dividing step 6 of FIG. 2 is allocated to the area 23 composed of the layers 15-3 and 15-6. Next, in a wiring section extraction step 8 in FIG. 2, the wirings 15 on the layers 15-3 and 15-6 are formed.
When the section connecting -3-2 and the wiring 15-6-2 is extracted, the interactive wiring unit 5-2 or the automatic wiring unit 5-3 in FIG.
Are vias 5-3-1 and 15-6-1 in region 23
In addition, the vias 15-4-1 and 15 in the region 22
-5-1 can be used for wiring. Via 15-3-1, Via 15-6-1, and Via 15-4-
1 and a wiring check using the via 15-5-1 is performed by the wiring check unit 5-5 in FIG.
If there is no interference, it is stored in the printed circuit board wiring route data 4-1 in the wiring result reflecting section 5-4 of FIG.

At this time, the via terminal 15-4-1 and the via terminal 15-5-5 are also connected to the display terminal of the wiring designer who performs the wiring processing of the region 22 composed of the layer 15-4 and the layer 15-5 in parallel. 1 is reflected. At the same time, by the exclusive control unit 5-6 in FIG. 1, the wiring designer who is wiring the region 22 only while the region 23 changes the vias 15-4-1 and 15-5-1 is changed to the via 16-. Guarding is performed so that 4-1 and via 15-5-1 cannot be changed.

[0027]

As described above, according to the present invention, one divided wiring section data obtained by dividing all the wiring section data of a printed wiring board is assigned to each wiring designer, and further divided into a plurality of areas. When the wiring processing of the extending wiring section is performed in parallel, the interference check can be performed in real time, so that all wiring section data can be processed in parallel by a plurality of wiring designers. This has the effect of eliminating the need to combine the wiring route data of each area into one or rewiring the section that spans each divided area. In addition, simple wiring is performed by automatic wiring, and analog wiring is performed. Wiring processing can be performed in parallel, such as performing difficult parts interactively, so that wiring processing can be completed more quickly. There is an effect that kill.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a printed wiring board wiring method according to an embodiment of the present invention.

FIG. 2 is a flowchart showing an operation of the embodiment of FIG. 1;

FIG. 3 is a schematic perspective view of the embodiment of FIG. 1;

FIG. 4 is a block diagram showing a configuration of an embodiment of a wiring editing processing system according to a conventional technique.

FIG. 5 is an explanatory view showing a process of wiring editing in a unit of a substrate area in FIG. 4;

FIG. 6 is a block diagram showing a configuration of another embodiment according to the related art.

[Explanation of symbols]

2-1 2-2... 2-n input device 3-1 3-2... 3-n output device 4 storage device 4-1 printed circuit board wiring route data 4-2 entire wiring section data 4-3-1, 4-3-2,... 4-3-n Divided wiring section data 5 Printed circuit board wiring control section 5-1 Wiring division section 5-2 Interactive wiring section 5-3 Automatic wiring section 5- 4 Wiring result reflecting unit 5-5 Wiring check unit 5-6 Exclusive control unit 6 Wiring section dividing process 7-1,... 7-n-1, 7-n Wiring unit selecting process 8-1,. -N-1, 8-n wiring section extraction process 9-1, ... 9-n-1 interactive wiring processing process 10 Arithmetic processing unit 10-1, ... 10-n-1, 10-n wiring interference Check step 11-1,... 11-n-1, 11-n Wiring path storing step 12 Automatic wiring processing step 15 Printed wiring Board 15-1,... 15-6 Printed wiring board layer 15-3-1,... 15-6-1 Via hole 15-3-2, 15-6-2 Wiring 21, 22, 23 Wiring Area 30 substrate 31 substrate area division processing section 31a, 31b, 31c area 32-1,... 32-5 wiring section 33 wiring section data area allocation processing section 33-1,. ... 33-
5c Wiring Route 37 Wiring Route Data Merging Processing Unit 39 Interactive Wiring Editing Processing Unit 40 Central Processing Unit 41 Data Storage Unit 42 Wiring / Symbol Mark Dividing Unit 43 Wiring Design Processing Unit 43a Wiring Design Data 44 First Operation Terminal 45 Symbol Mark Design processing unit 45a Symbol mark design data 46 Second operation terminal

Claims (2)

[Claims] 1. A wiring method for a printed wiring board, comprising: dividing all wiring section data to be wired on the printed wiring board into a plurality of wiring section data groups; By allocating a region of the printed wiring board, by each operation terminal corresponding to each of the wiring section data groups, a plurality of wiring processing of each of the wiring section data groups is processed in parallel by interactive wiring, and by each of the operation terminals A method of wiring a printed wiring board that checks in real time for the presence or absence of interference of added or changed wiring, and performs exclusive control so that the same section cannot be processed simultaneously by multiple operation terminals. 2. A wiring method for a printed wiring board, comprising: dividing all wiring section data to be wired on the printed wiring board into a plurality of wiring section data groups; Allocating an area of a printed wiring board, and performing wiring processing of the plurality of wiring section data groups in parallel by interactive wiring or automatic wiring by each operation terminal corresponding to each of the wiring section data groups; A printed wiring board wiring method that checks in real time whether there is interference with wiring added or changed by an operation terminal, and performs exclusive control so that the same section cannot be processed simultaneously by a plurality of operation terminals.