JPH10304281A - Gradation display method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the display quality of a time series image by reducing the false contour without losing continuity between frames. SOLUTION: In the case of image display by a matrix display device consisting of a display element possible for binary light emission control, the degree of a motion of a display object expressed by M (M>=2) sets of original frames in time series is checked. In the case that the degree of motion exceeds a set value, (M-1) sets of interpolation frames are generated with respect to the M sets of the original frames F. Then a frame group consisting of the M sets of the original frames F is replaced with a frame group consisting of M-sets of real frames f1, f3 and (M-1) sets of virtual frames f2 which are alternately set, the necessity of lighting of the display element is set depending on the gradation level of the original frames as to the real frames f1, f3 and the necessity of lighting of the display element is set depending on the gradation level of the interpolation frames as to the virtual frames f2.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a gradation display method suitable for a PDP (Plasma Display Panel).

[0002] PDPs are more suitable for displaying moving images than liquid crystal devices, and in conjunction with the practical use of color screens, PDPs have been widely used for applications such as television images and computer monitors. In addition, it is attracting attention as a large-screen flat device for high-definition television.

[0003] The brightness of the display by the PDP depends on the number of discharges per unit time. Therefore, by appropriately setting the number of discharges in one frame for each display element (pixel or sub-pixel) of the matrix display, reproduction of halftone is performed. Color display is a type of gradation display,
This is realized by changing the luminance ratio of the three primary colors.

[0004]

2. Description of the Related Art In an AC type PDP of a matrix display type, line-sequential addressing for forming a charged state according to display contents is performed after resetting for uniform charging state, and thereafter, wall charges are used. Sustaining is performed to periodically generate a discharge. If the discharge cycle is shortened, an apparently continuous light emission state can be obtained. Normally, the frequency of the sustain pulse that defines the discharge cycle is fixed, and the length of the sustain period (that is, the number of discharges) is set according to the luminance.

As a gradation display method of the PDP, an intra-frame modulation method is used. In this method, one frame is composed of a plurality of subframes weighted with the number of discharges, and addressing is performed for each subframe to set the total number of discharges in one frame. For example, six sub-frames are provided, and the ratio of the lengths of the sustain periods is 1:
2: 4: 8: 16: 32. That is, so-called “binary weighting” using a geometric progression having a common ratio of “2” is performed. Thereby, display of 64 gradations is possible.

[0006]

As described above, in the method of reproducing a halftone by a combination of luminances in units of subframes,
False contours (moving false contours) occur when displaying a moving image with intense motion. False contour is a phenomenon in which an observer separates and recognizes subframes in a portion where a gradation changes smoothly in a moving image display, and perceives light and shade different from the display content. This is caused by apparent motion that is recognized as motion by continuously chasing moving images that are projected. In particular, in a flesh-color image, a color false contour having a different color and luminance occurs in a portion where the gradation changes smoothly, and the display quality is significantly reduced. Such a false contour becomes more conspicuous as the change in the lighting sequence is larger. For example, in the case of 256 gradations, gradation level 191 and gradation level 19
2, false contours are relatively remarkable between the gradation levels 127 and 128, and between the gradation levels 63 and 64.

SUMMARY OF THE INVENTION It is an object of the present invention to reduce false contours without impairing continuity between frames and improve the display quality of a time-series image having an unspecified degree of motion such as a television image. I have.

[0008]

Attention is paid to two or more consecutive M frames (original frames), and the frame form is changed according to the magnitude of the movement of the display object. If the movement is relatively small, each frame is regarded as a still image and divided so that the number of gradations is maximized. On the other hand, when the motion is large, a virtual image (interpolated frame) for interpolating the motion between adjacent frames in the time series is inserted. That is, during the display period of the M original frames, the M actual frames and the interpolated frames corresponding to the respective original frames were corresponded (M
-1) Allocate virtual frames. By inserting the interpolation information, the motion of the display object becomes apparently small, and even if each frame is divided into sub-frames and gradation display is performed, a false contour hardly occurs. However, since the number of frames increases, the frame period is necessarily shorter than the original period.

The motion of the display object can be calculated by a known moving image analysis method, for example, a method of obtaining a deviation that minimizes a difference between images,
It can be calculated using a method of finding a deviation that maximizes the cross-correlation function.

If the real frame and the virtual frame to be replaced with the original frame are divided into the same number of subframes as the original frame, the same gradation as that of a still image can be realized. Where P
In the DP, in order to perform the same number of times of addressing as the original frame within a period shorter than the original frame, scanning is performed not in units of one line but in units of a plurality of lines in a part or all of a plurality of subframes, and the time required for addressing is determined. Must be shortened. For this reason, the display resolution is reduced. In this case, if the light emission contents of the plurality of lines in the scanning unit are the same, it is possible to prevent a decrease in luminance. When the light emission contents of a plurality of lines are made the same, a display disorder in which the gray level is inverted occurs at the gray level boundary portion of the screen. In order to reduce this disturbance, the gradation levels of the display elements in the same column on a plurality of lines in the scanning unit are unified to the representative level. As the representative level, a maximum value, a minimum value, an average value or the like among the original gradation levels can be adopted. The unification of the gradation levels eliminates at least a significant disturbance in which the gradation levels are inverted.

On the other hand, if the number of sub-frames of the real frame and the virtual frame is made smaller than that of the original frame, a decrease in the number of gradations but a decrease in resolution in the column direction can be avoided. It is useless to assign a subframe having no display element to emit light to a display period. The display period can be effectively used by changing the combination of the weights of the sub-frames so that the number of gradations increases according to the display content.

According to the method of the first aspect of the present invention, at the time of screen display by a matrix display device comprising display elements capable of binary light emission control, p (p ≧ 3) subframes in which the original frame is weighted with luminance. This is a gray scale display method of setting the necessity of light emission of a display element by performing line scanning for each sub-frame, wherein the motion of a display object in M (M ≧ 2) original frames in time series is determined. When the degree of motion exceeds the set value, (M-1) interpolated frames for the M original frames are generated, and a frame group composed of the M original frames is M Of the real frame and (M-1) virtual frames are 1
For each of the real frames, the necessity of light emission of the display element is set according to the gradation level of each of the original frames, and for each of the virtual frames, the floor of each of the interpolation frames is set. The necessity of light emission of the display element is set according to the gray level.

According to a second aspect of the present invention, in the method of the present invention, each of the real frames is selected from q (q <p) subframes selected in descending order of luminance weight among p subframes corresponding to the original frame. And each of the virtual frames is composed of q (q <p) subframes selected in descending order of luminance weight among p subframes corresponding to the interpolation frame.

According to a third aspect of the present invention, in the method, the number of display elements to emit light in each of the q subframes is checked, and the subframe in which the number of display elements to emit light is zero is determined.
The sub-frame is replaced with a non-selected sub-frame having the largest luminance weight among the p sub-frames.

According to a fourth aspect of the present invention, in the method, each of the real frames and each of the virtual frames are composed of p subframes of the same number as the number of divisions of the original frame, and at least one of the subframes is provided. When the necessity of light emission of the display element is set, the same setting is performed for every k (k ≧ 2) lines.

In the method according to the present invention, the k display elements may be arranged such that when the necessity of light emission in the k display elements in the same column is different between k lines in which the same setting is performed, the k display elements are required. A representative level is calculated based on the gradation level of the above, and for the k display elements, the necessity of light emission in the p subframes is set so as to have a luminance corresponding to the calculated representative level. It is.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION

[First Embodiment] FIG. 1 is a configuration diagram of a plasma display device 100 according to a first embodiment.

The plasma display device 100 is composed of an AC type PDP 1 which is a matrix type color display device, and a drive unit 80 for selectively lighting a number of cells (display elements) constituting a screen. It is used as a type television receiver and a monitor of a computer system.

The PDP 1 has a pair of sustain electrodes X and Y
Are surface discharge type PDPs arranged in parallel, and each cell has a sustain electrode X, Y and an address electrode A corresponding to each other.
It has an electrode matrix with an electrode structure. The sustain electrodes X and Y extend in the display line direction, and one of the sustain electrodes Y is used as a scan electrode for selecting a cell for each line at the time of addressing. The address electrodes A are data electrodes for selecting cells in column units, and extend in the column direction.

The drive unit 80 includes a controller 81,
It has a frame memory 82, an address generator 83, an image processing circuit 84, a motion detection circuit 85, an X driver circuit 86, a Y driver circuit 87, and an address driver circuit 88. Multi-valued video data DR, DG, and DB indicating the RGB luminance level (gray level) of each pixel are input to the drive unit 80 from an external device together with various synchronization signals. The video data DR, DG, and DB are temporarily stored in the frame memory 82, then converted into sub-frame data R0-5, G0-5, and B0-5 by the image processing circuit 84, and stored again in the frame memory 82. . At the time of this data conversion, the image processing circuit 84 performs an interpolation operation for generating virtual image information for reducing the motion between frames as necessary. Sub-frame data R0
5, G0 to 5, B0 to 5 are sets of binary data indicating the necessity of light emission of cells in each subframe obtained by dividing one frame. In the present embodiment, the subframe data R0-5, G0-5, B0-5 have six bits. That is, the maximum division number of one frame is 6, and R,
G, 64 ^3-color display is possible in accordance with 64 gradation brightness setting of the respective B.

The motion detection circuit 85 is a component specific to the present invention, and is provided to apply different frame division modes between a still image and a moving image only when there is a possibility that a false contour may occur. That is, every time data for two frames is transferred from the outside, the motion detection circuit 85 reads the adjacent two frames of video data DR, DG, and DB from the frame memory 82 and detects the degree of the motion of the display object. Then, the motion detection circuit 85 outputs a detection signal S85 indicating whether or not the degree of motion exceeds a set value, that is, whether or not there is a possibility that a false contour may occur. Detection signal S8
5 is given to the controller 81, the address generator 83, and the image processing circuit 84.

When the degree of movement is relatively small, the detection signal S85 is inactive. In this case, each frame is treated as a "normal frame" and is divided into six sub-frames and displayed. On the other hand, when the detection signal S85 is active, the two focused frames are treated as “special frames”, and interpolation information for preventing false contour is inserted between them. That is, the subframe configuration of each time-series frame (hereinafter, referred to as an original frame) is switched according to the degree of motion.

At the time of addressing, sub-frame data R0-5, G0-5, B0
To 5 are read out one line at a time and transferred to the address driver circuit 88. The designation of the read address is performed by the address generator 83. As will be described later, in the case of scanning in units of one line, data of all lines are sequentially transferred from the first line, and in the case of scanning in units of two lines, data of every other line is sequentially transferred. The address driver circuit 88 transmits the transferred subframe data R0 to R0.
5, an address pulse is selectively applied to the address electrode A according to G0-5 and B0-5. In parallel, Y
The driver circuit 87 applies a scan pulse to each sustain electrode (scan electrode) Y according to an instruction from the controller 81. In the sustain following the addressing, the X driver circuit 86 controls all the sustain electrodes X
To the Y driver circuit 8
7 applies a sustain pulse to all the sustain electrodes Y in common. However, the application is performed alternately on the sustain electrodes X and the sustain electrodes Y.

FIG. 2 is a perspective view showing the internal structure of the PDP 1 according to the present invention. On the inner surface of the glass substrate 11 on the front side,
A pair of sustain electrodes X and Y are arranged for each line L. The sustain electrodes X and Y each include a transparent conductive film 41 and a metal film 42, and are covered with a dielectric layer 17 for AC driving. The surface of the dielectric layer 17 has M
A protective film 18 of gO is deposited. On the inner surface of the glass substrate 21 on the back side, an underlayer 22, an address electrode A, an insulating layer 24, a partition wall 29, and three
Phosphor layers 28R, 28G, 28B of colors (R, G, B) are provided. Each partition 29 is linear in plan view. These partition walls 29 divide the discharge space 30 into sub-pixels (unit light-emitting regions) in the line direction, and the gap size of the discharge space 30 is defined to a constant value. One pixel of the display is composed of three sub-pixels arranged in the line direction. Since the arrangement pattern of the partition walls 29 is a stripe pattern, a portion of the discharge space 30 corresponding to each column is continuous in the column direction across all the lines. The emission colors of the sub-pixels in each column are the same. The structure within each sub-pixel is a cell (display element).

In the PDP 1, an address electrode A and a sustain electrode Y are used for setting (addressing) of lighting (light emission) / non-lighting of a sub-pixel. That is, n
A screen scan (line selection) is performed by applying a scan pulse to the sustain electrodes Y (n is the number of lines), and the sustain electrodes Y and the address electrodes A selected according to the display contents are scanned. A predetermined charged state is formed for each line L by the opposite discharge (address discharge). At this time, the sub-frame data R0-5
However, the subframe data G0 to G5 are applied to the column G, and the subframe data B0 to B5 are applied to the column B. After addressing, when a sustain pulse having a predetermined peak value is alternately applied to the sustain electrode X and the sustain electrode Y,
A surface discharge (sustain discharge) occurs in a cell in which a predetermined amount of wall charge exists at the end of the addressing.

Next, a method of driving the PDP 1 will be described. FIG. 3 is a configuration diagram of a subframe. FIG. 3A shows a configuration for a normal frame, and FIG. 3B shows a configuration for a special frame. FIG. 4 is a voltage waveform diagram illustrating a drive sequence of a sub-frame performing scanning in units of two lines, and FIG. 5 is a voltage waveform diagram illustrating a drive sequence of a sub-frame performing scanning in units of one line.

In order to perform gradation display, basically, FIG.
As shown in (A), the original frame F is divided into six subframes sf.
1, sf2, sf3, sf4, sf5, sf6. The display period of each of the subframes sf1 to sf6 includes a reset period, an address period, and a sustain period. Weighting is performed so that the relative ratio of luminance in each of the subframes sf1 to sf6 is 1: 2: 4: 8: 16: 32, and the number of light emission in the sustain period of each of the subframes sf1 to sf6 is set. Display of 64 gradations is possible by combining the presence or absence of light emission in subframe units. The above-described subframe data R0-5, G0-5, B0-5
Each bit of indicates the presence or absence of light emission of one subframe. That is, the least significant bit corresponds to the subframe sf1, and the second to fifth bits correspond to the subframes sf2 to sf5.
, And the most significant bit corresponds to subframe sf6.

J input from the outside to the drive unit 80
If the first original frame F and the next (j + 1) th original frame F are special frames, interpolation information is inserted to prevent false contours as shown in FIG. That is, during the display period of the two original frames F, two real frames f1 and f3 corresponding to each original frame F and one virtual frame f2 as interpolation information are allocated. Each of the real frames f1 and f3 and the virtual frame f3 is composed of six subframes sf1 to sf6 weighted such that the relative ratio of luminance is 1: 2: 4: 8: 16: 32. The display periods of the real frames f1 and f3 and the virtual frame f3 are set to ／ times the length of the original frame F. The number of sustain pulses is set so that the luminance does not decrease.

With the insertion of the virtual frame f3, the number of addressing increases by six. In order to avoid an increase in the total addressing time, in the real frames f1 and f3 and the virtual frame f3, a predetermined number of sub-frames (here, four sub-frames sf1 to sf4) are scanned by two lines at a time. The same addressing is performed on the line. That is, the sub frame sf1
4, the odd-numbered line subframe data R0-5, G
0-5 and B0-5 are applied to odd-numbered lines and even-numbered lines, and even-line subframe data R0-5, G0-
5, B0-5 are not used. Note that the other subframes s
In f5 and sf6, odd-numbered line subframe data R0-5, G0-5, and B0-5 are applied to odd-numbered lines.
The even-numbered lines have even-numbered line subframe data R0 to R0.
5, G0-5 and B0-5 are applied. By shortening the addressing time of an appropriate number (four in the example) of the six times, a total of three frames can be displayed in 64 gradations during the display period of the two original frames F. it can.

4 and 5, the reset period TR
Is a period in which wall charges in the effective display area are erased (entirely erased) in order to prevent the influence of the previous lighting state. In response to the rise of the write pulse Pw, a strong surface discharge is generated in all lines, and a large amount of wall charges are generated in the dielectric layer 17.
However, in response to the fall of the write pulse PW, so-called self-discharge occurs due to wall charges, and the wall charges of the dielectric layer 17 disappear. A pulse is applied to the address electrode A to suppress charging on the back side.

The address period TA is a period during which addressing is performed. The sustain electrodes X are biased to a positive potential with respect to the ground potential, and all the sustain electrodes Y are biased to a negative potential. In this state, each line is selected in order of two lines or one line at a time from the top line, and a negative scan pulse Py is applied to the sustain electrode Y. At the same time as the selection of the line, the subframe data R0-5, G
A positive address pulse Pa is applied to the address electrodes A corresponding to the cells to be lit indicated by 0 to 5 and B0 to 5. In the selected line, the address pulse P
In the cell to which a is applied, an address discharge occurs between the sustain electrode Y and the address electrode A. Since the sustain electrode X is biased to a potential having the same polarity as the address pulse Pa, the bias cancels the address pulse Pa and no discharge occurs between the sustain electrode X and the address electrode A.

The sustain period TS is a period during which the lighting state set by addressing is maintained in order to secure luminance according to the gradation level. In order to prevent the counter discharge, all the address electrodes A are biased to a positive potential, and first, a positive sustain pulse Ps is applied to all the sustain electrodes Y. Thereafter, a sustain pulse Ps is alternately applied to the sustain electrodes X and the sustain electrodes Y. Each time the sustain pulse Ps is applied,
In the address period TA, surface discharge occurs in a cell in which wall charges are accumulated.

FIG. 6 is a diagram for explaining the data correction function of the image processing circuit 84. The symbol (○) in the figure indicates lighting, and the symbol (x) indicates lighting. 1 as described above
Subframes sf1 in some frames f1 to f3
If the scanning is performed in units of two lines at 4, the change in gradation may be disturbed. For example, as shown in FIG.
It is assumed that 13, 14, 15, 16, 17, and 18 are sequentially provided as the gradation levels to be displayed for cells in the same column from the 1) th odd line to the (2i + 4) th even line. Take for example. In the (2i + 2) -th line, since the gradation level is 16, only the sub-frame sf5 (weight 16) should be lighted. However, since the sub-frames sf1 to sf4 are common to the (2i + 1) -th line, for example, if the cell of interest is an R cell, the sub-frame data R0 to R5 before correction requires lighting of the sub-frames sf1 to sf5. I do. Therefore,
The luminance level of the (2i + 2) -th line is “31”, and the magnitude relationship between the luminance of the adjacent (2i + 3) -th line is reversed, and a significant disturbance occurs in a smooth gradation change. Therefore, when the necessity of light emission in cells in the same column differs between two lines forming a set, the image processing circuit 84 calculates a representative level based on the gray level of the two cells, and calculates the representative level. Sub-cell data R0 to request lighting according to the representative level.
5, G0-5, B0-5 and generate frame memory 82
Send to

The calculation of the representative level is a process of selecting the larger one of the two cells, for example, as shown in FIG. 6B. The average value of the smaller gradation level and the gradation levels of the two cells may be used as the representative level.

FIG. 7 shows the data correction section 8 of the image processing circuit 84.
It is a block diagram of 40. The data correction unit 840 includes a buffer 848 for delaying data of one line and a filter 846 for calculating a representative level. The data correction unit 840 includes video data DR0 to DG5 and DG0 to DG0.
5, DB0-5 are input in the order of pixel arrangement. The filter 846 includes video data DR0-5, DG0-5, DB0-5 delayed by the buffer 848, and video data DR0-5, DG0-5, DB0 not delayed by the buffer 848.
To 5 are input in parallel. In other words, two lines of video data DR0 to
5, DG0-5 and DB0-5 are input simultaneously. The sub-frame data R0-5, G0-5, B0-5 corresponding to the representative level are generated by the filter 846.

In the above embodiment, a frame configuration of 64 gradations has been exemplified, but the number of gradations is 16, 32, 128, 25.
It may be six or more. The luminance weight of the sub-frame does not necessarily have to be a binary weight. 3
The movement ratio of the display object may be determined for a frame group including the M original frames F described above. In this case, when the motion is large, the M original frames F are replaced with a frame group consisting of M real frames and (M-1) virtual frames. In each of the real frame and the virtual frame, scanning may be performed in units of a plurality of lines in all subframes. Scanning can be performed by setting three or more k lines as a set, and the addressing time can be further reduced. [Second Embodiment] FIG. 8 is a configuration diagram of a plasma display device 200 according to a second embodiment. In FIG. 8, FIG.
The components having the same functions as those of the example are denoted by the same reference numerals, and their description is omitted or simplified.

The plasma display device 200 comprises an AC type PDP 1 which is a matrix type color display device, and a drive unit 90 for selectively lighting a number of cells (display elements) constituting a screen.

The drive unit 90 includes a controller 91,
It has a frame memory 82, an address generator 83, an image processing circuit 94, a motion detection circuit 85, an X driver circuit 86, a Y driver circuit 87, an address driver circuit 88, and a lighting cell counting circuit 89. The image processing circuit 94
The multi-level video data DR, DG, DB are converted into binary sub-frame data R0-5, G0-5, B0-5. Subframe data R0-5, G0 in this embodiment
The number of bits of 5, B0 to 5 is 6. However, some bits may not be used for light emission control as described later.

Each time two frames of data are transferred from the outside, the motion detection circuit 85 reads out the adjacent two frames of video data DR, DG, and DB from the frame memory 82 and detects the degree of movement of the display object. . Then, the motion detection circuit 85 outputs a detection signal S85 indicating whether or not the degree of motion exceeds a set value, that is, whether or not there is a possibility that a false contour may occur. The detection signal S85 is given to the controller 91, the address generator 83, and the image processing circuit 94.

When the detection signal S85 is inactive, each original frame is treated as a "normal frame" and is divided into six subframes and displayed. On the other hand, when the detection signal S85 is active, the two focused frames are treated as “special frames”, and interpolation information for preventing false contour is inserted between them.

The lighting cell counting circuit 89 stores the video data D
A signal S89 indicating the presence / absence of a cell to emit light in each subframe is output according to the gradation levels indicated by R, DG, and DB.

FIG. 9 is a diagram showing an outline of a subframe configuration corresponding to FIG. 8, and FIG. 10 is a diagram showing an example of subframe replacement. j-th original frame F and the next (j
+1) When the j-th original frame F is a normal frame, each original frame F is divided into six sub-frames sf1 to sf6 as shown in FIG. Each subframe s
The relative ratio of luminance at f1 to sf6 is 1: 2: 4:
Weighting is performed so as to be 8:16:32, and the number of light emission in the sustain period of each subframe sf1 to sf6 is set.

On the other hand, when the two focused original frames F are special frames, interpolation information is inserted as shown in FIG. That is, during the display period of the two original frames F, two real frames f1,
f3 and one virtual frame f2 which is interpolation information are allocated. Each of the real frames f1 and f3 and the virtual frame f3 is selected in descending order of the weight among the six sub-frames sf1 to sf6 corresponding to the normal frame, for example, 3
It consists of subframes sf4 to sf6. The selection here is performed so that the display periods of the real frames f1 and f3 and the virtual frame f3 are approximately 倍 times as long as the original frame F.

In the present embodiment, since the display period is shortened by reducing the number of frame divisions, unlike the above-described embodiment, addressing of all the sub-frames sf4 to sf6 can be performed in units of one line. A display with the same resolution as the frame can be realized. However, the real frames f1 and f3 and the virtual frame f
In the case of 3, a fine difference in gradation level cannot be reproduced. Therefore, in order to enhance the gradation as much as possible, the subframe configuration is appropriately changed. Specifically, six subframes s
Three subframes sf4 to sf4 selected from f1 to sf6
If sf6 has 0 cells to emit light,
It is replaced with one or more subframes selected from the remaining subframes sf1 to sf3 in descending order of weight. In the example of FIG. 10, a subframe sf3 having a weight of "4" is incorporated in the real frame f1 on the front side instead of the subframe sf5 having a weight of "16". Since the sustain period of the sub-frame sf3 is shorter than that of the sub-frame sf5, the period corresponding to the difference is substantially a pause period.

Also in the second embodiment, the number of original frames M, the number of subframes of normal frames (maximum number of gradations), the number of gradations of special frames, the ratio of weights, etc. It can be appropriately selected according to the application or specification.

[0046]

According to the first to fifth aspects of the present invention,
Reduce false contours without losing continuity between frames,
It is possible to improve the display quality of a time-series image whose degree of movement is unspecified, such as a television image.

According to the first aspect of the invention, it is possible to secure the same gradation for a moving image as for a still image. According to the second aspect of the present invention, it is possible to secure the same resolution for a moving image as for a still image.

According to the third aspect of the present invention, it is possible to secure the resolution and minimize the decrease in gradation. Claim 4
According to the invention, it is possible to secure the same gradation for a moving image as for a still image.

According to the fifth aspect of the present invention, it is possible to make the gradation reproduction disturbance caused by sharing the display contents of a plurality of lines inconspicuous.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a plasma display device according to a first embodiment.

FIG. 2 is a perspective view showing an internal structure of a PDP according to the present invention.

FIG. 3 is a diagram illustrating a subframe configuration.

FIG. 4 is a voltage waveform diagram showing a drive sequence of a subframe for performing scanning in units of a plurality of lines.

FIG. 5 is a voltage waveform diagram showing a drive sequence of a sub-frame for performing scanning in units of one line.

FIG. 6 is a diagram for explaining a data correction function of the image processing circuit.

FIG. 7 is a block diagram of a data correction unit of the image processing circuit.

FIG. 8 is a configuration diagram of a plasma display device according to a second embodiment.

FIG. 9 is a diagram showing an outline of a subframe configuration corresponding to FIG. 8;

FIG. 10 is a diagram illustrating an example of subframe replacement.

[Explanation of symbols]

 Reference Signs List 1 PDP (matrix display device) F frame (original frame) sf1 to 6 subframe f1, f3 real frame f3 virtual frame 85 motion detection circuit 89 lighting cell count circuit

Claims (5)

[Claims] 1. An original frame is divided into p (p.gtoreq.3) sub-frames weighted for luminance when a screen is displayed by a matrix display device comprising display elements capable of binary light emission control. Is a gray scale display method for setting whether or not light emission of a display element is necessary by performing line scanning, and examining the degree of movement of a display object in M (M ≧ 2) original frames in time series, Exceeds the set value, (M-1) interpolated frames for the M original frames are generated, and a frame group including the M original frames is divided into M real frames and (M-
1) The virtual frames are replaced by a frame group in which the virtual frames are alternately connected one by one. For each of the real frames, the necessity of light emission of the display element is set according to the gradation level of each of the original frames. A gradation display method for a frame, wherein the necessity of light emission of a display element is set according to the gradation level of each interpolation frame. 2. The method according to claim 1, wherein each of the real frames is composed of q (q <p) subframes selected in descending order of luminance weight among p subframes corresponding to the original frame; A frame corresponding to the interpolation frame
2. The gradation display method according to claim 1, comprising q (q <p) subframes selected in descending order of luminance weight among the subframes. 3. The number of display elements to emit light in each of the q subframes is examined, and a subframe in which the number of display elements to emit light is zero is selected by non-selection of the p subframes. 3. The gradation display method according to claim 2, wherein the subframe having the largest luminance weight is replaced. 4. The method according to claim 1, wherein each of the real frames and each of the virtual frames are composed of p subframes of the same number as the number of divisions of the original frame. 2. The gradation display method according to claim 1, wherein the same setting is performed for every k (k.gtoreq.2) lines when the rejection is set. 5. When the necessity of light emission in k display elements in the same column is different between k lines in which the same setting is performed, based on the gray level of the k display elements. The representative level is calculated, and for the k display elements,
The above p is adjusted so that the luminance is in accordance with the calculated representative level.
5. The gradation display method according to claim 4, wherein the necessity of light emission in each of the sub-frames is set.