JPH10303458A - Gallium nitride compound semiconductor element - Google Patents

Gallium nitride compound semiconductor element

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Publication number
JPH10303458A
JPH10303458A JP12351497A JP12351497A JPH10303458A JP H10303458 A JPH10303458 A JP H10303458A JP 12351497 A JP12351497 A JP 12351497A JP 12351497 A JP12351497 A JP 12351497A JP H10303458 A JPH10303458 A JP H10303458A
Authority
JP
Japan
Prior art keywords
layer
light emitting
thermal expansion
gan
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12351497A
Other languages
Japanese (ja)
Inventor
Norikatsu Koide
典克 小出
Masayoshi Koike
正好 小池
Shinya Asami
慎也 浅見
Junichi Umezaki
潤一 梅崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toyoda Gosei Co Ltd
Original Assignee
Toyoda Gosei Co Ltd
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Filing date
Publication date
Application filed by Toyoda Gosei Co Ltd filed Critical Toyoda Gosei Co Ltd
Priority to JP12351497A priority Critical patent/JPH10303458A/en
Publication of JPH10303458A publication Critical patent/JPH10303458A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To materialize the wavelength elongation and output increase of a GaN compound semiconductor element. SOLUTION: A buffer layer 11 consisting of AlN, a thermal expansion lightening layer 12 consisting of In0.20 Ga0.80 N, a high carrier concentration n<+> layer 13 consisting of GaN doped with Si, a distorted layer 14 consisting of Al0.15 Ga0.85 N, a light emitting layer 15 of multiple quantum well structure where barrier layers 151 consisting of GaN and well layers 152 consisting of In0.20 Ga0.80 N are stacked alternately, a clad layer 16 consisting of p-type Al0.15 Ga0.85 N, a contact layer 17 consisting of p-type GaN, and an electrode 18A consisting of Co and Au are stacked in order on a sapphire substrate 10. An electrode 18B consisting of V and Al is made on the n<+> layer 13 exposed by etching. The distortion by the difference of lattice constant is given to the light emitting layer 15 by the distorted layer 14, which has a lattice constant different from that of the light emitting layer 15 and is provided under the light emitting layer 15, and the emitted light wavelength is elongated. Moreover, the influence by thermal expansion of a substrate 10 can be removed by providing the thermal expansion lightening layer 12, and it can be made into high output.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、長波長化が可能な
窒化ガリウム系化合物半導体素子に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gallium nitride-based compound semiconductor device capable of increasing the wavelength.

【0002】[0002]

【従来の技術】窒化ガリウム(GaN) 系化合物半導体は、
紫外線領域から赤色領域の発光波長が得られる素子とし
て期待されている。従来、GaN 系化合物半導体において
は、通常基板としてサファイアを用いているが、サファ
イアとGaN 系化合物半導体との熱膨張係数の差異により
半導体層に歪みが生じ、光学的特性に悪影響を与えてい
た。このために、例えばサファイア基板上にバッファ
層、AlGaInN から成る発光層を形成した素子において、
組成の異なる層を順次積層し、発光層の格子欠陥を低減
し、素子特性を向上させたものが知られている(特開平
8−70139号公報)。
2. Description of the Related Art Gallium nitride (GaN) based compound semiconductors are:
It is expected as an element capable of obtaining an emission wavelength in the ultraviolet region to the red region. Conventionally, sapphire is usually used as a substrate in a GaN-based compound semiconductor. However, a difference in thermal expansion coefficient between sapphire and a GaN-based compound semiconductor causes distortion in a semiconductor layer, which adversely affects optical characteristics. For this purpose, for example, in a device in which a buffer layer and a light emitting layer made of AlGaInN are formed on a sapphire substrate,
It is known that layers having different compositions are sequentially laminated to reduce lattice defects of a light emitting layer and improve device characteristics (Japanese Patent Application Laid-Open No. 8-70139).

【0003】[0003]

【発明が解決しようとする課題】しかしながら、上記従
来技術では発光波長を長波長化するためには発光層にお
けるInの組成比を増大させることになるが、このIn組成
比の増加により結晶性が劣化し、発光強度が大幅に低減
するという問題がある。
However, in the above prior art, in order to increase the emission wavelength, the composition ratio of In in the light emitting layer is increased. However, the crystallinity is increased due to the increase in the In composition ratio. There is a problem that the light emission is deteriorated and the light emission intensity is significantly reduced.

【0004】従って、本発明の目的は、上記課題に鑑
み、GaN 系化合物半導体素子の長波長化及び高出力化を
実現することである。
Accordingly, an object of the present invention is to achieve a longer wavelength and a higher output of a GaN-based compound semiconductor device in view of the above problems.

【0005】[0005]

【課題を解決するための手段】上記の課題を解決するた
めに、請求項1に記載の手段によれば、GaN 系化合物半
導体素子において、活性層と異なる格子定数を有した第
1の半導体層が活性層の基板側に設けられることによ
り、活性層と第1の半導体層との格子定数差により活性
層に対して歪みが付与されるので、半導体層の組成比を
変化させずに長波長化が可能になる。又、基板の熱膨張
による活性層への歪みの影響を緩和する第2の半導体層
が第1の半導体層に対して基板側に設けられることによ
り、基板の熱膨張による影響を除去できるので、高出力
化が可能となる。
According to a first aspect of the present invention, there is provided a GaN-based compound semiconductor device having a first semiconductor layer having a lattice constant different from that of an active layer. Is provided on the substrate side of the active layer, strain is imparted to the active layer by a lattice constant difference between the active layer and the first semiconductor layer. Therefore, long wavelengths can be obtained without changing the composition ratio of the semiconductor layer. Becomes possible. Further, by providing the second semiconductor layer on the substrate side with respect to the first semiconductor layer to reduce the influence of the strain on the active layer due to the thermal expansion of the substrate, the effect of the thermal expansion of the substrate can be removed. High output can be achieved.

【0006】又、請求項2に記載の手段によると、第1
の半導体層をAlXGa1-XN(0<X≦1)で構成することによ
り、活性層に対して効果的に歪みを付与でき、第2の半
導体層をInYGa1-YN(0<Y≦1)で構成することにより、基
板の熱膨張による影響を効果的に除去できる。
According to the second aspect of the present invention, the first
By configuring the semiconductor layer of Al X Ga 1-X N (0 <X ≦ 1), strain can be effectively applied to the active layer, and the second semiconductor layer can be formed of In Y Ga 1-Y N With the configuration of (0 <Y ≦ 1), the influence of the thermal expansion of the substrate can be effectively removed.

【0007】[0007]

【発明の実施の形態】以下、本発明を具体的な実施例に
基づいて説明する。図1は、サファイア基板10上に形
成されたGaN 系化合物半導体で形成された発光素子10
0の模式的な断面構成図である。基板10の上には窒化
アルミニウム(AlN) から成る膜厚約25nmのバッファ層1
1が設けられ、その上にIn0.20Ga0.80N から成る膜厚約
200nm の熱膨張緩和層(第2の半導体層)12が形成さ
れている。熱膨張緩和層12の上にはシリコン(Si)ドー
プのGaN から成る膜厚約4.0μmの高キャリア濃度n+
層13が形成されている。この高キャリア濃度n+ 層1
3の上にAl0.15Ga0.85N から成る膜厚約40nmの歪み層
(第1の半導体層)14が形成されている。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described based on specific embodiments. FIG. 1 shows a light emitting device 10 made of a GaN-based compound semiconductor formed on a sapphire substrate 10.
FIG. 2 is a schematic cross-sectional configuration diagram of No. 0. A buffer layer 1 of aluminum nitride (AlN) having a thickness of about 25 nm is formed on a substrate 10.
1 on which a film thickness of In 0.20 Ga 0.80 N is formed.
A 200 nm thermal expansion relaxation layer (second semiconductor layer) 12 is formed. On the thermal expansion moderating layer 12, a high carrier concentration n + of about 4.0 μm made of GaN doped with silicon (Si) is used.
Layer 13 is formed. This high carrier concentration n + layer 1
A strain layer (first semiconductor layer) 14 made of Al 0.15 Ga 0.85 N and having a thickness of about 40 nm is formed on 3.

【0008】そして、歪み層14の上に膜厚約35ÅのGa
N から成るバリア層151と膜厚約35ÅのIn0.20Ga0.80
N から成る井戸層152とが交互に積層された多重量子
井戸構造(MQW)の発光層(活性層)15が形成され
ている。バリア層151は6層、井戸層152は5層で
ある。発光層15の上にはp型Al0.15Ga0.85N から成る
膜厚約50nmのクラッド層16が形成されている。さら
に、クラッド層16の上にはp型GaN から成る膜厚約10
0nm のコンタクト層17が形成されている。
Then, a Ga film having a thickness of about 35 ° is formed on the strained layer 14.
N 0.20 Ga 0.80 with a thickness of about 35 °
A light emitting layer (active layer) 15 having a multiple quantum well structure (MQW) in which well layers 152 made of N 2 are alternately stacked is formed. The barrier layer 151 has six layers, and the well layer 152 has five layers. On the light emitting layer 15, a cladding layer 16 of p-type Al 0.15 Ga 0.85 N with a thickness of about 50 nm is formed. Further, on the cladding layer 16, a film thickness of about 10
A 0 nm contact layer 17 is formed.

【0009】又、コンタクト層17の上には金属蒸着に
よる透光性の電極18Aが、n+ 層13上には電極18
Bが形成されている。透光性の電極18Aは、コンタク
ト層17に接合する膜厚約40Åのコバルト(Co)と、この
Coに接合する膜厚約60Åの金(Au)とで構成されている。
電極18Bは膜厚約200 Åのバナジウム(V) と膜厚約1.
8 μmのアルミニウム(Al)又はAl合金で構成されてい
る。
A light-transmissive electrode 18A formed by metal evaporation is formed on the contact layer 17, and the electrode 18A is formed on the n + layer 13.
B is formed. The light-transmissive electrode 18A is made of cobalt (Co) having a thickness of about 40
It is composed of gold (Au) with a film thickness of about 60 ° bonded to Co.
The electrode 18B is made of vanadium (V) having a thickness of about 200 mm and a thickness of about 1.
It is composed of 8 μm aluminum (Al) or Al alloy.

【0010】次に、この発光素子100の製造方法につ
いて説明する。上記発光素子100は、有機金属気相成
長法(以下「MOVPE」と略す)による気相成長によ
り製造された。用いられたガスは、アンモニア(NH3) 、
キャリアガス(H2,N2) 、トリメチルガリウム(Ga(CH3)3)
(以下「TMG 」と記す)、トリメチルアルミニウム(Al
(CH3)3)(以下「TMA 」と記す)、トリメチルインジウ
ム(In(CH3)3)(以下「TMI 」と記す)、シラン(SiH4)と
シクロペンタジエニルマグネシウム(Mg(C5H5)2) (以下
「CP2Mg 」と記す)である。
Next, a method for manufacturing the light emitting device 100 will be described. The light emitting device 100 was manufactured by vapor phase growth by metal organic chemical vapor deposition (hereinafter abbreviated as “MOVPE”). The gases used were ammonia (NH 3 ),
Carrier gas (H 2, N 2), trimethylgallium (Ga (CH 3) 3)
(Hereinafter referred to as “TMG”), trimethyl aluminum (Al
(CH 3 ) 3 ) (hereinafter referred to as “TMA”), trimethylindium (In (CH 3 ) 3 ) (hereinafter referred to as “TMI”), silane (SiH 4 ) and cyclopentadienyl magnesium (Mg (C 5 H 5 ) 2 ) (hereinafter referred to as “CP 2 Mg”).

【0011】まず、有機洗浄及び熱処理により洗浄した
a面を主面とした単結晶の基板10をMOVPE装置の
反応室に載置されたサセプタに装着する。次に、常圧で
H2を流速2 liter/分で約30分間反応室に流しながら温度
1100℃で基板10をベーキングした。
First, a single crystal substrate 10 having an a-plane as a main surface cleaned by organic cleaning and heat treatment is mounted on a susceptor placed in a reaction chamber of a MOVPE apparatus. Next, at normal pressure
Temperature while flowing about 30 minutes the reaction chamber of H 2 at a flow rate of 2 liter / min
The substrate 10 was baked at 1100 ° C.

【0012】次に、温度を400 ℃まで低下させて、H2
20liter/分、NH3 を10liter/分、TMA を1.8 ×10-5モル
/分で供給してAlN から成るバッファ層11を約25nmの
膜厚に形成した。バッファ層11の形成後、温度を600
℃まで上昇させ、N2又はH2、NH3 の供給量を一定とし
て、TMG を7.2 ×10-5モル/分、TMI を0.19×10-4モル
/分で供給して、膜厚約2000ÅのIn0.20Ga0.80N から成
る熱膨張緩和層12を形成した。次に、基板10の温度
を1150℃に保持し、H2を20liter/分、NH3 を10liter/
分、TMG を1.7 ×10-4モル/分、H2ガスにより0.86ppm
に希釈されたシランを20×10-8モル/分で供給し、膜厚
約4.0 μm、電子濃度2 ×1018/cm3、Si濃度4 ×1018/c
m3のGaN から成る高キャリア濃度n+ 層13を形成し
た。次に、基板10の温度を1100℃に保持し、N2又はH2
を10liter/分、NH3 を10liter/分、TMG を1.0 ×10-4
ル/分、TMA を1.0 ×10-4モル/分で供給して、膜厚約
40nmのAl0.15Ga0.85N から成る歪み層14を形成した。
Next, the temperature is lowered to 400 ° C. to remove H 2
The buffer layer 11 made of AlN was formed to a thickness of about 25 nm by supplying 20 liter / minute, NH 3 at 10 liter / minute, and TMA at 1.8 × 10 −5 mol / minute. After forming the buffer layer 11, the temperature is set to 600
C., and the supply of N 2 or H 2 , NH 3 was kept constant, and TMG was supplied at 7.2 × 10 −5 mol / min and TMI was supplied at 0.19 × 10 −4 mol / min. The thermal expansion relaxation layer 12 made of In 0.20 Ga 0.80 N was formed. Next, the temperature of the substrate 10 was maintained at 1150 ° C., H 2 was 20 liter / min, and NH 3 was 10 liter / min.
Min, TMG 1.7 × 10 -4 mol / min, 0.86 ppm by H 2 gas
Silane diluted at 20 × 10 -8 mol / min, the film thickness is about 4.0 μm, the electron concentration is 2 × 10 18 / cm 3 , and the Si concentration is 4 × 10 18 / c
A high carrier concentration n + layer 13 made of m 3 GaN was formed. Next, the temperature of the substrate 10 is maintained at 1100 ° C., and N 2 or H 2
Is supplied at 10 liter / min, NH 3 at 10 liter / min, TMG at 1.0 × 10 -4 mol / min, and TMA at 1.0 × 10 -4 mol / min.
A strained layer 14 of 40 nm Al 0.15 Ga 0.85 N was formed.

【0013】上記の歪み層14を形成した後、続いて、
N2又はH2を20liter/分、NH3 を10liter/分、TMG を2.0
×10-4モル/分で供給して、膜厚約35ÅのGaN から成る
バリア層151を形成した。次に、N2又はH2、NH3 の供
給量を一定として、TMG を7.2 ×10-5モル/分、TMI を
0.19×10-4モル/分で供給して、膜厚約35ÅのIn0.20Ga
0.80N から成る井戸層152を形成した。さらに、バリ
ア層151と井戸層152を同一条件で5周期形成し、
その上にGaN から成るバリア層151を形成した。この
ようにして5周期のMQW構造の発光層15を形成し
た。
After the formation of the above-mentioned strained layer 14,
N 2 or H 2 20liter / min and NH 3 10liter / min, 2.0 TMG
The barrier layer 151 made of GaN having a film thickness of about 35 ° was formed by supplying at a rate of × 10 -4 mol / min. Next, TMG was supplied at a rate of 7.2 × 10 −5 mol / min, and TMI was supplied at a constant supply rate of N 2, H 2 , and NH 3.
Supplied with 0.19 × 10 -4 mol / min, a thickness of about 35 Å an In 0.20 Ga
A well layer 152 of 0.80 N was formed. Further, five periods of the barrier layer 151 and the well layer 152 are formed under the same conditions,
A barrier layer 151 made of GaN was formed thereon. Thus, the light emitting layer 15 having the MQW structure with five periods was formed.

【0014】次に、基板10の温度を1100℃に保持し、
N2又はH2を10liter/分、NH3 を10liter/分、TMG を1.0
×10-4モル/分、TMA を1.0 ×10-4モル/分、CP2Mg を
2 ×10-5モル/分で供給して、膜厚約50nm、濃度5 ×10
19/cm3のマグネシウム(Mg)をドープしたp型Al0.15Ga
0.85N から成るクラッド層16を形成した。
Next, the temperature of the substrate 10 is maintained at 1100 ° C.
N 2 or H 2 10 liter / min, NH 3 10 liter / min, TMG 1.0
× 10 -4 mol / min, TMA 1.0 × 10 -4 mol / min, CP 2 Mg
Supply at 2 × 10 -5 mol / min, film thickness about 50 nm, concentration 5 × 10
19 / cm 3 magnesium (Mg) doped p-type Al 0.15 Ga
A cladding layer 16 of 0.85 N was formed.

【0015】次に、基板10の温度を1100℃に保持し、
N2又はH2を20liter/分、NH3 を10liter/分、TMG を1.12
×10-4モル/分、CP2Mg を2 ×10-5モル/分で供給し
て、膜厚約100nm 、濃度5 ×1019/cm3のMgをドープした
p型GaN から成るコンタクト層17を形成した。
Next, the temperature of the substrate 10 is maintained at 1100 ° C.
N 2 or H 2 20liter / min and NH 3 10liter / min and TMG 1.12
A contact layer made of Mg-doped p-type GaN having a thickness of about 100 nm and a concentration of 5 × 10 19 / cm 3 , by supplying CP 2 Mg at 2 × 10 -5 mol / min at × 10 -4 mol / min. 17 was formed.

【0016】次に、コンタクト層17の上にエッチング
マスクを形成し、所定領域のエッチングマスクを除去し
て、エッチングマスクで覆われていない部分のコンタク
ト層17、クラッド層16、発光層15、歪み層14、
+ 層13の一部を塩素を含むガスによる反応性イオン
エッチングによりエッチングして、n+ 層13の表面を
露出させた。
Next, an etching mask is formed on the contact layer 17, a predetermined region of the etching mask is removed, and portions of the contact layer 17, the cladding layer 16, the light emitting layer 15, and the strain which are not covered with the etching mask are removed. Layer 14,
A part of the n + layer 13 was etched by reactive ion etching using a gas containing chlorine to expose the surface of the n + layer 13.

【0017】次に、エッチングマスクを残した状態で、
全面にフォトレジストを塗布し、フォトリソグラフィに
よりn+ 層13の露出面上の所定領域に窓を形成し、10
-6Torrオーダ以下の高真空に排気した後、膜厚約200 Å
のバナジウム(V) と膜厚約1.8 μmのAlを蒸着する。こ
の後、フォトレジスト及びエッチングマスクを除去する
ことにより、n+ 層13の露出面上に電極18Bが形成
される。
Next, with the etching mask left,
A photoresist is applied to the entire surface, and a window is formed in a predetermined region on the exposed surface of the n + layer 13 by photolithography.
After evacuating to a high vacuum of the order of -6 Torr or less, the film thickness is about 200 Å
Of vanadium (V) and Al with a film thickness of about 1.8 μm. Thereafter, by removing the photoresist and the etching mask, the electrode 18B is formed on the exposed surface of the n + layer 13.

【0018】続いて、表面上にフォトレジストを塗布
し、フォトリソグラフによりコンタクト層17上の電極
形成部分のフィトレジストを除去して窓を形成し、コン
タクト層17を露出させる。露出させたコンタクト層1
7の上に、10-6Torrオーダ以下の高真空に排気した後、
Coを膜厚約40Åに成膜し、このCo上にAuを膜厚約60Åに
成膜する。次に、試料を蒸着装置から取り出し、リフト
オフ法によりフォトレジスト上に堆積したCoとAuとを除
去し、コンタクト層17に対する透光性の電極18Aを
形成する。
Subsequently, a photoresist is applied on the surface, and the phytoresist of the electrode forming portion on the contact layer 17 is removed by photolithography to form a window, and the contact layer 17 is exposed. Exposed contact layer 1
After evacuating to a high vacuum of the order of 10 -6 Torr or less above 7,
Co is deposited to a thickness of about 40 °, and Au is deposited to a thickness of about 60 ° on the Co. Next, the sample is taken out of the vapor deposition apparatus, Co and Au deposited on the photoresist are removed by a lift-off method, and a translucent electrode 18A for the contact layer 17 is formed.

【0019】次に、電極18A上の一部にボンディング
用の電極パッド20を形成するために、フォトレジスト
を一様に塗布して、その電極パッド20の形成部分のフ
ォトレジストに窓を形成する。次に、CoとAu、Al、又
は、それらの合金を膜厚1.5 μm程度に、蒸着により成
膜させ、リフトオフ法により、フォトレジスト上に蒸着
により堆積したCoとAu、Al、又はそれらの合金から成る
膜を除去して、電極パッド20を形成する。その後、試
料雰囲気を真空ポンプで排気し、O2ガスを供給して圧力
3Paとし、その状態で雰囲気温度を約550 ℃にして、3
分程度、加熱し、コンタクト層17、クラッド層16を
p型低抵抗化すると共にコンタクト層17と電極18A
との合金化処理、n+ 層13と電極18Bとの合金化処
理を行った。このようにして、n+ 層13に対する電極
18Bとコンタクト層17に対する電極18Aを形成し
た。
Next, in order to form an electrode pad 20 for bonding on a part of the electrode 18A, a photoresist is uniformly applied, and a window is formed in the photoresist at a portion where the electrode pad 20 is formed. . Next, Co and Au, Al, or an alloy thereof are deposited to a film thickness of about 1.5 μm by vapor deposition, and Co and Au, Al, or an alloy thereof deposited by vapor deposition on a photoresist by a lift-off method. The electrode pad 20 is formed by removing the film made of. Thereafter, the sample atmosphere is evacuated with a vacuum pump, and O 2 gas is supplied to a pressure of 3 Pa. In this state, the atmosphere temperature is increased to about 550 ° C.
The contact layer 17 and the cladding layer 16 are reduced in p-type resistance by heating for about
And an alloying process between the n + layer 13 and the electrode 18B. Thus, an electrode 18B for the n + layer 13 and an electrode 18A for the contact layer 17 were formed.

【0020】発光素子100を上記構成とすることによ
り、図2に示される特性結果が得られた。尚、図2には
比較例として従来構造の場合と、従来構造に歪み層14
のみを付加した場合の特性結果も示した。図2に示され
るように、従来構造では発光波長が約480 nmで、出力が
約200 μW であった。この従来構造に歪み層14のみを
付加した場合には、発光波長が約520nm に長波長化す
る。この発光波長の長波長化は歪み層14が発光層15
と異なる格子定数を有し、この格子定数差による歪みが
発光層15に付与されたためと推察される。歪み層14
のみを付加した場合には、長波長化できるが、出力は約
50μW に大幅に低減した。この出力の低減は、発光層1
5が基板10の熱膨張による影響を受けたためと考えら
れる。一方、本実施例の如く歪み層14と熱膨張緩和層
12とを備えることにより、発光波長を約520nm に長波
長化できると共に、約200 μW の高出力を得ることがで
きた。これは、熱膨張緩和層12により基板10の熱膨
張による影響を除去できたためと推察される。このよう
に歪み層14と熱膨張緩和層12とを備えることによ
り、長波長化と高出力とを実現できる。
With the light emitting device 100 having the above-described structure, the characteristic results shown in FIG. 2 were obtained. FIG. 2 shows a comparative example of a conventional structure and a strained layer 14 of the conventional structure.
The characteristic results in the case of adding only are also shown. As shown in FIG. 2, in the conventional structure, the emission wavelength was about 480 nm and the output was about 200 μW. When only the strained layer 14 is added to the conventional structure, the emission wavelength is increased to about 520 nm. In order to increase the emission wavelength, the strained layer 14 is
It is presumed that the light-emitting layer 15 has a lattice constant different from that of the light-emitting layer 15 and distortion due to this lattice constant difference is applied to the light-emitting layer 15. Strain layer 14
When only the wavelength is added, the wavelength can be extended, but the output is about
Significantly reduced to 50 μW. This reduction in output is due to the light emitting layer 1
It is considered that No. 5 was affected by the thermal expansion of the substrate 10. On the other hand, by providing the strained layer 14 and the thermal expansion alleviating layer 12 as in this embodiment, the emission wavelength can be extended to about 520 nm, and a high output of about 200 μW can be obtained. This is presumably because the effect of the thermal expansion of the substrate 10 was removed by the thermal expansion moderating layer 12. By providing the strained layer 14 and the thermal expansion relaxation layer 12 in this manner, a longer wavelength and higher output can be realized.

【0021】本実施例では熱膨張緩和層12の組成をIn
0.20Ga0.80N としたが、InYGa1-YN(0≦Y≦1)を満たして
いればよい。特に、Inを入れることで効果的に基板10
からの熱応力を緩和できるので、望ましくはY ≠0 がよ
い。又、熱膨張緩和層12の膜厚は100nm 以上であれば
よい。熱膨張緩和係数12の膜厚は、100nm より薄いと
熱応力の緩和の効果が小さくなるので望ましくない。
又、本実施例では歪み層14の組成をAl0.15Ga0.85N と
したが、AlXGa1-XN(0≦X ≦1)を満たしていればよい。
特に、Alを入れることで発光層15に効果的に歪みを付
与できるので、望ましくはX ≠0 がよい。又、歪み層1
4の膜厚は10〜500 nmの範囲であればよい。歪み層14
の膜厚が10nmより薄いと発光層15に対して歪みが効果
的に付与されず、500 nmより厚いとクラックが発生する
ため、望ましくない。又、本実施例では、発光素子10
0の発光層15はMQW構造としたが、SQWやIn0.2G
a0.8N 等から成る単層、その他、任意の混晶比の4元、
3元系のAlInGaN としても良い。MQW、SQWの方が
より効果的に歪みが入りやすくなり、波長シフト効果が
大きくなるので望ましい。又、本発明はLEDやLDな
どの発光素子や受光素子に適用できる。尚、本実施例で
は、歪み層14と熱膨張緩和層12とを設けた構成とし
たが、長波長化のみを目的とする場合には、出力レベル
が低下するが、歪み層14のみを設けた構成としてよ
い。
In this embodiment, the composition of the thermal expansion relaxation layer 12 is In
Although 0.20 Ga 0.80 N has been set, it is sufficient that In Y Ga 1 -Y N (0 ≦ Y ≦ 1) is satisfied. In particular, by adding In, the substrate 10 can be effectively reduced.
It is preferable that Y 望 ま し く 0 because the thermal stress can be reduced. The thickness of the thermal expansion moderating layer 12 may be 100 nm or more. If the film thickness of the thermal expansion relaxation coefficient 12 is less than 100 nm, the effect of relaxing the thermal stress is reduced, which is not desirable.
In the present embodiment, the composition of the strained layer 14 is Al 0.15 Ga 0.85 N, but it is sufficient that Al X Ga 1 -X N (0 ≦ X ≦ 1) is satisfied.
In particular, by adding Al, it is possible to effectively impart distortion to the light emitting layer 15, so that X ≠ 0 is preferable. Also, strained layer 1
The film thickness of 4 may be in the range of 10 to 500 nm. Strain layer 14
If the film thickness is less than 10 nm, strain is not effectively applied to the light emitting layer 15, and if the film thickness is more than 500 nm, cracks occur, which is not desirable. In this embodiment, the light emitting element 10
0 has a MQW structure, but the SQW or In 0.2 G
a Single layer consisting of 0.8 N, etc., quaternary with any mixed crystal ratio,
Ternary AlInGaN may be used. MQW and SQW are more preferable because distortion is more likely to occur more effectively and the wavelength shift effect is increased. In addition, the present invention can be applied to light emitting elements such as LEDs and LDs and light receiving elements. In the present embodiment, the structure in which the strain layer 14 and the thermal expansion moderating layer 12 are provided is used. However, when the purpose is only to increase the wavelength, the output level is reduced, but only the strain layer 14 is provided. May be adopted.

【0022】上記に示されるように、本発明によれば、
発光層の格子定数と異なる半導体層を発光層の基板側に
設けることにより、発光層とその半導体層との格子定数
差によって発光層に対して歪みが付与され、長波長化が
可能となる。又、熱膨張緩和層を設けることにより、基
板の熱膨張による影響を除去できるので、高発光強度を
得ることができる。
As indicated above, according to the present invention,
By providing a semiconductor layer having a lattice constant different from that of the light-emitting layer on the substrate side of the light-emitting layer, strain is imparted to the light-emitting layer due to a difference in lattice constant between the light-emitting layer and the semiconductor layer, so that a longer wavelength can be obtained. Further, by providing the thermal expansion moderating layer, the influence of the thermal expansion of the substrate can be removed, so that high emission intensity can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の具体的な実施例に係わる半導体発光素
子の構成を示した模式図。
FIG. 1 is a schematic diagram showing a configuration of a semiconductor light emitting device according to a specific example of the present invention.

【図2】本発明の具体的な実施例に係わる半導体発光素
子の出力及び発光波長を示した特性図。
FIG. 2 is a characteristic diagram showing the output and emission wavelength of a semiconductor light emitting device according to a specific example of the present invention.

【符号の説明】[Explanation of symbols]

10 サファイア基板 11 バッファ層 12 熱膨張緩和層 13 高キャリア濃度n+ 層 14 歪み層 15 発光層 16 クラッド層 17 コンタクト層 18A p電極 18B n電極 20 電極パッド 100 発光素子 151 バリア層 152 井戸層DESCRIPTION OF SYMBOLS 10 Sapphire substrate 11 Buffer layer 12 Thermal expansion relaxation layer 13 High carrier concentration n + layer 14 Strain layer 15 Light emitting layer 16 Cladding layer 17 Contact layer 18A p electrode 18B n electrode 20 Electrode pad 100 Light emitting element 151 Barrier layer 152 Well layer

───────────────────────────────────────────────────── フロントページの続き (72)発明者 浅見 慎也 愛知県西春日井郡春日町大字落合字長畑1 番地 豊田合成株式会社内 (72)発明者 梅崎 潤一 愛知県西春日井郡春日町大字落合字長畑1 番地 豊田合成株式会社内 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Shinya Asami 1 Ochiai Nagahata, Kasuga-machi, Nishi-Kasugai-gun, Aichi Prefecture Inside Toyoda Gosei Co., Ltd. Toyoda Gosei Co., Ltd.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 活性層と異なる格子定数を有した第1の
半導体層が前記活性層の基板側に設けられることによ
り、前記活性層と前記第1の半導体層との格子定数差に
より前記活性層に対して歪みが付与され、 前記基板の熱膨張による前記活性層への歪みの影響を緩
和する第2の半導体層が前記第1の半導体層に対して前
記基板側に設けられたことを特徴とする窒化ガリウム系
化合物半導体素子。
A first semiconductor layer having a lattice constant different from that of the active layer is provided on the substrate side of the active layer, whereby the active layer is formed by a difference in lattice constant between the active layer and the first semiconductor layer. A strain is applied to the layer, and a second semiconductor layer for reducing the influence of the strain on the active layer due to thermal expansion of the substrate is provided on the substrate side with respect to the first semiconductor layer. A gallium nitride-based compound semiconductor device.
【請求項2】 前記第1の半導体層はAlXGa1-XN(0<X≦
1)から成り、前記第2の半導体層はInYGa1-YN(0<Y≦1)
から成ることを特徴とする請求項1に記載の窒化ガリウ
ム系化合物半導体素子。
2. The method according to claim 1, wherein the first semiconductor layer is formed of Al X Ga 1 -X N (0 <X ≦
1), wherein the second semiconductor layer is In Y Ga 1 -Y N (0 <Y ≦ 1)
The gallium nitride-based compound semiconductor device according to claim 1, comprising:
JP12351497A 1997-04-24 1997-04-24 Gallium nitride compound semiconductor element Pending JPH10303458A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12351497A JPH10303458A (en) 1997-04-24 1997-04-24 Gallium nitride compound semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12351497A JPH10303458A (en) 1997-04-24 1997-04-24 Gallium nitride compound semiconductor element

Publications (1)

Publication Number Publication Date
JPH10303458A true JPH10303458A (en) 1998-11-13

Family

ID=14862504

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12351497A Pending JPH10303458A (en) 1997-04-24 1997-04-24 Gallium nitride compound semiconductor element

Country Status (1)

Country Link
JP (1) JPH10303458A (en)

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Publication number Priority date Publication date Assignee Title
JP2003163373A (en) * 2001-11-26 2003-06-06 Toyoda Gosei Co Ltd Iii nitride compound semiconductor light emitting element
KR100853935B1 (en) * 2002-03-06 2008-08-25 주식회사 엘지이아이 Semiconductor light emitting diode and method for manufacturing the same
US7372066B2 (en) 2002-06-04 2008-05-13 Nitride Semiconductors Co., Ltd. Gallium nitride compound semiconductor device and manufacturing method
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US7193236B2 (en) 2003-06-25 2007-03-20 Lg Innotek Co., Ltd Light emitting device using nitride semiconductor and fabrication method of the same
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US7691657B2 (en) 2003-06-25 2010-04-06 Lg Innotek Co., Ltd. Light emitting device using nitride semiconductor and fabrication method of the same
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