JPH10303207A - Semiconductor wafer, its manufacture, and semiconductor integrated circuit device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the yield and reliability of a semiconductor integrated circuit device by obtaining a thin film epitaxial wafer having a high gettering effect. SOLUTION: An epitaxial layer 2 composed of p-type single-crystal silicon having a thickness of about 1 μm is formed on the surface of a main body 1 of a p-type single-crystal silicon semiconductor substrate, and a gettering layer 3 is formed on the backside of the main body 1 by forming a high- concentration boron area. In addition, a silicon film 4 is formed on the gettering layer 3 for preventing the automatic doping of the layer 3 with boron which occurs when the epitaxial layer 2 is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer, a method of manufacturing a semiconductor wafer, and a semiconductor integrated circuit device technology, and more particularly, to an epitaxial wafer having an epitaxial layer on a surface of a semiconductor substrate body, a method of manufacturing an epitaxial wafer, and a method of manufacturing the same. The present invention relates to a technology effective when applied to a semiconductor integrated circuit device used.

[0002]

2. Description of the Related Art Epitaxial wafers have been mainly used for bipolar devices until now, but application of epitaxial wafers to MOS (Metal Oxide Semiconductor) devices has been studied for the purpose of improving the yield.

In particular, DRAMs (Dynamic Random Access)
Memory), the MISFET (Metal Insu) for improving the refresh characteristics of the memory cell and selecting the memory cell
(64Mb) because it is possible to improve the film quality of the gate insulating film of lator Semiconductor Field Effect Transistor).
In the case of DRAMs after it, about 1
Practical use of an epitaxial wafer having an epitaxial layer having a thickness of μm (hereinafter, referred to as a thin film epitaxial wafer) is being studied.

The thin-film epitaxial wafer is described in, for example, "Nikkei Micro Devices", published by Nikkei McGraw-Hill, June 1, 1996, pages 126 to P13.
No. 3.

[0005]

According to the study by the present inventors, the following problems occur in the thin film epitaxial wafer.

That is, in order to suppress impurity diffusion in the epitaxial layer or the semiconductor substrate main body constituting the thin film epitaxial wafer, the impurity concentration of the epitaxial layer or the semiconductor substrate main body is set low. Reduces the gettering effect.

The contaminant impurities are alkali metals such as sodium (Na) and potassium (K), or iron (Fe) and gold (A).
The heavy metal atom such as u), and the alkali metal exists in the gate insulating film of the MOS device or between the gate insulating film and the epitaxial layer, and changes the threshold voltage. The heavy metal precipitates in a crystal constituting the epitaxial layer or the semiconductor substrate main body, for example, a silicon single crystal, causing dislocations and stacking faults, and the heavy metal atoms themselves also form carrier traps to reduce the lifetime.

Therefore, in a thin film epitaxial wafer,
The influence of contaminating impurities is removed by intrinsic gettering technology using oxygen originally present in the semiconductor substrate body.

In the intrinsic gettering technique, when the oxygen concentration is low, the gettering effect is weakened, and when the oxygen concentration is high, a denuded zone having no defect cannot be formed. It is important to. However, the range of the optimum oxygen concentration is narrow, and the oxygen concentration is non-uniform even within one ingot. Therefore, it is difficult to obtain a thin film epitaxial wafer having the optimum oxygen concentration and a high gettering effect.

An object of the present invention is to provide a technique capable of improving the yield and reliability of a semiconductor integrated circuit device by obtaining a thin film epitaxial wafer having a high gettering effect.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0012]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows. That is, the semiconductor wafer of the present invention has the same conductivity type as the impurity of the semiconductor substrate body and the same concentration as the impurity concentration of the semiconductor substrate body on the surface of the semiconductor substrate body containing the impurity of the predetermined conductivity type. An epitaxial layer containing impurities is provided, and a gettering layer for capturing contaminant impurities is provided on the back surface of the semiconductor substrate body.

According to the above means, the gettering layer provided on the back surface of the thin film epitaxial wafer allows
Since a process-induced contaminant impurity generated in a semiconductor device manufacturing process can be trapped, the influence of the contaminant impurity on the epitaxial layer on which the semiconductor element provided on the surface of the thin-film epitaxial wafer is formed, so that the impurity is not affected. can do.

[0014]

Embodiments of the present invention will be described below in detail with reference to the drawings.

In all the drawings for describing the embodiments, parts having the same functions are denoted by the same reference numerals, and their repeated description will be omitted.

[0016] FIG. 1 (Embodiment 1) shows a cross-sectional view of a thin film epitaxial wafer EP ₁ according to an embodiment of the present invention.

On the surface of a semiconductor substrate body 1 composed of a p-type silicon single crystal, an epitaxial layer 2 of a thickness of about 1 μm made of a p-type silicon single crystal is formed.
A high-concentration boron region having a gettering effect is formed on the back surface of the semiconductor substrate body 1 to form a gettering layer 3. The semiconductor substrate body 1 and the epitaxial layer 2 each have a resistivity of about 10 Ω · cm, and the gettering layer 3 has an impurity concentration of about 10 ¹⁹ cm ⁻³ .

Further, in order to prevent autodoping of boron from the gettering layer 3 which occurs when the epitaxial layer 2 is formed, a silicon film 4 is deposited on the gettering layer 3.

Next, a method of manufacturing the thin film epitaxial wafer EP1 of the _first embodiment will be described with reference to FIG.

First, a p-type semiconductor substrate body 1 (FIG. 2)
A gettering layer 3 composed of a high-concentration boron region is formed on the back surface of FIG. 2A (FIG. 2B). Next, the semiconductor substrate main body 1 is placed on the susceptor 5b coated with silicon 5a, and silicon is transferred from the susceptor 5b to the back surface of the semiconductor substrate main body 1 while flowing hydrogen chloride (HCl) gas. To silicon film 4
(FIG. 2C). Thereafter, the p-type epitaxial layer 2 is formed on the surface of the semiconductor substrate body 1 by using, for example, a monosilane (SiH ₄ ) gas and a hydrogen (H ₂ ) gas by, for example, an epitaxial growth method at about 980 ° C. manufacturing thin film epitaxial wafer EP ₁ (Figure 2 (d)).

Next, the thin film epitaxial wafer EP
FIG. 3 is a cross-sectional view of a main part of a semiconductor substrate showing an n-channel MISFET using ₁ .

The surface of the semiconductor substrate body 1 has a thickness of about 1 μm.
m epitaxial layer 2 is formed, and a field insulating film 6 made of a silicon oxide film is formed on the main surface of epitaxial layer 2. Although not shown,
A channel stopper region is formed below the field insulating film 6.

An n-channel MISFET is formed in an element forming region surrounded by the field insulating film 6.
In the n-channel MISFET, a source region and a drain region are formed by a pair of n ⁻ -type semiconductor regions 7 and a pair of n ⁺ -type semiconductor regions 8.

A threshold voltage control layer 9 is formed on the surface of the epitaxial layer 2 between the pair of n ⁻ type semiconductor regions 7. A gate insulating film 10 is formed of a silicon oxide film on the threshold voltage control layer 9, and a gate electrode 11 is formed of an n-type polycrystalline silicon film thereon.

An insulating film 12 made of, for example, a silicon oxide film is deposited on the n-channel type MISFET. A connecting hole 13 is provided at a predetermined position of the insulating film 12, and a wiring layer 14 is formed. 13 and electrically connected to the n ⁺ type semiconductor region 8. On the wiring layer 14,
For example, an insulating film 15 composed of a stacked film of a silicon nitride film and a silicon oxide film is deposited.

A gettering layer 3 is formed on the back surface of the semiconductor substrate main body 1, and a silicon film 4 is applied on the gettering layer 3.

Next, a method of manufacturing the n-channel type MISFET using a thin film epitaxial wafer EP ₁ shown in FIG.

First, on the main surface of the epitaxial layer 2, L
A field insulating film 6 made of a silicon oxide film is formed by an OCOS method or the like. Next, a gate insulating film 10 made of a silicon oxide film is formed in a device forming region surrounded by the field insulating film 6 by a thermal oxidation method or the like.

Next, a p-type impurity, for example, boron is introduced into the channel region of the epitaxial layer 2 to form a threshold voltage control layer 9, and then a CVD is formed on the epitaxial layer 2.
A polycrystalline silicon film to which phosphorus is added is deposited by a (Chemical Vapor Deposition) method, and then the polycrystalline silicon film is etched to form a gate electrode 11 composed of the polycrystalline silicon film.

Next, an n-type impurity, for example, arsenic is introduced into the epitaxial layer 2 using the gate electrode 11 as a mask.
A low-concentration n ⁻ -type semiconductor region 7 that forms part of the source region and the drain region of the n-channel MISFET is formed.

Next, a silicon oxide film deposited by CVD on the epitaxial layer 2 is formed by RIE (Reactive Ion Etchi
ng) to form sidewall spacers 16 on the side walls of the gate electrode 11. Then, using the gate electrode 11 and the sidewall spacer 16 as a mask, an n-type impurity, for example, phosphorus is introduced into the epitaxial layer 2 to form a high-concentration impurity that forms another part of the source region and the drain region of the n-channel MISFET. An n ⁺ type semiconductor region 8 is formed.

Thereafter, the insulating film 1 is formed on the epitaxial layer 2.
2 and the insulating film 12 is etched to form the connection hole 1
After opening the hole 3, the metal film deposited on the insulating film 12 is etched to form the wiring layer 14, and then the wiring layer 14 is covered with the insulating film 15, thereby forming the book shown in FIG. The n-channel MISFET of the first embodiment is completed.

As described above, according to the first embodiment, process-induced contamination generated in the semiconductor device manufacturing process by the gettering layer (high-concentration boron region) 3 provided on the back surface of the semiconductor substrate body 1. Impurities can be trapped. Further, by depositing the silicon film 4 on the gettering layer 3, when the epitaxial layer 2 is formed, boron in the gettering layer 3 escapes from the back surface of the semiconductor substrate body 1 and The so-called auto-doping of boron that is doped can be prevented.

[0034] The thin-film epitaxial wafer EP ₂ and a manufacturing method thereof according to another embodiment (Embodiment 2) The present invention will be described with reference to FIG.

As shown in FIG. 4 (c), similarly to the thin-film epitaxial wafer EP ₂ described in the first embodiment, the p-type semiconductor substrate body 1 of the surface, the epitaxial layer 2 of p-type is formed A high-concentration boron region is formed on the back surface of the semiconductor substrate body 1 so that the gettering layer 3 is formed.
Is composed. However, an oxide film 17 is deposited on the gettering layer 3 in order to prevent autodoping of boron from the gettering layer 3 which occurs when the epitaxial layer 2 is formed.

The thin film epitaxial wafer EP ₂ is
First, on the back surface of the p-type semiconductor substrate main body 1 (FIG. 4A),
After forming the gettering layer 3 composed of a high-concentration boron region, the gettering layer 3 is covered with an oxide film 17 (FIG. 4B), and then a p-type It is manufactured by forming the epitaxial layer 2 (FIG. 4C).

As described above, according to the second embodiment, process-induced contamination caused in the semiconductor device manufacturing process by the gettering layer (high-concentration boron region) 3 provided on the back surface of the semiconductor substrate body 1. Impurities can be trapped. The oxide film 1 is formed on the gettering layer 3.
By depositing 7, it is possible to prevent auto-doping of boron that occurs when the epitaxial layer 2 is formed.

[0038] The thin-film epitaxial wafer EP ₃ and a manufacturing method thereof according to another embodiment (Embodiment 3) The present invention will be described with reference to FIG.

As shown in FIG. 5C, a p-type epitaxial layer 2 is formed on the surface of the p-type semiconductor substrate body 1, and a high-concentration oxygen region is formed on the back surface of the semiconductor substrate body 1. It forms the gettering layer 18. The oxygen concentration of the gettering layer 18 is about 10 ¹⁸ cm ⁻³ or more.

The thin film epitaxial wafer EP ₃ is
First, oxygen ions are introduced into the p-type semiconductor substrate main body 1 (FIG. 5A) by ion implantation, and
After the gettering layer 18 is formed on the back surface of FIG.
(B)) It is manufactured by forming a p-type epitaxial layer 2 on the surface of the semiconductor substrate body 1 (FIG. 5).
(C)).

As described above, according to the third embodiment, process-induced contamination caused in the semiconductor device manufacturing process by the gettering layer (high-concentration oxygen region) 18 provided on the back surface of the semiconductor substrate body 1. Impurities can be trapped.

[0042] The thin-film epitaxial wafer EP ₄ and a manufacturing method thereof according to another embodiment (Embodiment 4) The present invention will be described with reference to FIG.

As shown in FIG. 6 (c), an epitaxial layer 2 is formed on the surface of the p-type semiconductor substrate body 1,
On the back surface of the semiconductor substrate body 1, a high-concentration boron region is formed by diffusion of boron from a BSG (Boron Silicate Glass) film 19 deposited on the back surface of the semiconductor substrate body 1, forming a gettering layer 20. ing. Further, a non-doped glass film 21 is deposited on the BSG film 19 in order to prevent auto doping of boron which occurs when the epitaxial layer 2 is formed.

The thin film epitaxial wafer EP ₄ is
First, B is placed on the back surface of the p-type semiconductor substrate body 1 (FIG. 6A).
An SG film 19 is deposited, and then BSG is
After depositing the non-doped glass film 21 on the film 19, the semiconductor substrate body 1 is subjected to a heat treatment so that the BSG film 19 is formed.
The boron inside is diffused into the semiconductor substrate body 1 to form a gettering layer 20 composed of a high-concentration boron region (FIG. 6B), and then a p-type epitaxial layer is formed on the surface of the semiconductor substrate body 1. It is manufactured by forming the layer 2 (FIG. 6C).

As described above, according to the fourth embodiment, process-induced contamination caused in the semiconductor device manufacturing process by the gettering layer (high-concentration boron region) 20 provided on the back surface of the semiconductor substrate body 1. Impurities can be trapped. In addition, by depositing the non-doped glass film 21 on the BSG film 19, it is possible to prevent boron auto-doping that occurs when the epitaxial layer 2 is formed.

[0046] The thin-film epitaxial wafer EP ₅ and a manufacturing method thereof according to another embodiment (Embodiment 5) The present invention will be described with reference to FIG.

As shown in FIG. 7C, a high-concentration semiconductor substrate body 22 composed of a p-type silicon single crystal is used.
A non-doped epitaxial layer 23 having a thickness of about 1 μm is formed on the surface of the substrate, and an epitaxial layer 24 of p-type silicon single crystal having a thickness of about 5 μm is formed on the non-doped epitaxial layer 23. I have.
The high-concentration semiconductor substrate body 22 has a gettering function, and its impurity is, for example, boron, and its impurity concentration is, for example, about 10 ¹⁹ cm ⁻³ . Also,
The resistivity of the epitaxial layer 24 is, for example, about 10Ω.
・ Cm.

On the back surface of the high-concentration semiconductor substrate body 22,
An oxide film 17 is formed on the polycrystalline silicon film 25 so as to form the polycrystalline silicon film 25 and to prevent auto doping that occurs when the epitaxial layer 24 is formed.

The thin film epitaxial wafer EP ₅ is
First, a polycrystalline silicon film 25 is deposited on the back surface of the p-type high-concentration semiconductor substrate main body 22 by a CVD method, and then the polycrystalline silicon film 25 is covered with an oxide film 17 (FIG. 7A )), A non-doped epitaxial layer 23 is formed on the surface of the high-concentration semiconductor substrate body 22 (FIG. 7).
(B)) Then, a p-type epitaxial layer 24 having a desired resistivity is formed on the non-doped epitaxial layer 23, thereby manufacturing (FIG. 7 (c)).

As described above, according to the fifth embodiment, the high-concentration semiconductor substrate body 22, the polycrystalline silicon film 25 provided on the back surface thereof, and the semiconductor substrate main body 1 are brought into contact with the polycrystalline silicon film 25. The portion can trap process-induced contaminant impurities generated in the semiconductor device manufacturing process. Further, the non-doped epitaxial layer 23 is provided on the surface of the high-concentration semiconductor substrate main body 22, and the oxide film 17 is deposited on the gettering layer 25 provided on the back surface of the high-concentration semiconductor substrate main body 22. Auto doping that occurs when the layer 24 is formed can be prevented.

[0051] The thin-film epitaxial wafer EP ₆ and a manufacturing method thereof according to another embodiment (Embodiment 6) The present invention will be described with reference to FIG.

As shown in FIG. 8C, a high-concentration semiconductor substrate body 22 made of p-type silicon single crystal is used.
A non-doped epitaxial layer 23 having a thickness of about 1 μm is formed on the surface of the non-doped epitaxial layer EP ₅ similarly to the thin-film epitaxial wafer EP ₅ described in the fifth embodiment. An epitaxial layer 24 made of a 5 μm p-type silicon single crystal is formed.

In this case, the high-concentration semiconductor substrate body 22 has a gettering function.

The silicon film 4 is applied to the back surface of the high-concentration semiconductor substrate body 22 in order to prevent auto doping that occurs when the epitaxial layer 24 is formed.

The thin film epitaxial wafer EP ₆ is
First, a high-concentration p-type semiconductor substrate body 22 (FIG. 8A) is placed on a susceptor 5b coated with silicon 5a, and silicon is supplied from the susceptor 5b to the back surface of the high-concentration semiconductor substrate body 22 while flowing HCl gas. And the back surface of the high-concentration semiconductor substrate body 22 is covered with the silicon film 4 (FIG. 8B).
2, a non-doped epitaxial layer 23 is formed on the surface of
Next, a p-type epitaxial layer 24 having a desired resistivity is formed on the non-doped epitaxial layer 23, whereby the device is manufactured (FIG. 8C).

As described above, according to the sixth embodiment, the non-doped epitaxial layer 23 is provided on the surface of the high-concentration semiconductor substrate 22 and the silicon film 4 is provided on the back surface of the high-concentration semiconductor substrate 22. Auto doping that occurs when the layer 24 is formed can be prevented.

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the above embodiments, and various modifications may be made without departing from the gist of the invention. Needless to say, it can be changed.

For example, in the above-described embodiment, the semiconductor substrate main body made of p-type silicon single crystal has been described, but the present invention is also applicable to a semiconductor substrate main body made of n-type silicon single crystal.

In Embodiment 1 or 2, p
Although the semiconductor substrate main body composed of the n-type silicon single crystal has been described, the same applies to the semiconductor substrate main body composed of the n-type silicon single crystal, and the gettering layer in the case of the n-type semiconductor substrate main body includes: It is composed of a high-concentration semiconductor region made of arsenic, antimony or phosphorus.

In the second, third, or fourth embodiment, the gettering layer is formed on the back surface of the semiconductor substrate body, and then the epitaxial layer is formed on the surface of the semiconductor substrate body. After forming the layer, a gettering layer may be formed on the back surface of the semiconductor substrate body, and the same effect is obtained.

In the fifth or sixth embodiment, the epitaxial layer forming the semiconductor element has a resistivity of about 10%.
Although the epitaxial layer is Ω · cm, it may be a non-doped epitaxial layer.

[0062]

Advantageous effects obtained by typical ones of the inventions disclosed by the present application will be briefly described as follows.
It is as follows.

According to the present invention, in a thin film epitaxial wafer, a high gettering effect can be obtained, and the epitaxial layer on which semiconductor elements are formed can be prevented from being affected by contamination impurities. Yield and reliability can be improved.

[Brief description of the drawings]

FIG. 1 is a sectional view of a thin film epitaxial wafer according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view of a thin film epitaxial wafer showing a method of manufacturing a thin film epitaxial wafer according to one embodiment of the present invention.

FIG. 3 is a cross-sectional view of a principal part of a semiconductor substrate showing an n-channel MISFET using a thin film epitaxial wafer according to an embodiment of the present invention.

FIG. 4 is a cross-sectional view of a thin film epitaxial wafer showing a thin film epitaxial wafer and a method of manufacturing the same according to another embodiment of the present invention.

FIG. 5 is a cross-sectional view of a thin film epitaxial wafer showing a thin film epitaxial wafer and a method of manufacturing the same according to another embodiment of the present invention.

FIG. 6 is a cross-sectional view of a thin film epitaxial wafer showing a thin film epitaxial wafer and a method of manufacturing the same according to another embodiment of the present invention.

FIG. 7 is a cross-sectional view of a thin film epitaxial wafer showing a thin film epitaxial wafer and a method of manufacturing the same according to another embodiment of the present invention.

FIG. 8 is a cross-sectional view of a thin film epitaxial wafer showing another embodiment of the present invention and a method of manufacturing the same.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 semiconductor substrate body 2 epitaxial layer 3 gettering layer (high-concentration boron region) 4 silicon film 5 a silicon 5 b susceptor 6 field insulating film 7 n ⁻ type semiconductor region 8 n ⁺ type semiconductor region 9 threshold voltage control layer 10 gate Insulating film 11 Gate electrode 12 Insulating film 13 Connection hole 14 Wiring layer 15 Insulating film 16 Side wall spacer 17 Oxide film 18 Gettering layer (high-concentration oxygen region) 19 BSG film 20 Gettering layer (high-concentration boron region) 21 Non-doped glass film 22 High-concentration semiconductor substrate main body 23 Non-doped epitaxial layer 24 Epitaxial layer 25 Polycrystalline silicon film EP ₁ thin film epitaxial wafer EP ₂ thin film epitaxial wafer EP ₃ thin film epitaxial wafer EP ₄ thin film epitaxial wafer EP ₅ thin film epitaxy Shall wafer EP ₆ thin film epitaxial wafer

Claims (9)

[Claims] 1. A surface of a semiconductor substrate body containing impurities of a predetermined conductivity type contains impurities of the same conductivity type as the impurities of the semiconductor substrate body and of the same concentration as the impurities of the semiconductor substrate body. A semiconductor wafer comprising: an epitaxial layer; and a gettering layer for capturing a contaminant impurity on a back surface of the semiconductor substrate body. 2. An impurity-free non-doped epitaxial layer is provided on a surface of a semiconductor substrate body containing a high-concentration impurity of a predetermined conductivity type, and the same conductivity as the impurity of the semiconductor substrate body is provided on the non-doped epitaxial layer. A semiconductor wafer provided with an epitaxial layer containing an impurity having a concentration lower than that of the semiconductor substrate body and a non-doped epitaxial layer containing no impurity. 3. The semiconductor wafer according to claim 1, wherein
A semiconductor wafer having a silicon film, an oxide film, or a non-doped glass film deposited on the gettering layer. 4. The semiconductor wafer according to claim 1, wherein
The gettering layer is a semiconductor region having the same conductivity type as that of the impurity of the semiconductor substrate body and containing an impurity having a higher concentration than the impurity concentration of the semiconductor substrate body, or a region into which oxygen ions are introduced. A semiconductor wafer characterized by the above-mentioned. 5. The semiconductor wafer according to claim 2, wherein
A semiconductor wafer, wherein a polycrystalline silicon film or a silicon film on which an oxide film is adhered is provided on a back surface of the semiconductor substrate body. 6. The surface of a semiconductor substrate body containing impurities of a predetermined conductivity type contains impurities of the same conductivity type as the impurities of the semiconductor substrate body and of the same concentration as the impurities of the semiconductor substrate body. A method for manufacturing a semiconductor wafer, comprising: a step of forming an epitaxial layer; and a step of forming a gettering layer on a back surface of the semiconductor substrate main body to trap contaminant impurities. 7. A step of forming a non-doped epitaxial layer containing no impurity on a surface of a semiconductor substrate body containing a high concentration impurity of a predetermined conductivity type, and forming an impurity of the semiconductor substrate body on the non-doped epitaxial layer. Forming an epitaxial layer containing impurities of the same conductivity type as that of the semiconductor substrate body and having a concentration lower than that of the impurities in the semiconductor substrate body, or a non-doped epitaxial layer containing no impurities. Manufacturing method. 8. The surface of a semiconductor substrate body containing impurities of a predetermined conductivity type contains impurities of the same conductivity type as the impurities of the semiconductor substrate body and the same concentration as that of the impurities of the semiconductor substrate body. A semiconductor integrated circuit device, comprising: an epitaxial layer; and a gettering layer for capturing a contaminant impurity on a back surface of the semiconductor substrate body. 9. A non-doped epitaxial layer containing no impurity is provided on a surface of a semiconductor substrate body containing a high concentration impurity of a predetermined conductivity type, and the same conductivity as the impurity of the semiconductor substrate body is provided on the non-doped epitaxial layer. A semiconductor integrated circuit device comprising: an epitaxial layer containing an impurity having a concentration lower than the impurity concentration of the semiconductor substrate body; or a non-doped epitaxial layer containing no impurity.