JPH10295073A - Apparatus and method for phase detection - Google Patents

Abstract

PROBLEM TO BE SOLVED: To cope with sudden changes in the phase of an input signal, to deal with sudden changes in its amplitude and to deal with changes in frequency in a single-phase PLL circuit by a method, wherein a frequency initial value is corrected by a counted value which is found by a frequency initial-value circuit as a separate circuit from the detecting loop of the single-phase PLL circuit. SOLUTION: A frequency initial-value circuit is constituted of a filter 9, a one-cycle counting circuit 7 and a computing unit 8. In a phase-difference detection circuit 1, the phase difference Δθ between a phase detection value θ and an input signal is found on the basis of three signals, i.e., the input signal, an output signal of a multiplier 5 and a second internal reference signal. A frequency detection circuit 2 is constituted of a circuit used to amplify the phase difference Δθ and of a circuit which adds a frequency initial-value found by the frequency initial-value circuit and finds a frequency detection value. In a phase detection circuit 3, the frequency detection value is integrated so as to find a phase detection value θ. In an amplitude detection circuit 6, the difference between the output value of the input signal of the multiplier 5 is amplified, so as to find an amplitude detection value. By this constitution, the phase difference Δθ becomes small, and the output signal of the multiplier 5 is made to agree with the input signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus and a method for detecting a phase of a power supply voltage for determining a reference of an ignition phase of a power converter composed of a semiconductor device. The present invention also relates to a phase detection device and a method capable of detecting an accurate phase independently for each phase.

[0002]

2. Description of the Related Art In a phase control converter composed of a semiconductor element having a controllable ignition function, it is necessary to generate an ignition pulse in accordance with fluctuations in the phase and frequency of a power supply. As described in Japanese Patent Publication No. 7-32588, a phase detection method is used to accurately detect the phase even when the multi-phase AC power supply of the converter is unbalanced due to a power supply accident such as ground fault or open phase. A single-phase PLL (Phase Locked Loop) has been proposed.

[0003]

The single-phase PLL is shown in FIG.
As shown in the figure, the control circuit is configured to include a phase detection loop for detecting a phase by controlling the phase difference to be zero, and an amplitude detection loop for detecting an amplitude by controlling the phase difference to be zero. In addition, the circuit characteristics greatly change depending on the control gains of the two loops.

For example, the control gain of the phase detection loop is increased to quickly follow the frequency change, and the control gain of the amplitude detection loop is increased to follow the amplitude change. However, when the gain is increased in this manner, interference between the two loops of the phase detection loop and the amplitude detection loop occurs, and hunting of the circuit may occur when the input signal suddenly changes or power is restored after a power failure. FIG. 4 is a diagram showing responses to vibration and phase change when a control gain that follows a frequency change at high speed is set. As shown in FIG. 4, since the amplitude is not accurately detected and the detection of the phase is delayed, hunting occurs in the circuit and control becomes impossible.
FIG. 5 is a diagram showing a response to a frequency change when the control gain is set to be able to follow the vibration and the phase change. In this case, the phase is detected as indicated by a broken line in FIG. Since it is late and the circuit follows after several tens of cycles, it is not possible to detect accurately during that time, and the detection delay increases.

As described above, although there are various differences depending on the application, if an optimal control gain is set to follow a sudden change in the vibration or phase of an input signal due to an external accident or the like, a response to a sudden frequency change is made. And the phase detection becomes inaccurate until the circuit follows. Conversely, if a control gain that follows a change in frequency at a high speed is set, there is a problem that input vibration, a sudden change in phase, or hunting occurs when the circuit rises, making accurate phase detection impossible.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a method for rapidly changing the phase of an input signal,
An object of the present invention is to provide a phase detecting device and a method thereof that can cope with a sudden change in amplitude and a frequency change.

[0007]

In order to achieve the above object, a phase detecting apparatus according to the present invention comprises a one-period counting circuit for counting pulses during one period of an AC input signal, and a counter for the one-period counting circuit. A frequency initial value circuit including a calculator for calculating the reciprocal of a numerical value, a phase difference detection circuit for detecting a phase difference from an input signal, a frequency detection circuit for obtaining a frequency detection value from an output of the phase difference detection circuit, and the frequency A phase detection circuit for integrating a frequency detection value obtained by a detection circuit to obtain a phase detection value, and an internal reference signal generating circuit for receiving the phase detection value obtained by the phase detection circuit and generating first and second reference signals A phase detection loop including a circuit; and an amplitude detection loop including an amplitude detection circuit that obtains an amplitude detection value from a difference between an absolute value of the input signal and an absolute value of the first reference signal. Frequency initial value Characterized in that it is configured to input the output value of the road.

In the phase detection method according to the present invention, a pulse is counted during one cycle of an AC input signal to determine a count value, and a reciprocal of the count value is calculated to determine a frequency initial value. The frequency initial value is added to the detected value of the phase difference to obtain a frequency detected value, the frequency detected value is integrated to obtain a phase detected value, and the phase detected value is input to the first and second reference signals. A signal is generated, an amplitude detection value is obtained from a difference between an absolute value of the input signal and an absolute value of the first reference signal, and a multiplication value of the first reference signal and the amplitude detection value is calculated. A second reference signal is input, a phase difference from the input signal is obtained, and the amplitude and phase are detected.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will now be described with reference to FIGS.
This will be described with reference to FIG. FIG. 1 is a block diagram of a PPL circuit according to the present embodiment, and FIG. 2 is a diagram showing a response waveform.

FIG. 1 is a block diagram of a single-phase PLL circuit with frequency correction. An input signal is a frequency initial value circuit including a filter 9, a one-cycle counting circuit 7, and a computing unit 8,
The signal is input to a phase detection loop mainly including a phase difference detection circuit 1, a frequency detection circuit 2, a phase detection circuit 3, and an internal reference signal generation circuit 4, and an amplitude detection loop mainly including an amplitude detection circuit 6.

The filter 9 of the frequency initial value circuit is provided so that an error does not occur in the count value due to noise of the input signal or the like. The input signal passing through the filter 9 has a phase delay. In the frequency counting circuit, this phase delay is not a problem. In the one-cycle counting circuit 7,
When the input signal changes from negative to positive, it starts counting pulses of a certain frequency from 0, and when the input signal changes from negative to positive, outputs the value counted up to that point and resets the count value to 0 I do. The calculator 8 calculates the reciprocal of the count value output from the one-period counting circuit 7 and outputs the result to the frequency detection circuit 2.

In the phase difference detection circuit 1 of the phase detection loop,
From the three signals of the input signal, the output of the multiplier 5, and the second internal reference signal which is cos θ output from the internal reference signal generation circuit 4, the phase detection value θ, the phase of the input signal, and the difference Δ
Find θ. The frequency detection circuit 2 includes a circuit for amplifying the phase difference Δθ and a circuit for adding the frequency initial value obtained by the frequency initial value circuit.
Then, a frequency detection value is obtained. The phase detection circuit 3 integrates the frequency detection value to obtain a phase detection value θ. The internal reference signal generation circuit 4 outputs a signal of sinθ as a first reference signal and a signal of cosθ as a second reference signal of unit amplitude based on the obtained phase detection value θ. In the multiplier 5,
The first internal reference signal sinθ is corrected based on the first reference signal sinθ and the amplitude detection value obtained by the amplitude detection circuit 6 described later.

The amplitude detection circuit 6 of the amplitude detection loop amplifies the difference between the absolute value of the input signal and the absolute value of the output of the multiplier 5 to obtain an amplitude detection value. By configuring the loop as described above, control is performed so as to reduce the phase difference Δθ, and operation is performed so that the output of the multiplier 5 matches the input signal.

The response example shown in FIG. 2 is obtained by measuring the response under the same conditions of the input signal and the control gain of the circuit as those of the response example shown in FIG. As can be seen from FIG.
In the PLL circuit of the present embodiment, even if the frequency phase and amplitude change suddenly, the PLL circuit follows the frequency fluctuation while maintaining the high-speed following performance. As described above, in the present embodiment, the frequency initial value is corrected by the count value obtained by the frequency initial value circuit which is a circuit separate from the detection loop of the single-phase PLL. There is no control gain that can handle both, and a single-phase PLL that needed to switch the control gain
In a circuit, a power supply voltage such as antiphase superposition can control a frequency change with a control gain capable of following an asymmetric phase change and amplitude change. Thus, vibration, phase,
Since it can follow any change in frequency at high speed, it can be used at the time of imbalance when the reverse phase is superimposed on the power supply voltage, when the voltage amplitude is significantly reduced due to ground fault, etc. Even when the frequency of the power supply voltage changes, high-speed follow-up and accurate phase detection can be performed, so that, for example, in transformer control, operation can be continued even in the event of an external accident that could not be continued conventionally.

[0015]

As described above, according to the present invention,
When the power supply voltage is unbalanced due to a power supply ground fault, etc., the power supply voltage of the power converter composed of semiconductor elements can be detected independently for each phase, and ignition can be performed in the correct phase, improving the operation continuity performance during an accident I do.

[Brief description of the drawings]

FIG. 1 is a block diagram of a PPL circuit according to one embodiment of the present invention.

FIG. 2 is a diagram illustrating a response waveform of the PPL circuit of the present embodiment.

FIG. 3 is a block diagram of a conventional PPL circuit.

FIG. 4 is a diagram showing a response waveform of a conventional PPL circuit.

FIG. 5 is a diagram showing a response waveform of a conventional PPL circuit.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Phase difference detection circuit, 2 ... Frequency detection circuit, 3 ... Phase detection circuit, 4 ... Internal reference signal generation circuit, 5 ... Multiplier, 6
... amplitude detection circuit, 7 ... one cycle counting circuit, 8 ... calculator.

Claims (3)

[Claims] 1. A frequency initial value circuit comprising: a one-cycle counting circuit for counting pulses during one cycle of an AC input signal; and a calculator for calculating a reciprocal of a count value of the one-cycle counting circuit; Phase detection circuit for detecting a phase difference between the two, a frequency detection circuit for obtaining a frequency detection value from an output of the phase difference detection circuit, and a phase detection circuit for integrating the frequency detection value obtained by the frequency detection circuit to obtain a phase detection value A phase detection loop including an internal reference signal generating circuit for generating first and second reference signals by inputting a phase detection value obtained by the phase detection circuit; an absolute value of the input signal and a first reference signal An amplitude detection loop including an amplitude detection circuit that obtains an amplitude detection value from the absolute value of the frequency detection circuit, wherein the frequency detection circuit is configured to input an output value of a frequency initial value circuit. Phase detection Location. 2. A phase detection device comprising a multiplier for multiplying the first reference signal by an amplitude detection value, wherein the phase detection circuit is configured to multiply the input signal by a second reference signal by the multiplication. 2. The phase detection device according to claim 1, wherein an output signal of the detector is input. 3. A count value is obtained by counting pulses during one cycle of an AC input signal, a reciprocal of the count value is calculated to obtain a frequency initial value, and a detection value of a phase difference from the input signal is used as the detected value. A frequency detection value is obtained by adding a frequency initial value, a phase detection value is obtained by integrating the frequency detection value, and the phase detection value is input to generate first and second reference signals. An amplitude detection value is obtained from a difference between the absolute value of the first reference signal and the absolute value of the first reference signal, and a multiplication value of the first reference signal and the amplitude detection value, the input signal, and the second reference signal are input. A phase difference from the input signal, and detecting an amplitude and a phase.