JPH10284595A - Formation of direct contact part - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for forming a direct contact part in which a contact can be made between a substrate and an interconnection layer at the direct contact part without increasing the number of fabrication steps and fine patterning of a semiconductor device can be achieved. SOLUTION: A first polysilicon layer 13 is formed on a gate oxide 12 deposited on a silicon substrate 11 and a direct contact hole 15 is made in the first polysilicon layer 13 and the gate oxide 12. A second polysilicon layer 16 thinner than the first polysilicon layer 13 is formed on the first polysilicon layer 13 including the surface of the silicon substrate 11 exposed in the direct contact hole 15. Subsequently, the first polysilicon layer 13 and the second polysilicon layer 16 are cut out to leave a gate 17 and a direct contact part 18. Finally, impurity ions are implanted into the silicon substrate 11 using the gate 17 and the direct contact part 18 as a mask thus forming an impurity diffusion layer 19.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for forming a direct contact portion in a semiconductor device.

[0002]

2. Description of the Related Art In order to miniaturize a semiconductor device, a local wiring forming process has been developed. Among these, the direct contact process is very effective for miniaturization of semiconductor devices because a single polysilicon layer can connect diffusion layers of a plurality of devices or a polysilicon layer as a gate of a transistor can be used for wiring. Process.
However, in the direct contact process, since a contact hole is opened in the gate, contamination of the gate oxide film by the resist poses a problem.

Therefore, in order to avoid forming a resist directly on the gate oxide film, a thin polysilicon is deposited on the gate oxide film after the gate oxidation. Next, a resist pattern is formed on the first polysilicon film, and etching is performed to form a direct contact hole. After that, ions are implanted into the substrate in the contact hole to introduce impurities. After removing the resist, the substrate is washed with hydrofluoric acid to expose the substrate surface and the polysilicon layer surface. Immediately, a second polysilicon layer is formed and contacts the substrate. Next, impurities are introduced into the second polysilicon layer to make it conductive. Next, a gate and a direct contact portion are cut out from the polysilicon layer by a normal photolithography process and an etching process.

[0004]

Various scalings have been advanced for further miniaturization of semiconductor devices.
For example, the thickness of the gate oxide film has become 10 nm or less, and the gate has also become thinner. Therefore, it is necessary to introduce the impurity into the polysilicon so that the impurity does not diffuse through the gate and the gate oxide film into the substrate under the gate. In other words, it is necessary to reduce the thickness of the diffusion layer at the direct contact portion. In such a situation, if a natural oxide film remains on the surface of the substrate in the direct contact portion, the substrate cannot be sufficiently contacted with the second polysilicon layer.

As a countermeasure against this problem, ion implantation is performed from above the second polysilicon layer to break a natural oxide film in the direct contact portion and lower the contact resistance. However, in this method, a step of forming a mask is required to prevent impurities from being introduced into portions other than the direct contact portion by ion implantation. Therefore, the number of steps is increased, and the cost is increased.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has made it possible to make contact between a substrate and a wiring layer at a direct contact portion without increasing the number of manufacturing steps, and to miniaturize a semiconductor device. To provide a method of forming a direct contact portion that can achieve the above.

[0007]

According to the present invention, first, there is provided a step of forming a first conductive layer on a gate insulating film formed on a semiconductor substrate, and forming the first conductive layer and the gate insulating film on the first conductive layer. Forming a direct contact hole exposing a part of the semiconductor substrate, wherein the first contact hole includes a surface of the semiconductor substrate exposed in the direct contact hole;
Forming a second conductive layer thinner than the first conductive layer on the conductive layer, introducing impurity ions into the second conductive layer by ion implantation, and forming the first conductive layer and the second conductive layer Patterning a gate and a direct contact portion formed of the first conductive layer and the second conductive layer, and providing a method of forming a direct contact portion.

According to the present invention, secondly, a step of forming a first conductive layer on a gate insulating film formed on a semiconductor substrate, and forming a part of the semiconductor substrate on the first conductive layer and the gate insulating film. Forming a direct contact hole to be exposed; forming a second conductive layer thinner than the first conductive layer on the first conductive layer including a surface of the semiconductor substrate exposed in the direct contact hole; A step of cutting out a gate and a direct contact portion made of a first conductive layer and the second conductive layer, and introducing the semiconductor substrate and impurity ions into the semiconductor substrate by performing ion implantation using the gate and the direct contact portion as a mask Providing a method of forming a direct contact portion, comprising a step of forming an impurity diffusion layer by performing I do.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In a method for forming a direct contact portion according to a first invention of the present application, the thickness of a first wiring layer constituting a direct contact portion is increased, and the first wiring layer is laminated on the first wiring layer. The second wiring layer is thinned. This allows
It is possible to break a natural oxide film interposed between the semiconductor substrate and the second wiring layer by self-alignment using the first wiring layer as a mask by ion implantation from above the second wiring layer. As a result, a photo step of forming a mask for an ion implantation step for making the second conductive layer conductive or lowering the resistance can be omitted.

The method for forming a direct contact portion according to the second invention of the present application is characterized in that the gate and the direct contact portion are cut out from the second wiring layer, and then the semiconductor is self-aligned by ion implantation using the first conductive layer as a mask. An impurity diffusion layer as a source / drain region can be formed on the substrate. As a result, a photo step of forming a mask for an ion implantation step for forming source / drain regions can be omitted. Further, since the ions are implanted into the direct contact portion by a process according to a conventional method, a low-resistance direct contact portion can be obtained by a low-cost process.

In the method of forming a direct contact portion according to the first and second aspects of the present invention, impurity ions are introduced into the first wiring layer and the gate insulating layer in order to prevent impurity ions from being introduced into a channel region below the gate. The thickness of the second wiring layer is preferably small enough to allow impurity ions to pass through the second conductive layer when ion implantation is performed with ion implantation energy that does not reach the semiconductor substrate below the gate through the film. .

The thickness of the second conductive layer is preferably 50 nm or less in a normal diffusion layer ion implantation step (ion implantation energy: 30 to 80 keV). Further, it is preferable that the thickness be 5 nm or more in order to secure conduction in the direct contact portion.

The second conductive layer is not particularly limited as long as it is a metal layer such as a polycide layer such as tungsten polycide or a salicide layer in addition to a silicon film such as a polysilicon layer.

Hereinafter, an embodiment of a method for forming a direct contact portion of the present invention will be described with reference to the drawings. As shown in FIG. 1, for example, a P-type silicon substrate 11
A gate oxide film 12 is formed on the surface of the substrate. The gate oxide film 12 is formed using, for example, an oxidation furnace. Specifically, after oxidizing at 800 ° C. in an O ₂ / HCl mixed gas,
By performing annealing at 900 ° C. in N ₂ gas, a gate oxide film 12 having a thickness of 10 nm is obtained.

Next, on the surface of the gate oxide film 12, a first
A first polysilicon layer 13 is formed as a conductive layer. For example, using a low-pressure CVD furnace and using a SiH ₄ gas as a source gas under a condition of 630 ° C., a film thickness of 200 n
An m-th first polysilicon layer 13 is formed.

Next, as shown in FIG. 2, a direct contact pattern 14 made of a resist layer is formed on the surface of the first polysilicon layer 13 by using a usual photolithography technique. Using this pattern 14 as a mask,
The first polysilicon layer 13 is etched by, for example, RIE using a mixed gas of HBr / Cl ₂ . On this occasion,
By the over-etching, the gate oxide film 12 is shaved to the remaining about 5 nm. Thereafter, the resist layer is removed according to a standard method. Next, the native oxide film on the surface of the gate oxide film 12 and the first polysilicon layer 13 exposed by, for example, hydrofluoric acid is removed. As a result, the first polysilicon layer 13
A direct contact hole 15 exposing a part of the surface of the silicon substrate 11 is formed.

Immediately after the completion of the hydrofluoric acid treatment, as shown in FIG. 3, a second polysilicon layer 16 is formed on the surface of the first polysilicon layer 13 including the surface of the silicon substrate 11 exposed in the direct contact hole 15. Form on top. The second polysilicon layer 16 is formed, for example, by low-pressure CVD using SiH ₄ gas as a source gas at 630 ° C. The thickness of the second polysilicon layer 16 is smaller than that of the first polysilicon film 13 (thickness: 200 nm). The second polysilicon layer 16 is preferably 50 nm or less,
In this example, it is 30 nm.

Next, for example, phosphorus (P) ions are
Silicon substrate 1 with ion implantation energy of eV3E15
1 is implanted into the entire surface. As a result, phosphorus ions are introduced into the second polysilicon layer 16 and the first polysilicon layer 13 to lower the resistance. At the same time, the natural oxide film interposed between the silicon substrate 11 and the second polysilicon layer 16 in the direct contact hole is broken.

Thereafter, a local wiring portion including the gate 17 and the direct contact portion 18 is cut out from the first polysilicon layer 13 and the second polysilicon layer 16 according to a standard method.

Next, N-type impurity ions are introduced into the silicon substrate 11 by ion implantation to form a transistor. As a result, an impurity diffusion layer 19 as a source / drain region is formed on the silicon substrate 11.

In the method for forming the direct contact portion according to the present embodiment as described above, the second polysilicon layer 16
Is thinner than the first polysilicon layer 13, the ion implantation for lowering the resistance of the second polysilicon layer 16 causes a natural contact between the silicon substrate 11 and the second polysilicon layer 16 in the direct contact hole. The oxide film is broken. This ion implantation is performed by self-alignment using the first polysilicon layer 13 as a mask. Therefore,
There is no need to separately perform a photo step for forming a mask to remove the natural oxide film. As a result, the number of steps can be reduced, and an alignment error can be eliminated.

In order to form a transistor, LDD
When ion implantation used in a general diffusion layer forming step such as ion implantation or S / D ion implantation is performed, the phosphorus ions are introduced into the direct contact portion 18, and the resistance of the direct contact portion 18 is further reduced. . Since this ion implantation step is performed by self-alignment using the first polysilicon layer 13 as a mask, as in the case of introducing impurities into the second polysilicon layer 16, a photo step must be separately performed to form a mask. There is no. As a result, the number of steps can be reduced, and an alignment error can be eliminated.

In this embodiment, the second polysilicon layer 1
6 is introduced by ion implantation. However, for example, using a diffusion furnace, POCl at 860 ° C.
_{Even when 3} doping is used, the silicon substrate 11 and the second polysilicon layer 16 in the direct contact portion 18 are implanted during ion implantation for forming a transistor.
The natural oxide film interposed between them can be broken.

[0024]

As described above, the method of forming the direct contact portion according to the first invention of the present application is the method of forming the second conductive layer of the first and second conductive layers constituting the gate and the direct contact portion. By making it thinner than one conductive layer, one ion implantation can simultaneously introduce impurities into the second conductive layer and break a natural oxide film interposed between the semiconductor substrate and the second conductive layer. it can. Therefore, preliminary ion implantation for removing the natural oxide film can be performed by self-alignment without forming a mask, so that the number of steps can be reduced and an alignment error can be eliminated.

Further, the method of forming a direct contact portion according to the second invention of the present application is a method of forming a direct contact portion between the first and second conductive layers forming the gate and the direct contact portion.
By making the conductive layer thinner than the first conductive layer, formation of source / drain regions and breaking of a natural oxide film interposed between the semiconductor substrate and the second conductive layer are simultaneously performed by one ion implantation. be able to. Therefore, preliminary ion implantation for removing the natural oxide film can be performed by self-alignment without forming a mask, so that the number of steps can be reduced and an alignment error can be eliminated. Further, by this ion implantation, an impurity can be introduced into the direct contact portion to further reduce the resistance.

[Brief description of the drawings]

FIG. 1 is a sectional view showing one step of a first embodiment of a method for forming a direct contact portion of the present invention.

FIG. 2 is a sectional view showing one step of the first embodiment of the method for forming a direct contact portion of the present invention.

FIG. 3 is a sectional view showing one step of the first embodiment of the method for forming a direct contact portion of the present invention.

FIG. 4 is a sectional view showing one step of the first embodiment of the method for forming a direct contact portion of the present invention.

[Explanation of symbols]

11: silicon substrate, 12: gate oxide film, 13: first
Polysilicon layer, 14 direct contact pattern, 15 direct contact hole, 16 second polysilicon layer, 17 gate, 18 direct contact portion, 19 impurity diffusion layer.

Claims (8)

[Claims] A step of forming a first conductive layer on a gate insulating film formed on a semiconductor substrate; forming a direct contact hole exposing a part of the semiconductor substrate on the first conductive layer and the gate insulating film; Forming a second conductive layer thinner than the first conductive layer on the first conductive layer including a surface of the semiconductor substrate exposed in the direct contact hole; and forming the second conductive layer by ion implantation. A method for forming a direct contact portion, comprising: introducing an impurity ion into a layer; and cutting out a gate and a direct contact portion made of the first conductive layer and the second conductive layer. 2. The method according to claim 1, wherein the ion implantation energy is such that the impurity ions do not reach the semiconductor substrate under the gate, and the impurity ions pass through the second conductive layer. 2. The method for forming a direct contact portion according to claim 1, wherein the thickness is as small as possible. 3. The method according to claim 1, wherein the thickness of the second conductive layer is 50 nm or less. 4. The method according to claim 1, wherein the second conductive layer is formed of a polysilicon film, a polycide film, or a salicide film. 5. A step of forming a first conductive layer on a gate insulating film formed on a semiconductor substrate, forming a direct contact hole exposing a part of the semiconductor substrate on the first conductive layer and the gate insulating film. Forming; forming a second conductive layer thinner than the first conductive layer on the first conductive layer including a surface of the semiconductor substrate exposed in the direct contact hole; A step of cutting out a gate and a direct contact portion made of a second conductive layer, and introducing the semiconductor substrate and impurity ions into the semiconductor substrate by performing ion implantation using the gate and the direct contact portion as a mask to form an impurity diffusion layer. A method for forming a direct contact portion, comprising a step of forming. 6. When the ion implantation energy is such that the impurity ions do not reach the semiconductor substrate under the gate, the impurity ions pass through the second conductive layer. 6. The method for forming a direct contact portion according to claim 5, wherein the thickness is as small as possible. 7. The method according to claim 5, wherein the thickness of the second conductive layer is 50 nm or less. 8. The method according to claim 5, wherein the second conductive layer is made of a polysilicon film, a polycide film, or a salicide film.