JPH10284570A - Semiconductor manufacturing device and manufacture of semiconductor integrated circuit device using it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To maintain the clean surfaces of wafers treated in the preceding processes so that the wafers may be treated in the succeeding process even when the wafer-treating chamber of the succeeding process gets out of order by keeping the wafers in an inert gas atmosphere. SOLUTION: A semiconductor manufacturing device incorporates a wafer keeping section 7 which is filled up with an inert gas, such as the nitrogen gas, etc. When a series of cleaning treatment is performed on wafers, the wafers are kept in the wafer keeping section 7. After keeping, the wafers are heat- treated by moving the wafers to a heat-treating chamber 8 of the next process from the section 7. When the chamber 8 of the next process gets out of order, all uncleaned and cleaned wafers in the areas of wafer transporting sections 2, 4, and 6 are cleaned in a cleaning chamber 5 and kept in the wafer keeping chamber 7.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing apparatus and a method of manufacturing a semiconductor integrated circuit device using the same, and more particularly, to a semiconductor device capable of maintaining cleanliness of a wafer surface when having various wafer processing units. The present invention relates to a manufacturing apparatus and a method for manufacturing a semiconductor integrated circuit device using the same.

[0002]

2. Description of the Related Art The present inventors have studied a semiconductor manufacturing apparatus used in a method of manufacturing a semiconductor integrated circuit device. The following are the techniques studied by the inventor,
The outline is as follows.

That is, LSI (Large Scale Integrat)
In a wafer processing for manufacturing a semiconductor integrated circuit device such as an ed circuit, for example, a wafer such as a silicon wafer is cleaned, oxidized, heat-treated, or subjected to CVD (Chem.
In some cases, an insulating film such as a silicon oxide film is formed on a wafer by using an ionic vapor deposition method or a sputtering method.

A cluster apparatus cleans, oxidizes, and heat-treats a wafer such as a silicon wafer, or deposits an insulating film such as a silicon oxide film on the wafer using a CVD method or a sputtering method, and processes the wafer. Oxidation and nitridation in a controlled atmosphere while preventing the active clean surface of the wafer after being performed from being contaminated by airborne fine particles and organic substances and being oxidized by oxygen and moisture in the air. This is a semiconductor manufacturing apparatus that performs heat treatment, CVD, and sputtering for such purposes.

[0005] As a document describing a semiconductor manufacturing apparatus such as an integrated process apparatus, for example, "'" published by Press Journal Co., Ltd. on November 2, 1989.
90 latest semiconductor process technology "on pages 47 to 51.

[0006]

However, when the above-described cluster apparatus has a heat treatment chamber, a CVD chamber, and a sputtering chamber, for example, after performing a heat treatment of a wafer using the heat treatment chamber,
If the next process, for example, a CVD chamber breaks down, the wafer process in the next process cannot be performed, and the wafer is taken out of the cluster device. Therefore, there arises a problem that the active clean surface of the taken-out wafer is contaminated by fine particles and organic substances in the air or oxidized by oxygen and moisture in the air.

Further, the above-described cluster apparatus has a structure in which, for example, cleaning is a single-wafer processing and oxidation is a two-wafer processing, or, for example, cleaning and oxidation are single-wafer processing and CVD is a batch processing. After performing the pre-process of the single-wafer processing, the wafer is taken out of the apparatus, and the wafers are put together.
Since the next step of the single-wafer processing or the batch processing is performed, the wafers requiring the processing of the next step cannot be stored without exposing the wafer to the atmosphere.
Further, the wafer cannot be stored without reducing the processing capacity of the cluster device and without increasing the standby time.

Further, after performing wafer processing on the wafer using the above-described cluster apparatus, the wafer is transferred to another semiconductor manufacturing apparatus without exposing the wafer to the atmosphere.
The wafer processing in the next step cannot be performed by the apparatus.

SUMMARY OF THE INVENTION It is an object of the present invention to maintain a clean surface of a wafer such that a clean surface of the wafer can be maintained and a wafer process of the next process can be performed even when a wafer processing chamber in the next process breaks down. And a method of manufacturing a semiconductor integrated circuit device using the same.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0011]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

In other words, the semiconductor manufacturing apparatus of the present invention is a semiconductor manufacturing apparatus that performs a wafer process in a previous process and then performs a wafer process in a next process, and stores the wafer that has been subjected to the wafer process in the previous process. A wafer storage unit for storing wafers in a state where the wafers are maintained in an inert gas; and a wafer storage unit for storing a wafer processing area in a previous process and a first wafer transfer area. And a region where the next wafer processing is performed and
Are connected by a wafer transfer unit.

Further, in the method of manufacturing a semiconductor integrated circuit device according to the present invention, a wafer cleaning process, an oxidation process, a nitriding process, a heat treatment, a CVD process, a sputtering process, or the like is performed using the semiconductor manufacturing device.

[0014]

Embodiments of the present invention will be described below in detail with reference to the drawings. In all the drawings for describing the embodiments, components having the same function are denoted by the same reference numerals, and redundant description will be omitted.

(First Embodiment) FIG. 1 is a schematic diagram showing a semiconductor manufacturing apparatus according to a first embodiment of the present invention.

As shown in FIG. 1, in the semiconductor manufacturing apparatus of the first embodiment, 1 is a loader unit, 2 is a wafer transfer unit, 3 is a cleaning processing chamber, and 4 is a wafer transfer unit. 5 is a cleaning processing chamber, and 6 is a cleaning processing chamber.
Denotes a wafer transfer unit, 7 denotes a wafer storage unit, and 8 denotes a heat treatment chamber in the next step.

In this case, the semiconductor manufacturing apparatus according to the first embodiment is characterized in that a wafer storage unit 7 is disposed, and the wafer storage unit 7 is filled with an inert gas such as nitrogen gas. Is what it is. The loader unit 1, the wafer transfer unit 2, the cleaning chamber 3, etc. other than the wafer storage unit 7 are the same as those of the conventional semiconductor manufacturing apparatus.

The operation of the semiconductor manufacturing apparatus according to the first embodiment is as follows. That is, after a wafer such as a silicon wafer is set in the loader unit 1, the set wafer is transferred via the wafer transfer unit 2 to the cleaning chamber 3.
Then, a cleaning process such as a chemical solution process is performed by the cleaning process chamber 3 to perform a wafer cleaning process. Next, the wafer is sent to the cleaning processing chamber 5 via the wafer transfer unit 4, and the cleaning processing such as a chemical solution processing is performed again by the cleaning processing chamber 5, and the cleaning processing of the wafer is performed.

During this series of cleaning processing of the wafers, the wafers are put into the wafer storage unit 7, and the wafers are stored in the wafer storage unit 7. Then, the wafers are transferred from the wafer storage unit 7 to the next heat treatment. The wafer is transferred to the chamber 8 and the wafer is subjected to a heat treatment using the heat treatment chamber 8.

However, if the heat treatment chamber 8 in the next process breaks down, all of the wafers before and after the cleaning process in the region from the wafer transfer unit 2 to the wafer transfer unit 6 are cleaned using the cleaning process chamber 5. Is performed, the wafer is stored in the wafer storage unit 7 filled with an inert gas. Then, an operation of correcting the failure of the heat treatment chamber 8 is performed. In this case, the failure of the heat treatment chamber 8 in the next process can be corrected while all the wafers in the cleaning process are stored in the wafer storage unit 7 while maintaining the clean surface of the wafer. By supplying the wafer from the wafer storage unit 7 to the normalized heat treatment chamber 8, the heat treatment of the wafer is performed using the heat treatment chamber 8.

According to the above-described semiconductor manufacturing apparatus of the first embodiment, the wafer cleaning process and the heat treatment are performed. In the case of failure, all of the wafers before and after the cleaning process in the region from the wafer transfer unit 2 to the wafer transfer unit 6 are cleaned using the cleaning chamber 5 and then filled with an inert gas. The wafer can be stored in the wafer storage unit 7.

Therefore, the failure of the heat treatment chamber 8 in the next step can be corrected while all the wafers in the cleaning process are stored in the wafer storage unit 7 while maintaining the clean surface of the wafer. After that, by supplying the wafer from the wafer storage unit 7 to the normalized heat treatment chamber 8, the heat treatment of the wafer can be performed using the heat treatment chamber 8.

As a result, according to the semiconductor manufacturing apparatus of the first embodiment, the provision of the wafer storage
Since the wafers having undergone the series of wafer cleaning processes can be stored in the wafer storage unit 7, it is not necessary to remove the wafers from the semiconductor manufacturing apparatus even when the heat treatment chamber 8 in the next process breaks down. , A clean surface of the wafer can be maintained. Therefore, in the heat treatment chamber 8 in the next step, the heat treatment can be performed on the wafer having the clean surface, so that the heat treatment with high performance and high reliability can be performed in a state where the occurrence of the characteristic failure is prevented.

In the semiconductor manufacturing apparatus according to the first embodiment, the heat treatment chamber 8 in the next step may be replaced with a sputtering chamber or a CVD chamber.

Further, using the semiconductor manufacturing apparatus of the first embodiment, a silicon oxide film as a field insulating film of a semiconductor integrated circuit device can be formed by performing a heat treatment on a wafer such as a silicon wafer. In this case, after performing a cleaning process in a pre-process on a wafer such as a silicon wafer,
In the state of the wafer having the clean surface, a silicon oxide film as a field insulating film can be formed by performing a heat treatment in the next step. Further, the semiconductor manufacturing apparatus of the first embodiment is used to sputter a wiring layer made of, for example, a conductive polycrystalline silicon layer and an interlayer insulating film made of, for example, a silicon oxide film in a multilayer wiring structure of a semiconductor integrated circuit device. And a CVD chamber.

Therefore, according to the method of manufacturing a semiconductor integrated circuit device using the semiconductor manufacturing device of the first embodiment,
After performing a pre-cleaning process on a wafer such as a silicon wafer, a field insulating film, a wiring layer, and an interlayer insulating film can be formed by performing a heat treatment, a sputtering, and a CVD in a next process in a state of a wafer having a clean surface. ,
A semiconductor integrated circuit device having high performance and high reliability can be manufactured with high yield in a state where occurrence of characteristic failure is prevented.

(Embodiment 2) FIG. 2 is a schematic configuration diagram showing a semiconductor manufacturing apparatus according to Embodiment 2 of the present invention.

As shown in FIG. 2, in the semiconductor manufacturing apparatus according to the second embodiment, 9 is a loader section, 10 is an unloader section, 11 is a main frame, and 12 is an oxidation processing chamber. , 13 are chambers for nitriding. Reference numeral 14 denotes a loader unit, 15 denotes an unloader unit, 16 denotes a main frame, and 17 denotes a CV.
D is a chamber, and 18 is a CVD chamber.
Reference numeral 19 denotes a wafer storage unit, reference numeral 20 denotes a wafer transfer unit between the wafer storage unit 19 and the main frame 11, and reference numeral 21 denotes a wafer transfer unit between the wafer storage unit 19 and the main frame 16.

In this case, the semiconductor manufacturing apparatus according to the second embodiment is characterized in that a wafer storage unit 19 is provided, and the wafer storage unit 19 is filled with an inert gas such as nitrogen gas. Is what it is. Further, a wafer processing unit having a wafer storage unit 19 and an oxidation processing chamber 12 and a nitridation processing chamber 13 other than the wafer transfer unit 20 and the wafer transfer unit 21 connected thereto (FIG. 2).
2) and a wafer processing section (right side in FIG. 2) having a CVD chamber 17 and a CVD chamber 18 are the same as those in the conventional semiconductor manufacturing apparatus.

The operation of the semiconductor manufacturing apparatus according to the second embodiment is as follows. That is, after setting a wafer such as a silicon wafer in the loader unit 9, the set wafer is transferred to the oxidation processing chamber 12 or the nitridation processing chamber 13 via the main frame 11, and the oxidation processing chamber 12 Oxidation processing is performed, or nitridation processing is performed in the nitridation processing chamber 13. In this case, the oxidation treatment or the nitridation treatment may be performed independently or may be performed continuously as a series.

Thereafter, the wafer is sent to the wafer transfer section 20, and the wafer sent from the wafer transfer section 20 is stored in the wafer storage section 19. Next, the wafer is sent to the wafer transfer section 21, the wafer is transferred to the main frame 16 using the wafer transfer section 21, the wafer is transferred to the CVD chamber 17 or the CVD chamber 18 through the main frame 16, and the CVD is performed by the CVD chamber 17 or the CVD chamber 18. In this case, CV
CVD using the D chamber 17 or the CVD chamber 18 may be performed independently or may be performed continuously as a series. Next, the processed wafer is sent to the unloader 15 to complete a series of wafer processing.

During this series of wafer processing,
Since the wafer is stored in the wafer storage unit 19 between the pre-process of the oxidation process or the nitriding process and the next process of the CVD, the wafer is stored in the wafer storage unit 19 after the pre-process is performed. After the wafer is stored in the wafer storage unit 19, the wafer is transferred from the wafer storage unit 19 to the CVD chamber 17 or the CVD chamber 18 in the next process, and the CVD is performed using the wafer.

However, in the next step, the CVD chamber 17 or the CVD chamber or the main frame 1
If the wafer 6 (wafer processing unit in the next process) breaks down, all the wafers before and after the oxidation or nitridation process in the region of the oxidation process chamber 12 or the nitrification process chamber 13 or the main frame 11 are oxidized in the previous process. After performing the treatment or the nitriding treatment, the wafer is stored in the wafer storage unit 19 filled with an inert gas. Then, in the next step, for example, an operation of correcting a failure of the CVD chamber 17 is performed. In this case, all of the wafers in process in the previous process are stored in the wafer storage unit 19 while maintaining the clean surface of the wafer, and the next process, for example, CV
The failure of the D chamber 17 can be corrected, and thereafter, the wafer is provided from the wafer storage unit 19 through the main frame 16 to the normalized CVD chamber 17 so that the CVD of the wafer is performed using the CVD chamber 17. .

According to the above-described semiconductor manufacturing apparatus of the second embodiment, the wafer is oxidized or nitrided and the CVD is performed, and the wafer is oxidized or nitrided (wafer processing in the previous process). During the next process
If the VD chamber 17 or the CVD chamber 18 or the main frame 16 (wafer processing unit in the next process) breaks down, all the wafers before and after the oxidizing or nitriding process in the region of the previous process are removed from the oxidizing process chamber 12. After performing the oxidizing process by using the method described above, or performing the nitriding process by using the nitriding process chamber 13, the wafer can be stored in the wafer storage unit 19 filled with the inert gas.

Therefore, all of the wafers that have been processed in the preceding wafer processing are stored in the wafer storage unit 19 while maintaining the clean surface of the wafer, and the next chamber CVD chamber 17 or the next CVD chamber is stored. 1
8 or the main frame 16 (wafer processing unit in the next process) can be repaired, and then the normalized CV
By providing the wafer from the wafer storage unit 19 to the D chamber 17, the CVD chamber 18, or the main frame 16, the CVD of the wafer can be performed using the CVD chamber 17 or the CVD chamber 18.

As a result, according to the semiconductor manufacturing apparatus of the second embodiment, since the wafer storage unit 19 is provided, it is possible to store the wafer on which the wafer processing in the previous process has been performed in the wafer storage unit 19. The next step CVD
Even when the chamber 17 for CVD, the chamber 18 for CVD, or the main frame 16 (wafer processing section in the next process) breaks down, it is not necessary to take out the wafer from the semiconductor manufacturing apparatus, and the clean surface of the wafer can be maintained. Therefore, in the next wafer processing, CVD can be performed on a wafer having a clean surface, so that high-performance and high-reliability CVD can be performed while preventing occurrence of characteristic failure.

In the semiconductor manufacturing apparatus according to the second embodiment, the oxidation chamber 12 or the nitriding chamber 13 in the preceding step may be replaced with a sputtering chamber, a CVD chamber, a heat treatment chamber, or the like. Alternatively, a mode in which the CVD chamber 17 or the CVD chamber 18 in the next step is replaced with a sputtering chamber, a heat treatment chamber, or the like can be adopted.

Further, using the semiconductor manufacturing apparatus of the second embodiment, for example, a dynamic random access memory (DRAM) is used.
y) Capacitor over bit line (Capacitor
A capacitor dielectric film is formed on the lower electrode (storage node electrode, storage electrode) of the capacitor of an over bitline (COB) type memory cell, and the capacitor upper electrode (plate electrode) is formed on the dielectric film. Can be formed.

That is, after a silicon nitride film as a dielectric film of a capacitor is formed on the lower electrode of the capacitor on a wafer such as a silicon wafer using the nitriding chamber 13 of the previous process, the CVD process of the next process is performed. Using conductive chamber 17, a conductive polycrystalline silicon film as an upper electrode of a capacitor can be formed on the dielectric film. In this case, after a silicon nitride film is formed on a wafer such as a silicon wafer by using the nitriding chamber 13 in the previous process,
A conductive polycrystalline silicon film can be formed using the CVD chamber 17 in the next step.

Therefore, according to the method of manufacturing a semiconductor integrated circuit device using the semiconductor manufacturing device of the second embodiment,
After forming a silicon nitride film in the previous step on a wafer such as a silicon wafer, in the state of a wafer having a clean surface, forming a conductive polycrystalline silicon film in the next step is performed as a dielectric film of a capacitor. Forming a silicon oxide film and a conductive polycrystalline silicon film as an upper electrode of the capacitor can prevent the formation of a natural oxide film without being exposed to the atmosphere, thereby reducing the capacitance of the capacitor and preventing variation in capacitance. As a result, a semiconductor integrated circuit device having high performance and high reliability can be manufactured with high yield while preventing occurrence of characteristic failure.

(Embodiment 3) FIG. 3 is a schematic configuration diagram showing a semiconductor manufacturing apparatus according to Embodiment 3 of the present invention.

As shown in FIG. 3, in the semiconductor manufacturing apparatus of the third embodiment, 9 is a loader section, 10 is an unloader section, 11 is a main frame, and 22 is a cleaning processing chamber. And 23 are oxidation processing chambers. Reference numeral 14 denotes a loader unit, 15 denotes an unloader unit, 16 denotes a main frame, and 24 denotes a CV.
This is a chamber for D. Reference numeral 25 denotes a wafer storage unit; 26, a wafer transfer unit between the wafer storage unit 25 and the main frame 11; and 27, a wafer transfer unit between the wafer storage unit 25 and the main frame 16.

In this case, the semiconductor manufacturing apparatus according to the third embodiment is characterized in that a wafer storage unit 25 is provided, and the wafer storage unit 25 is filled with an inert gas such as nitrogen gas. Is what it is. Further, a wafer processing unit having a wafer storage unit 25 and a cleaning process chamber 22 and an oxidation process chamber 23 other than the wafer transfer unit 26 and the wafer transfer unit 27 connected thereto (FIG. 3).
And the wafer processing section having the CVD chamber 24 (right side in FIG. 3) are the same as those in the conventional semiconductor manufacturing apparatus.

The cleaning processing chamber 22 and the oxidation processing chamber 23 have a single-wafer processing structure for processing one wafer. Further, the CVD chamber 24 has a multi-wafer processing structure for simultaneously processing a plurality of wafers.

Accordingly, an automatic wafer transfer unit is installed in the wafer storage unit 25, and as shown in FIG. 4, the stored wafer 2 is stored using the automatic wafer transfer unit.
9 can be automatically transferred to the wafer carrier box 28.

The operation of the semiconductor manufacturing apparatus according to the third embodiment is as follows. That is, after a wafer such as a silicon wafer is set in the loader unit 9, the set wafer is transferred to the cleaning processing chamber 22 or the oxidation processing chamber 23 via the main frame 11, and the cleaning processing chamber 22 A cleaning process is performed, or an oxidation process is performed by the oxidation process chamber 23. In this case, the cleaning process or the oxidation process may be performed independently or may be performed continuously as a series.

Thereafter, the wafer is sent to the wafer transfer section 26, and the wafer sent from the wafer transfer section 26 is stored in the wafer storage section 25. Next, the wafer is sent to the wafer transfer section 27, the wafer is transferred to the main frame 16 using the wafer transfer section 27, and the wafer is transferred to the CVD chamber 24 via the main frame 16; CVD is performed. In this case, CVD
The CVD using the chamber 24 is a multi-wafer process for simultaneously processing a plurality of wafers. Therefore, an automatic wafer transfer unit is installed in the wafer storage unit 25, and the stored wafer 29 can be automatically transferred to the wafer carrier box 28 using the automatic wafer transfer unit. Has become. next,
The processed wafer is sent to the unloader 15 to complete a series of wafer processing.

During this series of wafer processing,
Since the wafer is stored in the wafer storage unit 25 between the pre-process of the cleaning process or the oxidation process and the next process of the CVD, the wafer is stored in the wafer storage unit 25 after the pre-process is performed. After the wafer is stored in the wafer storage unit 25, the wafer is transferred from the wafer storage unit 25 to the CVD chamber 24 in the next process, and CVD is performed using the wafer.

However, if the CVD chamber 24 or the main frame 16 (wafer processing section in the next step) fails in the next step, the cleaning chamber 22 or the oxidation chamber 23 or the main frame 11
After all of the wafers before and after the cleaning process or the oxidation process in the region are subjected to the cleaning process or the oxidation process in the previous process, in the wafer storage unit 25 filled with the inert gas,
store. Then, in the next step, for example, the CVD chamber 2
Perform work to correct the failure of 4. In this case, all of the wafers that have been processed in the previous process are stored in the wafer storage unit 25 while maintaining the clean surface of the wafer, and the next process, for example, the failure of the CVD chamber 24 is corrected. Thereafter, the wafer is supplied from the wafer storage unit 25 through the main frame 16 to the normalized chamber 24 for CVD, whereby the CVD of the wafer is
This is performed using the VD chamber 24.

According to the above-described semiconductor manufacturing apparatus of the third embodiment, the wafer cleaning process or the oxidation process and the CVD are performed, and the wafer cleaning process or the oxidation process (wafer process in the previous process) is performed. During the next process
If the VD chamber 24 or the main frame 16 (wafer processing unit in the next process) fails, all the wafers before and after the cleaning process or the oxidation process in the region of the previous process are cleaned using the cleaning process chamber 22. After performing the oxidation process using the oxidation process chamber 23, the wafer storage unit 25 filled with the inert gas
Can be stored.

Therefore, all of the wafers that have been processed in the previous process are stored in the wafer storage unit 25 while maintaining the clean surface of the wafer, and the CVD chamber 24 or the main frame 16 in the next process is processed.
The failure of the (wafer processing unit in the next process) can be corrected, and thereafter, the wafer is supplied from the wafer storage unit 25 to the normalized CVD chamber 24 or the main frame 16, and the CVD of the wafer is performed in the CVD chamber 24. Can be performed.

As a result, according to the semiconductor manufacturing apparatus of the third embodiment, since the wafer storage unit 25 is provided, it is possible to store the wafer on which the wafer processing in the previous process has been performed in the wafer storage unit 25. The next step CVD
Even when the chamber 24 or the main frame 16 (wafer processing section in the next step) breaks down, it is not necessary to take out the wafer from the semiconductor manufacturing apparatus, and the clean surface of the wafer can be maintained. Therefore, in the next wafer processing, a wafer having a clean surface is subjected to CVD.
Is performed, high performance and highly reliable CVD can be performed in a state where occurrence of characteristic failure is prevented.

According to the semiconductor manufacturing apparatus of the third embodiment, the next CVD process is performed by the CVD chamber 24.
Is used to process a plurality of wafers, and the number of wafers to be processed is stored at once in the wafer storage unit 25, and is stored using the automatic wafer transfer unit installed in the wafer storage unit 25. Wafer 29 can be automatically transferred to wafer carrier box 28. Therefore, wafer processing can be performed efficiently.

Further, according to the semiconductor manufacturing apparatus of the third embodiment, the wafer storage unit 25 is, for example, a SMIF (Standa
(rd Mechanical InterFace) compatible, the wafer transported to the wafer storage unit 25 is transported to another SMIF-compatible semiconductor manufacturing device or a semiconductor manufacturing device with a load lock function by the SMIF box,
It is possible to obtain the same effect as when processing is performed by an integrated process device such as one cluster device.

Further, according to the semiconductor manufacturing apparatus of the third embodiment, the flexibility of the process construction in the manufacturing process of the semiconductor integrated circuit device is improved by expanding the combination of the integrated processing processes in the clean atmosphere. can do.

In the semiconductor manufacturing apparatus of the third embodiment, the cleaning chamber 22 or the oxidation chamber 23 in the preceding process can be replaced with a sputtering chamber, a CVD chamber, a heat treatment chamber, or the like. Alternatively, the CVD chamber 24 in the next step may be replaced with a heat treatment chamber or the like.

After cleaning a wafer such as a silicon wafer using the cleaning chamber 22 using the semiconductor manufacturing apparatus of the third embodiment, oxidation of the MOSFET as a gate insulating film in the semiconductor integrated circuit device is performed. A silicon film is formed using the oxidation processing chamber 23, and thereafter, a conductive polycrystalline silicon film as a gate electrode can be formed using the next process CVD chamber 24.

In this case, after a wafer such as a silicon wafer is cleaned by using the cleaning chamber 22 in the preceding process, the silicon oxide film as the gate insulating film of the MOSFET in the semiconductor integrated circuit device is converted into the oxidation chamber 2.
3, and then a conductive polycrystalline silicon film as a gate electrode can be formed in a state of a wafer having a clean surface by using a CVD chamber 24 in the next step.

Therefore, according to the method of manufacturing a semiconductor integrated circuit device using the semiconductor manufacturing device of the third embodiment,
After a wafer such as a silicon wafer has been subjected to a pre-cleaning process and an oxidizing process for forming a silicon oxide film as a gate insulating film, the wafer having a clean surface is used in a CVD chamber 24 in the next process. As a result, since a conductive polycrystalline silicon film can be formed as a gate electrode, a semiconductor integrated circuit device having high performance and high reliability can be manufactured with high yield while preventing occurrence of characteristic failure.

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the above embodiments, and various modifications may be made without departing from the gist of the invention. Needless to say, it can be changed.

For example, the semiconductor manufacturing apparatus according to the present invention is an integrated process in which a wafer storage unit is arranged between each wafer processing apparatus such as a conventional CVD apparatus, sputtering apparatus, cluster apparatus, multi-chamber apparatus, continuous processing apparatus and the like. It can be an embodiment of an apparatus.

Further, in the semiconductor manufacturing apparatus of the present invention, the wafer storage unit (the automatic wafer transfer unit is installed, and the stored wafer is automatically transferred to the wafer carrier box) according to the third embodiment. Can be applied to the semiconductor manufacturing apparatus of the first or second embodiment.

In the method of manufacturing a semiconductor integrated circuit device according to the present invention, a wafer such as a silicon
n on Insulator) It can be changed to a wafer composed of a substrate, and a method of manufacturing a semiconductor integrated circuit device in which various semiconductor elements such as a MOSFET, a CMOSFET, and a bipolar transistor are combined.

Further, the present invention relates to a MOSFET, a CMO
Logic system including SFET, BiCMOSFET, etc. or DRAM, SRAM (Static Random
Access Memory), FRAM (Ferro electric Random Ac)
The present invention can be applied to a method of manufacturing various semiconductor integrated circuit devices having a memory system such as a cess memory.

[0065]

Advantageous effects obtained by typical ones of the inventions disclosed in the present application will be briefly described.
It is as follows.

(1). According to the semiconductor manufacturing apparatus of the present invention, when a series of wafer processing is performed, for example, if the heat treatment chamber in the next step breaks down, for example, all of the wafers before and after the previous step such as cleaning processing are cleaned, for example. After performing the pre-process such as the cleaning process using the processing chamber,
The wafer can be stored in a wafer storage unit filled with an inert gas.

Therefore, it is possible to fix a failure in the next process, for example, a heat treatment chamber in a state where all of the wafers set in the previous process are stored in the wafer storage unit while maintaining the clean surface of the wafer. Thereafter, by supplying the wafer from the wafer storage unit to the normalized heat treatment chamber, the heat treatment of the wafer can be performed using the heat treatment chamber.

As a result, according to the semiconductor manufacturing apparatus of the present invention, since the wafer storage section is provided, the wafers that have been subjected to the series of pre-processes can be stored in the wafer storage section. Even in the case where, for example, the heat treatment chamber in the next step breaks down, it is not necessary to remove the wafer from the semiconductor manufacturing apparatus, and the clean surface of the wafer can be maintained. Therefore, in the heat treatment chamber in the next step, heat treatment can be performed on the wafer having a clean surface, so that high-performance and high-reliability heat treatment can be performed in a state where occurrence of characteristic defects is prevented.

(2). According to the semiconductor manufacturing apparatus of the present invention, for example, a CVD process in the next step performs a plurality of wafers using a CVD chamber, and the number of wafers to be processed there is stored in a wafer storage unit at a time. In addition, the stored wafers can be automatically transferred to the wafer carrier box by using the automatic wafer transfer unit installed in the wafer storage unit.
Therefore, wafer processing can be performed efficiently.

Further, according to the semiconductor manufacturing apparatus of the present invention, by setting the wafer storage unit to, for example, the SMIF, the wafer transferred to the wafer storage unit can be transferred to another SMIF-compatible semiconductor manufacturing apparatus or load lock by the SMIF box. By transferring to a semiconductor manufacturing apparatus with a function, it is possible to obtain the same effect as the processing performed by an integrated process apparatus such as one cluster apparatus.

Further, according to the semiconductor manufacturing apparatus of the present invention, the flexibility of the process construction in the manufacturing process of the semiconductor integrated circuit device can be improved by expanding the combination of the integrated processing processes in a clean atmosphere. it can.

(3). According to the method for manufacturing a semiconductor integrated circuit device using the semiconductor manufacturing apparatus of the present invention, after performing a cleaning process in a previous process on a wafer such as a silicon wafer, in a state of a wafer having a clean surface, heat treatment in the next process, A field insulating film, a wiring layer, and an interlayer insulating film can be formed by performing sputtering and CVD. Further, according to the method for manufacturing a semiconductor integrated circuit device using the semiconductor manufacturing apparatus of the present invention, after forming a silicon nitride film in a previous step on a wafer such as a silicon wafer, in a state of a wafer having a clean surface, By forming a conductive polycrystalline silicon film in the next step, a silicon nitride film as a dielectric film of the capacitor and a conductive polycrystalline silicon film as an upper electrode of the capacitor can be formed. Further, according to the method of manufacturing a semiconductor integrated circuit device using the semiconductor manufacturing apparatus of the present invention, a wafer such as a silicon wafer is subjected to a pre-cleaning process and an oxidation process for forming a silicon oxide film as a gate insulating film. After that, a conductive polycrystalline silicon film as a gate electrode can be formed in a state of a wafer having a clean surface by using a CVD chamber in the next step.

Therefore, according to the method of manufacturing a semiconductor integrated circuit device using the semiconductor manufacturing device of the present invention, a high-performance and high-reliability semiconductor integrated circuit device can be manufactured with high yield while preventing occurrence of characteristic failure. Can be manufactured.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram illustrating a semiconductor manufacturing apparatus according to a first embodiment of the present invention.

FIG. 2 is a schematic configuration diagram illustrating a semiconductor manufacturing apparatus according to a second embodiment of the present invention;

FIG. 3 is a schematic configuration diagram illustrating a semiconductor manufacturing apparatus according to a third embodiment of the present invention.

FIG. 4 is a schematic sectional view showing a wafer carrier box on which wafers are set.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Loader part 2 Wafer transfer part 3 Cleaning processing chamber 4 Wafer transfer part 5 Cleaning processing chamber 6 Wafer transfer part 7 Wafer storage part 8 Heat treatment chamber 9 Loader part 10 Unloader part 11 Main frame 12 Oxidation processing chamber 13 Nitriding processing Chamber 14 loader section 15 unloader section 16 main frame 17 CVD chamber 18 CVD chamber 19 wafer storage section 20 wafer transfer section 21 wafer transfer section 22 cleaning processing chamber 23 oxidation processing chamber 24 CVD chamber 25 wafer storage section 26 Wafer transfer unit 27 Wafer transfer unit 28 Wafer carrier box 29 Wafer

Claims (10)

[Claims] 1. A semiconductor manufacturing apparatus for performing a wafer process of a next process after performing a wafer process of a previous process as a certain process, wherein a wafer storage unit for storing a wafer subjected to the wafer process of the previous process is provided. The wafer storage unit stores the wafer in an inert gas state while maintaining the wafer in an inert gas, and is connected to a region where the wafer processing in the previous process is performed by a wafer transfer unit, and further includes a wafer in the next process. A semiconductor manufacturing apparatus which is connected to a region where processing is performed. 2. The semiconductor manufacturing apparatus according to claim 1, wherein the wafer process of the preceding step and the next step is a wafer process such as a cleaning process, an oxidation process, a nitriding process, a heat treatment, a CVD process, or a sputtering process. A semiconductor manufacturing apparatus, wherein the semiconductor wafer is divided into two parts, a part of which is used as the wafer processing in the previous step, and another part is used as the wafer processing in the next step. 3. The semiconductor manufacturing apparatus according to claim 1, wherein the wafer process in the preceding process is a cleaning process, and the wafer process in the next process is an oxidation process, a nitriding process,
A semiconductor manufacturing apparatus, which is a heat treatment, a CVD process, or a sputtering process. 4. The semiconductor manufacturing apparatus according to claim 1, wherein the wafer process in the preceding process is an oxidation process and a nitriding process, and the wafer process in the next process is a plurality of C processes.
A semiconductor manufacturing apparatus characterized by VD processing. 5. The semiconductor manufacturing apparatus according to claim 1, wherein the wafer process in the preceding process is a cleaning process and an oxidation process, and the wafer process in the next process is a CVD process. Semiconductor manufacturing equipment. 6. The semiconductor manufacturing apparatus according to claim 1, wherein an automatic wafer transfer unit is provided in said wafer storage unit, and said automatic wafer transfer unit is used. A semiconductor manufacturing apparatus wherein a stored wafer can be automatically transferred to a wafer carrier box. 7. A method for manufacturing a semiconductor integrated circuit device, comprising: performing a manufacturing process of a semiconductor integrated circuit device using the semiconductor manufacturing device according to claim 1. 8. A method for manufacturing a semiconductor integrated circuit device according to claim 7, wherein the semiconductor manufacturing device according to claim 1 is used for cleaning, oxidizing, nitriding a wafer. A method for manufacturing a semiconductor integrated circuit device, comprising performing a wafer process such as a heat treatment, a CVD process, or a sputtering process. 9. The method for manufacturing a semiconductor integrated circuit device according to claim 7, wherein a field insulating film is formed on the wafer, a gate insulating film and a gate electrode of a MOSFET are formed, or a COB is formed. A method of manufacturing a semiconductor integrated circuit device, comprising forming a dielectric film and an upper electrode of a capacitor of a type memory cell. 10. The method of manufacturing a semiconductor integrated circuit device according to claim 7, wherein the number of processed wafers is different between a certain step and a next step. Production method.