JPH10278361A - Print processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To process a print data mixing a various kinds of writing elements, including images, figures and characters, at high speed through a small hardware configuration. SOLUTION: A print data generated at a print data generating section 1 is converted at an intermediate data generating section 31 into an intermediate data. An intermediate data sequence control section 32 rearranges the intermediate data based on the overlap thereof and classifies the intermediate data into groups to be processed in parallel. The intermediate data is added with a group ID, a hardware configuration, and the like, to be processed in parallel. A developing section 4 receives a configuration data from a configuration data managing section 42, as required, by a hardware configuration ID added to the intermediate data and rewrites the function of a reconfigurable developing section 40 under control of a reconfiguration control section 41. The developing section 4 develops the intermediate data into a raster data which is fed to an output section 5.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001] 1. Field of the Invention [0002] The present invention relates to a print processing apparatus capable of performing print processing in page units.

2. Description of the Related Art With the development of an electrophotographic page printer suitable for small, high-speed digital printing, images, figures, characters, and the like, which have escaped from the conventional printing of mainly character information, are handled in the same manner. 2. Description of the Related Art A printing processing apparatus using a description language in which enlargement, rotation, deformation, and the like of an image can be freely controlled has been widely used. A typical example of such a description language is PostScript (Adobe System).
s), Interpress (trademark of Xerox), Acrobat (trademark of Adobe Systems), GDI (Graphics Device I)
Internet, trademark of Microsoft Corporation) and the like are known. Print data written in the description language
It consists of commands and data strings in which drawing commands and data representing images, figures, and characters at arbitrary positions in a page are arranged in an arbitrary order. In order to print with the page printer according to the present invention, printing is performed. First, the print data must be rasterized. Rasterization is the process of developing a raster scan line by developing it into a series of individual dots or pixels that traverse a page or portion of a page, and generating successive scan lines below the page. In a conventional page printer, print data of an entire page is rasterized before printing and stored in a page buffer memory. However, storing raster data for an entire page requires a large amount of memory. In particular, in the latest electrophotographic color page printer, C (Cyan), M
(Magenta), Y (Yellow) , B K (Bl
ack) requires raster data corresponding to the four color toners, and image quality is required more than a black and white page printer. Need. Recently, band memory technology has emerged as a technology for reducing memory requirements from the viewpoint of cost reduction in response to the need for a large amount of memory. Band memory technology can rasterize print data created in a description language faster than rasterizing print data instead of rasterizing all print data for one page before printing by a page printer. The data is converted into relatively simple intermediate data, one page is divided into a plurality of adjacent areas (bands), the intermediate data corresponding to each band is stored, and the intermediate data is sequentially transferred to a raster development processing unit to correspond to the band. This is a technology developed in a buffer memory. In the band memory technology, a memory for storing intermediate data is newly required, but it is possible to reduce a buffer memory that requires a large capacity for raster data. However, in general band memory technology,
By the end of the printing of the raster data of a certain band, it is necessary to finish developing the raster data from the intermediate data for the next band. When the print data includes a complicated graphic drawing instruction or an image drawing instruction with a large amount of data to be handled, or when a specific band in one page includes a complicated graphic drawing instruction or an image drawing instruction, There is a possibility that a situation may occur where the development of the intermediate data into the raster data is not in time. Therefore, it has been considered to use dedicated hardware in order to speed up the processing of developing the intermediate data into the raster data. As mentioned above, objects that are drawn on the page include images, figures, and characters,
These require special processing depending on the type of each object. For example, in the case of an image, resolution conversion, affine conversion, interpolation accompanying these processes, color processing, and the like are performed. In the case of a graphic, coordinate conversion, vector / raster conversion, filling processing, and the like are required. In the case of a character, conversion of outline coordinates, hint processing, vector / raster conversion, filling processing, and the like are required. Therefore, it is necessary to prepare dedicated hardware corresponding to all of these processes one by one. But in this case,
Even if the amount of memory can be reduced, there is a problem that the amount of dedicated hardware to be added increases and the entire system becomes expensive. The H / W for converting the intermediate data into a bitmap can be used only when the intermediate data is converted into a bitmap. There was a problem that it was very useless considering the above. Conventionally, as an attempt to solve such a problem, instead of providing hardware for all functions in parallel, the functions can be changed by reconfiguring hardware programmability or structure, and many functions can be performed with less hardware Attempts have been made to achieve high speed. As a prior art relating to the present invention having such a concept, Japanese Patent Laid-Open Publication No.
55 and JP-A-6-282432.

Problems to be Solved by the Invention
The technique disclosed in Japanese Patent Application Laid-Open No. 5-105605 reconfigures the means for generating an address for the data storage area and reconfigures the operation means for the data in the data storage area obtained by the means for generating the address, thereby performing various image processing. The goal is to achieve this with less hardware. However, this configuration can reconstruct image processing that is significant in address information, but cannot cope with vector processing such as graphics and characters. Also, since image processing is always performed by performing reconstruction, there is also a problem that the reconstruction time increases when various images appear arbitrarily, such as in a page description language (PDL).
Furthermore, unless the rewriting process is a process of almost the same size, the rewriting unit is matched to the largest process, and there is a problem that reconfiguration of processes of various sizes causes waste. JP-A-6-282432 discloses that
A plurality of arithmetic circuits capable of operating in parallel are provided in a necessary number in advance to control the data flow. Such a method is suitable for applications in which a small number of types of arithmetic circuits are frequently used for some image processing, but a type in which various types of drawing elements such as images, figures, and characters are mixed. In this case, since a large number of types of arithmetic circuits are required, there is a problem that the amount of hardware, which is the original purpose, cannot be reduced. The present invention has been made in view of the above points, and reconfigures hardware used for expansion processing at least in accordance with the contents of print data including images, figures, and characters by rewriting / rewriting. An object of the present invention is to enable high-speed and resource-saving printing processing using the same hardware resources by enabling efficient processing in both scales.

According to the present invention, in order to achieve the above-mentioned object, at least one of a character, a figure, and an image drawing element, which is described by a predetermined drawing command, is described. A print processing apparatus that expands print data into second print data of an image output data structure and outputs an image based on the second print data includes a plurality of processing modules and input data of the plurality of processing modules. And switching means for controlling the flow of output data, wherein the hardware means is capable of setting at least one of the function of the processing module and the switching mode of the switching means in accordance with the configuration data. The configuration data is changed accordingly, and the first print data is developed into the second print data in a mode corresponding to the hardware configuration information. Hardware means, input means for inputting the first print data, judgment means for judging overlap of drawing elements included in the first print data inputted to the input means, judgment information of at least the judgment means The drawing elements of the first print data input to the input means are rearranged based on the content of the first print data input to the input means, and a predetermined format including the hardware configuration information. There is provided a conversion unit that converts the print data into print data and supplies the print data to the hardware unit, and an output unit that outputs an image based on the second print data developed by the hardware unit. In this configuration, a hardware means whose hardware configuration can be set flexibly is provided, and many functions necessary for developing the drawing element can be realized with a small number of hardware elements. Further, it is possible to optimize the processing order of the rendering elements by analyzing the overlapping and the contents of the rendering elements, and to optimize the hardware configuration according to the rendering elements to be processed, thereby improving the throughput. Further, in this configuration, the reordering of the drawing elements in the conversion means may be performed so that the drawing elements which can be developed in parallel by the hardware means are continuous. Further, the parallel deployment by the hardware means may be performed by a hardware configuration set to include a plurality of the same or different functional blocks. Also, the rearrangement of the drawing elements in the conversion means may be performed so that the number of times of changing the configuration data of the hardware means is reduced. Further, the conversion unit may not perform the rearrangement of the order of the drawing elements determined to be overlapped by the determination unit. Further, the determination means may determine the overlap using a circumscribed rectangle including the drawing element. Further, the conversion means may remove the overlap between the drawing elements determined to have the overlap by the determination means, and then perform the rearrangement of the order.
In addition, the reordering of the drawing elements may be performed for each page or for each band obtained by dividing the page into a plurality of scan lines. Further, the hardware means may be capable of changing the hardware configuration in whole or in part. Further, the hardware means may omit the change of the configuration data when the hardware configuration information included in the print data of the predetermined format inputted one after another is the same. Further, the hardware means may include at least a field programmable gate array. Further, the hardware means may include a plurality of processing units, and switching means for switching a flow of input data and output data of the plurality of processing units. Further, the conversion means includes a plurality of processing modules and a switching means for controlling the flow of input data and output data of the plurality of processing modules,
Hardware means capable of setting at least one of the function of the processing module and the switching mode of the switching means in accordance with configuration data, and performing at least a part of the processing of the conversion means by the hardware means in the conversion means May be executed. Further, the hardware means may be set so that a plurality of functional blocks are expanded by performing a pipeline operation. According to the present invention, in order to achieve the above-described object, at least one of a character, a figure, and a drawing element of an image, the first print data described by a predetermined drawing command is
The print processing apparatus that develops the image data into the second print data and outputs the image based on the second print data includes a plurality of processing modules and input data and output data of the plurality of processing modules. Switching means for controlling the flow, and hardware means capable of setting at least one of the function of the processing module and the switching mode of the switching means according to the configuration data,
The first configuration data is changed according to the hardware configuration information, and the first data is changed in a manner corresponding to the hardware configuration information.
Hardware means for expanding the first print data into the second print data, input means for inputting the first print data, and overlapping of drawing elements included in the first print data input to the input means Determining the first print data input to the input means based on at least the determination information of the determination means and the content of the first print data input to the input means. A conversion unit that converts the print data into print data of a predetermined format including hardware configuration information and supplies the print data to the hardware unit; and an output unit that outputs an image based on the second print data developed by the hardware unit. Like that. Also in this configuration, a hardware means whose hardware configuration can be flexibly set is provided, and many functions necessary for developing the drawing element can be realized with a small number of hardware elements. Furthermore, by analyzing the overlap and contents of the drawing elements, the hardware configuration can be optimized according to the drawing element to be processed, and the throughput can be improved. Further, in this configuration, the conversion unit converts the print data including the plurality of continuous drawing elements determined to have no overlap by the determination unit into a hardware configuration that specifies a hardware configuration that develops the plurality of drawing elements in parallel. You may make it convert into the format containing hardware configuration information. Further, the parallel development of the drawing elements may be performed by a hardware configuration including a plurality of the same or different functional blocks. According to the present invention, in order to achieve the above-described object, at least one of a character, a figure, and a drawing element of an image, the first print data described by a predetermined drawing command is
The print processing apparatus that develops the image data into the second print data and outputs the image based on the second print data includes a plurality of processing modules and input data and output data of the plurality of processing modules. Switching means for controlling the flow, and hardware means capable of setting at least one of the function of the processing module and the switching mode of the switching means according to the configuration data,
The first configuration data is changed according to the hardware configuration information, and the first data is changed in a manner corresponding to the hardware configuration information.
Hardware means for expanding the first print data into the second print data; input means for inputting the first print data; and first print data input to the input means.
Converting means for converting the print data into print data of a predetermined format including hardware configuration information corresponding to the content of the first print data and supplying the print data to the hardware means; and second print data developed by the hardware means And an output means for outputting an image based on the image data. Also in this configuration, a hardware means whose hardware configuration can be flexibly set is provided, and many functions necessary for developing the drawing element can be realized with a small number of hardware elements. Furthermore, by analyzing the contents of the drawing element, the hardware configuration can be optimized according to the drawing element to be processed, and the throughput can be improved. In this configuration,
The conversion means, according to the hardware configuration information,
The hardware configuration information in the conversion data may be omitted.

Embodiments of the present invention will be described below. [First Embodiment] FIG. 1 is a block diagram showing a configuration of a first embodiment according to the present invention. 1, the image processing apparatus includes a print data creation unit 1, a print data input unit 2, a conversion processing unit 3, a development processing unit 4, and an output unit 5. Further, the conversion processing unit 3 includes a lexical analysis unit 30, an intermediate data generation unit 31, an intermediate data order control 32, and an intermediate data storage unit 33. The expansion processing unit 4 includes a reconfigurable expansion unit 40 and a reconfiguration control unit 41.
And a configuration data management unit 42. The print data creation unit 1 has a function of creating print data described in a description language from document data generated by an application program for processing document creation and editing in a personal computer or a workstation. . The description language targeted in this embodiment is, for example, PDF (Port) represented by GDI and Acrobat.
table Document Format), Po
A page description language such as stScript (Page De
scripting language). The print data input unit 2 has a communication function for inputting print data generated by the print data creation unit 1 or a function for temporarily storing print data until the print data is output to the conversion processing unit 3. It is. The conversion processing unit 3 converts the print data input from the print data input unit 2 into intermediate data that can be expanded into print data by the expansion processing unit 4 and rearranges the intermediate data. The conversion processing unit 3 includes a lexical analysis unit 30, an intermediate data generation unit 31, an intermediate data order control unit 32, and an intermediate data storage unit 33. The lexical analysis unit 30 cuts out the print data input from the print data input unit 2 as a token according to the syntax of a predetermined description language, and outputs the token to the intermediate data generation unit 31. The intermediate data generating unit 31
The token output from the lexical analysis unit 30 is received and interpreted, a rendering command is executed, and data is generated based on a trapezoid for each rendering command as a basic unit.
Send to 2. The purpose of generating intermediate data is to
To enable high-speed expansion processing. Therefore, the intermediate data is represented by a set of simple figures (trapezoids). In addition, the expansion data ID is also added to the intermediate data as information regarding the expansion processing. The intermediate data order control unit 32 reads a certain amount of intermediate data output from the intermediate data generation unit 31, makes an overlap determination between them, performs rearrangement based on the result, and stores the intermediate data. Output to the unit 33. At this time, for each group of intermediate data that can be processed in parallel based on the rearrangement, information indicating a boundary with another group and hardware that is an identifier for configuration data written to the reconfigurable expansion unit 40 of the expansion processing unit 4 A hardware configuration ID is added. The intermediate data storage unit 33 stores the transmitted intermediate data, and is read from the expansion processing unit 4 as needed. Expansion processing unit 4
Reads the output intermediate data from the conversion processing unit 3 in band units, and creates print data in a band buffer memory in the expansion processing unit 4. This processing is alternately stored in two band buffer memories in the expansion processing unit 4. As will be described later, the output unit 5 used in this embodiment is a color page printer, and the print data alternately stored in the buffer memory corresponds to the print data of the recording color printed by the output unit 5. doing. Subsequently, the print data stored in the band buffer memory is alternately output to the output unit 5 in response to a print data request from the output unit 5. The output unit 5 receives the print data output from the band buffer memory of the expansion processing unit 4, prints it on recording paper, and outputs it. More specifically, CMYB _K (cyan, magenta,
This is a color page printer using a laser scanning type electrophotographic method capable of outputting a full-color image by repeating exposure, development, and transfer for each color of yellow (black). The output unit 6 may be an ink jet type color printer. In this case, print data is simultaneously output from the band buffer memory of the expansion processing unit 4 to the output unit 5 in four colors. Here, the configuration and operation of a color page printer using a general laser scanning type electrophotographic method will be described with reference to FIG. In FIG. 2, a video interface 50 inputs print data corresponding to CMYBK color information sequentially sent from the expansion processing unit 4 to a driver (not shown) for controlling the lighting of a semiconductor laser, and converts it into an optical signal. The semiconductor laser scanning device 51 includes an infrared semiconductor laser, a lens 711, and a polygon mirror 510, and scans the photosensitive drum 72 as spot light of several tens μm. Photoconductor drum 52
Is charged by the charger 53, and the light signal
An electrostatic latent image is formed. The latent image is converted into a toner image by two-component magnetic brush development on the rotary developing device 54 and is transferred onto a sheet adsorbed on the transfer drum 55. Excess toner is removed from the photosensitive drum 52 by the cleaner 56. This process is repeated in the order of BK, Y, M, and C, and multiple transfer is performed on paper. Finally, the sheet is peeled off by the transfer drum 55, and the toner is fixed by the fixing device 57. Reference numeral 58 denotes a sheet transport path. Next, the flow of print data in the print processing apparatus configured as described above will be summarized. The print data created by the print data creation unit 1 is input to the lexical analysis unit 30 of the conversion processing unit 3 via the print data input unit 2. The token extracted from the print data in the lexical analyzer 30 is input to the intermediate data generator 31. The intermediate data generator 31 interprets the token and generates intermediate data divided in band units. The intermediate data order control unit 32 rearranges the order of the intermediate data based on the overlap, divides the intermediate data into groups that can be processed in parallel, and stores one page in the intermediate data storage unit 33 in band units. At this time, the intermediate data is based on data based on a trapezoid set, a band ID indicating which band belongs, a type of image, character, graphic, etc., a drawing attribute, a circumscribed rectangle for the trapezoid set, a group ID capable of parallel processing. , And a hardware configuration ID. Then, the intermediate data storage unit 33 sends out the intermediate data in response to a request from the development processing unit 4. On the other hand, the expansion processing unit 4
Then, according to the hardware configuration ID added to the intermediate data input from the conversion processing unit 3, the configuration data is input from the configuration data management unit 42 as necessary, and the reconfigurable configuration is controlled by the reconfiguration control unit 41. The function of the unit 40 is rewritten. Further, the expansion processing section 4 receives the intermediate data and performs the expansion processing until the band buffer memory is filled with the print data recorded first by the output section 5. When the cycle of the output unit 5 is completed or the output preparation is completed, the print data is transferred line by line from the band buffer memory to the output unit 5 in accordance with the recording speed of the output unit 5.
Printing is performed. While the print data of one band buffer memory is being printed, the expansion processing is executed until one band buffer memory is filled with the print data. The expansion into print data by the expansion processing unit 4 and the printing by the output unit 6 are performed until print data for one page is processed.
It is repeated for each color or for four colors simultaneously. Further, when the print data includes a plurality of pages, the process is repeated until the output of all pages is completed. The outline of the print processing apparatus of the present invention has been described above. Next, details of a main part of the print processing apparatus will be described. First, details of the intermediate data generation unit 31, the intermediate data order control unit 32, and the intermediate data storage unit 33 will be described. As shown in FIG. 3, the intermediate data generation unit 31
An instruction execution unit 311, an image processing unit 312, a drawing state storage unit 313, a vector data generation unit 314, a font management unit 315, a matrix conversion unit 316,
Short vector generation unit 317 and trapezoid data generation unit 3
18 and a band disassembly management unit 319.
The token interpreter 310 interprets the token input from the lexical analyzer 30, converts the token into an internal instruction, and converts the internal instruction into an instruction.
Send to 11. The instruction execution unit 311 includes the token interpretation unit 31
In response to the command sent from 0, the image data is transferred to the image processing unit 312, the drawing state storage unit 313, and the vector data generation unit 314. The image processing unit 312 performs various image processing based on the input image header and image data to generate an output image header and output image data, and generates a trapezoidal data management unit 32.
Transfer to 0. The drawing state storage unit 313 stores the instruction execution unit 3
Information necessary for drawing given by the eleventh instruction is stored. The vector data generation unit 314 includes the instruction execution unit 31
1 and information added thereto, the drawing state storage unit 31
The vector data to be drawn is generated using the information from the font management unit 3 and the information from the font management unit 315, and is transferred to the matrix conversion unit 316. The font management unit 315 manages and stores outline data of various fonts, and provides outline data of characters in response to a request. The matrix conversion unit 316 performs affine transformation on the vector data input from the vector data generation unit 314 using the conversion matrix of the drawing state storage unit 313, and transfers the vector data to the short vector generation unit 317. The short vector generation unit 317 approximates the vector for the curve in the input vector with a plurality of linear vector sets (short vectors) and sends the vector to the trapezoid data generation unit 318. The trapezoid data generation unit 318 generates trapezoid data to be drawn from the input short vector, and transfers it to the band decomposition unit 319. The band disassembly management unit 319 divides the trapezoidal data over a plurality of bands from the input trapezoidal data into trapezoidal data of each band, and further determines to which band the trapezoidal data divided in band units belongs. , A circumscribed rectangle for a trapezoidal data set divided in band units, data management information and color information input from the drawing state storage unit 313 or an image processing unit 312
Then, the image data input from the server and the expansion processing ID, which is expansion processing information, are added to the image data and sent to the intermediate data order control unit 32. In the intermediate data order control unit 32, for each band,
The order is rearranged based on the overlap of the intermediate data, divided into groups that can be processed in parallel, and a hardware configuration ID and a group ID are added. The intermediate data storage unit 33 stores the intermediate data output by the intermediate data order control unit 32 for one page in band units. The processing from the token interpreting unit 310 to the intermediate data generating unit 31 described above is repeatedly performed each time a drawing command is input. The processing from the intermediate data order control unit 32 to the intermediate data storage unit is performed in band units or page units depending on the case. The transfer of the intermediate data from the intermediate data storage unit 33 to the expansion processing unit 4 is performed after the intermediate data for one page is stored. Hereinafter, the operation of each unit of the intermediate data generation unit 31, the intermediate data order control unit 32, and the intermediate data storage unit 33 will be described in more detail while showing the actual data structure. The token interpreter 310 interprets the token input from the lexical analyzer 30, converts the token into an internal instruction and its arguments, and transfers a set of the internal instruction and the argument to the instruction executing unit 311. For example, the internal commands include a drawing command for executing drawing of characters / graphics / images, and a drawing state command for setting information required for drawing such as color and line attribute. The instruction execution unit 311 executes the internal instruction sent from the token interpretation unit 310. The commands executed here mainly include a drawing command and a drawing state command. For example, drawing commands include
As shown in Table 1, there are three types of drawing commands, and information necessary for each drawing is shown. Among them, information having an underline is given as an argument in a drawing command, and other information is stored in the drawing state storage unit 313 in advance by initial setting or a preceding command. To execute the drawing command, the received drawing command other than the image drawing is transferred to the vector data generating unit 314 as it is. In the case of image drawing, the received drawing command is transferred to the image processing unit 312, and the vertical and horizontal sizes of the image header are transferred to the vector data generating unit 314. For the drawing state command, the command is transferred to the drawing state storage unit 313.
The image processing unit 312 receives the input image header and the input image data, which are the arguments of the command input from the command execution unit 311, and compresses the image if a compressed image is input based on the compression ID added to the header. And affine transformation is performed using the transformation matrix acquired from the drawing state storage unit 313. Further, in some cases, the processed image is compressed, an output image header and output image data are generated, and transferred to the band decomposition management unit 319. For this compression, it is usual to use a compression method that originally compressed image data on the PDL side, but this need not be the case. For example,
If the PDL has been compressed by DCT (Discrete Cosine Transform), it may be compressed by DCT or LZW (Lempel-Ziv &
(Welch) method, or may not be performed. In the affine transformation to be performed, affine transformation may be intentionally performed for a resolution smaller than the resolution of the output device in order to reduce the amount of memory of the intermediate data buffer. The drawing state storage unit 313 sets, for example, values of information without underline shown in Table 1 with the values of the arguments included in the command received from the command execution unit 311 and stores them. Further, an image processing unit 312, a vector data generation unit 314, a matrix conversion unit 316,
Short vector generation unit 317, band decomposition management unit 32
The values are transferred according to a request such as 0.

[Table 1] The vector data generation unit 314 uses the command and argument sent from the command execution unit 311 and the value of the drawing state storage unit 313 to generate vector data for new drawing except for the solid drawing. First, the case of character drawing will be described. The character code given by the argument and the font ID obtained from the drawing state storage unit are transferred to the font management unit, and character outline data is obtained. Since the acquired outline data does not include information on the drawing origin (current point), the drawing state storage unit 3
The target vector data is generated by adding the offset of the current point acquired from 13 to the outline data. In the case of image drawing, a rectangular vector corresponding to the image header given by the argument is generated from the vertical and horizontal sizes of the image header, and the offset of the current point obtained from the drawing state storage unit 313 is added to obtain the target vector data. Generate. In the case of stroke drawing, an outline vector of a line having a thickness as shown in FIG. 4 is generated from the vector given as an argument and various line attributes acquired from the drawing state storage unit 313. The vector generated in this manner (in the case of a solid drawing, the instruction execution unit 3
11) is transferred to the matrix conversion unit 316. The font management unit 315 stores outline vector data for various fonts, and provides outline vector data for the characters based on a given character code and font ID. The matrix conversion unit 316 affine-transforms the vector data received from the vector data generation unit 314 using the conversion matrix acquired from the drawing state storage unit 313. The main purpose of this affine transformation is
This is for converting the resolution (coordinate system) of the application to the resolution (coordinate system) of the printer. A 3 × 3 matrix as shown in the following equation (1) is used for the conversion matrix. The input vector data (Xn, Yn) is converted into output vector data (Xn ′, Yn ′) and sent to the short vector generation unit 317. Sent.

(Equation 1) The short vector generation unit 317 converts the vector of the curve when the input vector includes the vector of the curve such that the error is smaller than the flatness value acquired from the drawing state storage unit 313. Perform the approximation process using the short vector. For example, a Bezier curve represented by four control points shown in FIG. 5 is used as a curve vector. In this case, the short vector processing recursively divides the Bezier curve as shown in FIG. 5, and ends the division when the height (distance d) becomes smaller than the value given by flatness. Then, the start point and the end point of each of the divided Bezier curves are connected in order, thereby completing the short vectorization. The generated short vector is sent to the trapezoid data generator 318. The trapezoid data generation unit 318 generates a set of trapezoid data (in some cases, a triangle but the data structure is the same as the trapezoid) indicating the drawing area from the input vector data. For example, a polygonal vector indicated by a thick line shown in FIG. 6A has a drawing area indicated by four trapezoids. Note that this trapezoid is a trapezoid having two sides parallel to the scan line of the output device, and one trapezoid is (s) as shown in FIG.
x, sy, x0, x1, x2, h). The generated trapezoid is stored in the band decomposition management unit 319.
Sent to The band decomposition management unit 319 divides trapezoidal data that spans a plurality of bands from the input trapezoidal data into trapezoidal data for each band. For example, in FIG. 7, four trapezoidal data are divided into six trapezoidal data by the band decomposition unit. Further, additional information is added to the trapezoid data decomposed for each band to generate intermediate data. Additional information
Management information for managing the intermediate data;
Are the development process IDs representing the contents to be processed in, and color information indicating in what color the trapezoid data is painted. The management information for the character / graphic drawing command is a band ID for indicating to which band the object belongs, an object ID, the type of the object, the data of the number of trapezoids, and a circumscribed rectangle for the trapezoid data set. The object ID is an identification number assigned to one drawing command, and the type of the object is identification data for a drawing target such as a character / graphic / image. The development processing ID is an ID indicating the processing in the development processing unit 4, and the color information is, for example, CMY.
The value of B _K is These pieces of additional information are added before the trapezoidal data for each band generated by the drawing command, as shown in FIG. Thus, the object is
It consists of a plurality of trapezoidal data to which a set of drawing attributes is attached. The intermediate data is a set of data for such an object. The management information for the image drawing command is the same as the character / graphic, but the color information is the image header and image data. Further, as shown in FIG. 8B, one image header and one image data are added to each of the trapezoidal data for each band generated by the drawing command. The image header and the image data are stored in the image processing unit 312.
However, the image data added as the intermediate data may be image data corresponding to a minimum rectangle of a vector indicating a converted image as shown in FIG. 9 or an image corresponding to a minimum rectangle of each trapezoid. It may be data. Further, since the image data has a large capacity, it may be stored in a compressed form. The image header includes the type of the color conversion process and the type of the compression method, in addition to the parameter indicating the size of the image. Finally, the expansion processing ID will be described. The expansion processing ID is code information corresponding to the processing executed by the expansion processing unit 4, and has a meaning as shown in Table 2. These are stored in the intermediate data order control unit 32 in the intermediate data order control unit 32 in accordance with the actual configuration of the reconfigurable expansion unit 40 and the size of the reconfigurable hardware 40 in accordance with the scale of the reconfigurable hardware and the processing contents executed in parallel.
It is converted to a configuration ID corresponding to one-to-one.

[Table 2] The intermediate data order control unit 32 inputs the intermediate data output from the intermediate data generation unit 31 by a certain unit, performs overlap determination between them, performs rearrangement based on the result, and performs intermediate data storage. 33. At this time, for each set of intermediate data objects that can be processed in parallel based on the rearrangement, information indicating a boundary with another set,
A hardware configuration ID which is an identifier for the configuration data written to the reconfigurable expansion unit 40 of the expansion processing unit 4 is added. FIG. 10 shows an output data format in the intermediate data order control unit 32. In FIG. 10, the data structure of the intermediate data output by the intermediate data order control unit 32 is organized for each object that can be processed in parallel. The data of each set includes a band ID, a hardware configuration ID, the number of objects, and data of objects belonging to the set. FIG. 11 shows the configuration of the intermediate data order control unit 32. In FIG. 11, reference numeral 321 denotes an object buffer; 322, a drawing order dependency detection unit; 323, an optimization table creation unit; 324, a configuration data selection unit;
Is a reorder section. The intermediate data order control unit 32 is a block that detects the drawing order dependency of a plurality of input objects, divides the objects into a group that can be expanded in parallel, and orders the expansion processing among them. . What is the rendering order dependency of an object?
If there is an overlap between the objects, the lexical interpretation unit 30 interprets the print data input and the intermediate data generation unit 31 generates the drawing object, that is, in the order of the object IDs attached to the intermediate data, from the back to the top. It is a property that must be drawn. In this way, a model that overwrites a later interpreted object on a previously interpreted object is called an opaque model.
e) Call the model. For example, in FIG. 12, 900 is a page area, and 901, 902, 903, and 904 are individual drawing objects. Object 901
And the object 902 overlap, and the latter must be drawn in front of the former. This is because the object 901 is interpreted temporally earlier than the object 902. On the other hand, object 903
Overlaps the object 904, and for the same reason the latter must be drawn in front of the former. The object buffer 321 receives and stores a plurality of object data. The unit in which the object data is input and stored may be a plurality of drawing objects, or may be a larger unit such as a band or a page. Drawing order dependency detection unit 32
2 inputs the ID of each object having the same band ID stored in the object buffer 321 and the coordinate value of the circumscribed rectangle, and detects the drawing order dependency between the objects. This process will be described in detail with reference to FIG. In FIG. 12, 901 and 904 are graphic objects, and 902 and 903 are image objects. Object 902 overlaps object 901 and object 904 is object 903
On top of. Grouping is performed by checking whether the area represented by the circumscribed rectangle attached to each object overlaps. The method of checking the overlap is 2
This is performed for any combination of two objects, with the overlap detection of the circumscribed rectangle of one object being the minimum unit. The detection of the overlap of the circumscribed rectangles of the two objects is performed as follows. Each of the coordinate points (P1, P2, P3, P4) representing the circumscribed rectangular area of one object is defined as the circumscribed rectangular area P5-P of another object.
It is checked whether it is inside or on the boundary of 6-P7-P8. If at least one point among P1, P2, P3 and P4 is inside or on the boundary of the rectangular area P5-P6-P7-P8, the two objects have an overlap, otherwise the two objects have No overlap. Therefore, in the case of FIG. 12, (901, 902),
There are two groups (903, 904). This means that drawing of the object 901 must be performed before drawing of the object 902, and drawing of the object 903 must be performed before drawing of the object 904. Also, a group (901, 902) and a group (903, 90)
4) indicates that development can be performed in parallel. The drawing order dependency detection unit 322 adds the ID of each object to
A group ID and a number indicating the drawing order are attached and output.
In the case of FIG. 12, data (901, 1, 1), (90
2,1,2), (903,2,1), (904,2,2)
2) is output. Here, the numbers consisting of three sets of each data are the object ID and the group I, respectively.
D represents the drawing order. Depending on the case, the size of the object buffer may be a unit of a plurality of objects belonging to a certain band, or may be the entire band buffer or the entire page. The grouping and selection of objects that can be processed in parallel are performed in band units or page units. The optimization table creation unit 323
A table as shown in FIG. 13 is created based on the object ID, group ID, and drawing order input from the drawing order dependency detection unit 322, and the configuration data selection unit 324
Output to In FIG. 13, the group ID is a group ID grouped by the drawing order dependency detection unit. In the column of object ID, the ID of the object to be drawn first in each group, that is, the object whose input drawing order is 1 is written. The expansion processing ID corresponding to each object is input from the object buffer 321 and written in the expansion processing ID column. In the example of FIG. 13, the processing ID for the object 901 is Code A, and the processing ID for the object 903 is Code G. In the column of circumscribed rectangle area, the coordinates of the circumscribed rectangle corresponding to each object are input from the object buffer 321 and the area is calculated and written. The configuration data selection unit 324 selects the configuration of the reconfigurable expansion unit 40 that is most suitable for a plurality of parallel-processable objects output by the optimization table creation unit 323. The configuration data selection unit 324 uses the table output from the optimization table creation unit 323 and executes the reconfigurable expansion unit 40 according to the flowchart shown in FIG.
Select the configuration data of The processing executed by the configuration data selection unit 324 includes four steps from S1 to S4. In S1, a development process ID of a plurality of objects to be processed in parallel from the input table is input. next,
In S2, a candidate for a parallel combination of expansion processing hardware that is allowed in the entire reconfigurable hardware resources is selected. This is performed by selecting a combination that satisfies the following equation based on the scale of the processing circuit obtained from the expansion processing ID of the object processed in parallel.

EQUATION 2 SIZE ≧ XN × SIZE (X) + YN × SI
ZE (Y) +. . . + ZN × SIZE (Z) where SIZE is the size of the entire reconfigurable hardware circuit in the reconfigurable expansion unit 40, SIZE (X), SIZE
(Y) and SIZE (Z) are the circuit scales of the circuits X, Y and Z corresponding to the respective development processing IDs, and XN, YX and ZN are the circuits X and
This is the degree of parallelism between Y and Z. As represented by this formula, the configuration data selection unit 324 selects a configuration data of a circuit configuration having a plurality of identical functions or a configuration of a circuit configuration having a plurality of different functions, and performs a parallel processing. Is provided. In addition, a mechanism is provided for selecting a circuit configuration having a plurality of different functions and performing a pipeline-like operation of exchanging input / output data in a pipeline between them. For example, a candidate having a configuration as shown in FIG. 15 is selected corresponding to the table of FIG. In FIG. 15, a candidate whose hardware configuration ID is X has a degree of parallelism of 3 as a hardware resource for the object 901 and a degree of parallelism of 2 as a hardware resource for the object 903. The candidate whose hardware configuration ID is Y has a parallelism of 4 as a hardware resource for the object 901 and a parallelism of 1 as a hardware resource for the object 903. Next, in S3, the development end time for each hardware configuration candidate calculated from the data amount of each object is calculated. Here, the expansion end time is a time until all the expansion processing of the objects that can be processed in parallel is completed. The expansion processing time To for each object is

## EQU3 ## Calculated as To = DSIZE × Td ÷ PAR. Here, DSIZE is the object to be processed.
The data amount of the data, Td is the unit data by one processing circuit
The time required to process a quantity, PAR, is the degree of parallelism.
FIG. 1 shows an approximate value of the data amount of the object to be processed.
The area of the circumscribed rectangle of the table No. 3 is used. In the example of FIG.
Indicates that the processing time is a candidate whose hardware configuration ID is X.
20 ms, and the hardware configuration ID is X
For a candidate, it is 30 ms. In S4,
Even the candidates with the shortest deployment time are
And select. In the example of FIG. 15, the hardware configuration ID
Is selected as the final configuration. Reorder
The unit 325 stores the finally selected hardware configuration ID and
FIG. 10 shows the data of the objects to be processed in parallel.
Is converted to the described data structure and stored in the intermediate data storage unit 33.
Output. The object data is the object ID
Is output to the object buffer 321 and the object
Object data to object buffer 321
Input from The configuration data selection unit 324 performs parallel processing.
Objects that are not selected as manageable objects
Object remains in the object buffer 321,
Object in new object buffer 321
Process described above is repeated for the combination of
And the data structure of the intermediate data shown in FIG. 10 is output.
It is. The data output by the intermediate data order control unit 32 is
Sent to the intermediate data storage unit 33,
Interprets the band ID and stores it for each band
You. The lexical analyzer 30 interprets the output command of the page.
Then, EOP (End Of Page) is the intermediate data.
Via the data generator 31 and the intermediate data order controller 32
Is sent to the intermediate data storage unit 33,
The final data of each band stored in the EOD (EOD (E
nd Of Data) is added, and the
Clarify the end of the data. This EOP is a processing unit
4 to start the processing of the expansion processing unit 4. next,
The expansion processing unit 4 will be described in detail. FIG.
FIG. 2 shows a block diagram of a configurable deployment unit 40. In the conversion processing unit 3
The generated intermediate data for each band uses the intermediate data transfer system.
It is read by the control unit 43 and the input buffer of the memory unit 410 is read.
Write to file A420 or input buffer B421
It is. The reconfiguration hardware unit 46 includes an input buffer A4
20 or read intermediate data from input buffer B421.
And expand the band buffer A422 or buffer.
Rendering is performed on the command buffer B423. Print data transfer control
The unit 44 stores the band buffer A422 or the buffer
Read print data developed from the command buffer B 423
And converts this to serial for each read word,
Output to the output unit 5 in synchronization with the serial output clock signal
You. The refresh controller 44 includes an input buffer A42
0, input buffer B421, band buffer A422,
A menu consisting of a band buffer B 423 and a work area 424
The refresh of the memory unit 42 is controlled. Arbitrage
The operation unit 45 includes a refresh control unit 47 and an intermediate data transfer unit.
Transmission control unit 43, print data transfer control unit 44,
The hardware unit 46 and the reconfiguration control unit 41
When accessing the section 410, the
Arbitration according to the priority of the assigned access
Control the operation. Input buffer and band buffer
How to use the key will be described. FIG. 17 (a) and FIG.
7 (b) are input buffer A and input buffer B, respectively.
Shows the use status of each buffer while inputting intermediate data to
Things. In FIG. 17A, it corresponds to band i.
Inputting intermediate data to the input buffer A,
Buffer B already has intermediate data corresponding to band (i-1).
Data has been entered. The reconfiguration hardware unit 46 is
The intermediate data stored in the output buffer B is read and
These are developed and drawn on the band buffer B. Bamba
Buffer A contains intermediate data corresponding to band (i-2).
The print data of the result of expanding and drawing is stored.
The character data transfer control unit 44 reads this to the output unit 5 and
I have. In FIG. 17 (b), the band (i + 1)
The corresponding intermediate data is being input to input buffer B,
The intermediate data corresponding to band i has already been stored in force buffer A.
It has been entered. The reconfiguration hardware unit 46 has an input buffer.
Reads the intermediate data stored in buffer A and displays it
Open and draw in band buffer A. Band buffer B
Expands the intermediate data corresponding to band (i-1)
Print data as a result of drawing is stored
The transfer control unit 44 reads this out to the output unit 5. Wa
The work area 424 is input by the expansion processing unit 4 from the conversion processing unit 3.
When expanding the intermediate data
Used as a typical work area. Reconfigurable deployment unit 40
Is the intermediate data output by the conversion processing unit 3 shown in FIG.
The procedure for deployment will be described. The configuration control unit 41
Hardware configuration ID and object ID
And reconstructed according to the flowchart shown in FIG.
The hardware section 46 is controlled. Performed by the configuration control unit 41
The process includes seven steps from S11 to S17. Ma
In step S11, the object to be processed next is
Enter the hardware configuration ID. Next, in S12,
Whether the configuration ID to be managed is the same as the configuration ID just processed
Check. If they are the same, rebuild the configuration data
Since it is not necessary to newly write the data in the hardware section 46,
jump. If not, the hardware configuration in S13
The configuration data is sent from the configuration data management unit 42 based on the ID.
And read the configuration data read in S14 again.
Write to the configuration hardware unit 46. In S15,
An object I to be processed is
D and sends a start signal to signal the start of the process.
You. In S16, the processing in the reconfiguration hardware unit 46 is performed.
Wait until the process is over. In S17, the currently processed
Whether there are more objects in the command to process.
Find out. If there is, the process returns to S1; otherwise, the process ends. FIG.
9 shows the configuration of the configuration data management unit 42. Conversion table
415, a hardware configuration ID is input and the configuration code is input.
The start address and data length of the storage area 411 are output.
It is a table. The configuration code storage area 411 stores the actual
Configuration data for the hardware configuration ID is stored
In the area, each entry is of variable length. 412 is a control unit
The read control unit 413 and the addition / update unit 414
You. The read control unit 413 reads from the reconstruction control unit 41.
Input the output signal and hardware configuration ID, and
Output the hardware configuration ID to the
Address of the configuration data in the configuration code storage area 411
Input data and data length. Next, the read control unit 413
Outputs the input address to the configuration code storage area 411.
Corresponding to the hardware configuration ID for the data length
Read configuration data from configuration code storage area 411
And outputs the result to the reconstruction control unit 41. Add / update unit 414
Is sent via a host computer (not shown)
Control unit to add and update configuration data
Table 415 entries and configuration code storage area 411
Add, delete, or update configuration data
I do. The configuration code storage area 411 stores a single function.
Configuration data corresponding to various circuit configurations
Configuration data corresponding to a parallel circuit configuration with multiple functions
Data, parallel circuit configuration with multiple different functions
Pipeline with multiple configuration functions and different functions
Configuration data corresponding to a typical circuit configuration. Next
The specific configuration of the reconfiguration hardware unit 46 and the processing
The contents will be described with an example. Reconfigurable hardware part
Reference numeral 46 denotes configuration data managed and stored by the configuration data management unit 42.
By writing the data under the control of the reconstruction control unit 41.
This is a processing block whose function can be changed. Scripture
Formally, the reconfiguration hardware unit 46 includes a field
Structured by a programmable gate array (FPGA)
Can be achieved. As an FPGA, for example, US Xilinx
FPGA or equivalent components can be adopted
Wear. FIG. 20 shows a reconfigurable hardware configured using an FPGA.
Hardware 46 is shown. In FIG. 20, the reconstruction hardware
The firmware 46 includes a control unit 461, an FPGA unit 462, and
And a register group 463. Register group 4
Reference numeral 63 denotes a configuration data sent from the configuration data management unit 42.
Data. FPGA unit 462 machine
The function depends on the configuration data held in the register group 462.
Is determined. The control unit 461 controls the register group 463
Data input / output and operation timing of the FPGA unit 462
This is for controlling the ringing and the like. FPGA unit 462
Is a plurality of logical blocks 462, as shown in FIG.
1, a plurality of cross point switches 4622 and a plurality of
The switch matrix 4623 is included. Argument
Processing block 4621 looks up as shown in FIG.
Table 4621A, selector 4621B and flip
It is configured to include a flop 4621C. Look up
Table 4621A contains the desired truth table.
You. The truth table and the lookup table 4621A
Input signal of the selector and the selector 4621B is a register group
463, ie, part of the configuration data
Is determined. Also, the cross point switch 46
22 and the switch matrix 4623 are respectively shown in FIG.
3 and FIG. 24. Reassembly
The functional block diagram showing the function of the configuration hardware unit 46 is as follows.
Since it is variable depending on the configuration data to be written, FIG.
In 6, the hardware configuration ID X is selected.
Of the reconfiguration hardware unit 46 using an example of
And the operation will be described. At this time, the reconfiguration hardware
46 has a configuration as shown in FIG. In FIG. 25, 4
60, 460-1, and 460-2 have the expansion processing ID of Cod.
Processing circuits corresponding to eA, 470, 470-1, 470
-2, 470-3 corresponds to Code G with expansion processing ID
Processing circuit. The internal configuration of the processing circuit 460 is
It consists of a shape drawing circuit 461 and a screen processing circuit 462.
You. The internal configuration of the processing circuit 470 is the
1. Resolution conversion circuit 472, color conversion circuit 473, trapezoidal drawing
It comprises an image circuit 474 and a screen processing circuit 475. place
Processing circuit 460-1, processing circuit 460-2, processing circuit 48
0-1, processing circuit 480-2, and processing circuit 480-3
As shown in the circuit configuration of FIG.
Circuit configuration with multiple identical functions or multiple different functions
Parallel processing can be performed by a plurality of circuit configurations. In addition,
Multiple different functions, such as the internal configuration of the
Transfer input / output data between functions in a pipeline
Pipeline-like operation is also possible. Expansion processing ID is C
The processing circuit 460 corresponding to the mode A and the expansion processing ID are
Further details of the processing circuit 470 corresponding to Code G
The configuration and operation will be described. 〓 (i) Processing circuit whose expansion processing ID corresponds to Code A The processing circuit 460 generates
Process intermediate data. The trapezoidal drawing circuit 461
Trapezoidal data (sx, sy, x
0, x1, x2, h) by four points as shown in FIG.
Is converted to a data format consisting of and a trapezoidal area is drawn. Figure
FIG. 27 shows a functional block diagram of the trapezoidal drawing circuit 461.
The intermediate data input unit 463 is one by one from the input buffer.
Is read, and a coordinate calculation unit A464 is read.
And the trapezoid data is output to the coordinate calculation unit B465. seat
The marker calculation unit A464 is provided with a trapezoidal left edge (d in FIG. 26).
(P0, P1), and coordinates on the edge
The values are output in order from P0 to P1. Coordinate calculator
B465 is the right edge of the trapezoid (edge P2 in FIG. 26).
P3) is responsible for the coordinate calculation, and the coordinate value on the edge is P2
To P3. Edge drawing unit 466
Are input from the coordinate calculation unit A464 and the coordinate calculation unit B465.
Draws a straight line parallel to the trapezoidal x-axis based on the coordinate values input
I do. FIG. 28 shows a functional block diagram of the coordinate calculation unit.
Input trapezoidal data (sx, sy, x0, x1, x
(2, h) is a trapezoid of 4 points in the DDA parameter calculator 467
It is converted to data (P0, P1, P2, P3) and the slope
Calculate DDA parameters such as initial value of residual and
Output to the DA processing unit 468. The DDA processing unit 468
Performs DDA processing based on the input parameters,
The moving direction and the moving amount with respect to the point obtained later are output. seat
The target updating unit 469 determines the current moving direction and moving amount based on the input moving direction and moving amount.
Updates the stored coordinate values and outputs them. Initial coordinates
The value is set by the intermediate data input unit 463. Figure
29 is a block diagram of the edge drawing unit 466. Edge
The drawing unit 466 inputs the coordinate values A / B and color information and
Fill the interior area of the trapezoid. Address calculator 470
Input the coordinate values A / B, and
Calculate the dress. The mask calculator 471 calculates the coordinate value A /
Enter the value of B and enter the valid bits in the word to draw
Outputs the mask to represent. The data operation unit 472 has a fixed
Color data that represents a unique color and expand this value into words
Output to the screen processing circuit and screen processed.
The result is output to RmodW section 473. RmodW part 4
73 uses the input address, mask, and data
Drawing is performed by performing the following processing. First, the ad
To read the band buffer. This
Source data read, mask data M
If Ask and the drawing data are Data, (Mask *
Data + Mask # * Source)
Write back to the same address. However, * is logical product, + is theory
Riwa and # represent logical negation, respectively. This process is
This is repeated for each word containing the edge to be processed. Ma
The screen processing circuit 462 performs final gamma correction and
This is a process for performing halftone and outputs a figure.
If the optimized screen pattern is set
You. If the deployment processing ID is Code B, the screen
Process to perform the final gamma correction and halftone
Script that is optimized for character output.
Pattern is set. 〓 (ii) The number of times the processing ID corresponds to Code G
The path processing circuit 480 determines that the intermediate data has different colors for each pixel.
Enter the image and enter various as shown in Code G in Table 2.
Perform image processing. Image processing is a combination of processing,
(Decompression processing, resolution conversion, color space conversion, trapezoid processing, screen
The processing circuit in the case of (lean) will be described. 〓 (Expansion processing circuit 481) Image which is input intermediate data
If the image is compressed and requires decompression,
The extension processing circuit 481 converts the intermediate data into an algorithm such as JPEG.
The extension process is performed by the mechanism. FIG. 30 shows a decompression processing circuit 48.
1 is a functional block diagram. Intermediate data input section 481-
1 is the image data compressed from the currently input buffer.
Input intermediate data. Huffman decoding unit 48
1-2 is based on a built-in Huffman decoding table.
To decode the compressed data. Inverse quantization section 481-3
Is the data input from the Huffman decoding unit 481-2
Is inversely quantized based on the built-in quantization table.
And output. The inverse DCT unit 481-4 is connected to the inverse quantization unit 4
Data input from 81-3 is calculated by the inverse DCT
To convert and output. The writing unit 481-5 is an inverse DC
The image data decoded by the T unit is stored in the work area 42.
Write to 4. (Resolution conversion circuit 482) FIG.
82 shows a functional block diagram of FIG. Pixel data input unit 482
-1 is the work area 42 in which the result of the decompression processing is written
4 to read pixel data. Pixel reading is resolution
Calculation is currently performed by the inverse conversion of the degree conversion equation (1).
Only the input pixels necessary for the interpolation of the target pixel are read. Interpolation processing
The conversion unit 482-2 converts the input pixel data after conversion.
Is interpolated for each color component. Supplement
The complete algorithm is performed by a linear interpolation method. Pixel address
The calculation unit 482-3 calculates the coordinates of the pixel currently being calculated.
The write address of the work area 424 is calculated. Writing
In the embedding section, a new
Write the value of the pixel. Input image on the work area 424
And the area to which the output image is assigned are different areas.
You. 〓 (Color space conversion circuit 483) FIG.
FIG. 83 shows a functional block diagram of a third embodiment. Color space conversion is RGB sky
Conversion of the input image between to CMYK space which is the print color
Now. The pixel data input unit 483-1 performs affine transformation.
The pixel data on the work area 424 that stores the
Input for each pixel. The table conversion unit 483-2 uses RG
Input B image data and convert image data of each color of CYMK
Output. In this embodiment, the CMYK colors are processed for each color.
Thus, only one color conversion table is required at a time. 4 colors
If you want to process at the same time, include the conversion table for 4 colors.
To store. The conversion table is stored in the table conversion unit 452.
Built-in, RGB each to reduce the capacity of the table
9 representative points per color as table addresses
In addition, the value of the conversion by the more detailed address
This is performed by the processing unit 483-3. In the interpolation processing unit 483-3
Are six representative points surrounding one point in the RGB color space to be converted
Calculates detailed conversion values by three-dimensional linear interpolation
You. FIG. 33 shows this process. Converted
For a point P in the RGB space, a table conversion unit 483-
6 points (a,
b, c, d, e, f) converted values into a lookup table
And linear interpolation is performed based on this. Writing unit 4
83-4 is the same input by the pixel data input unit 483-1
Overwrite the address with the conversion result. 〓 (Trapezoid processing circuit 484) Draws image data in a trapezoid area
The configuration of the trapezoidal drawing circuit 484 for the
Function block for trapezoidal processing of characters and figures shown in Fig. 7
Is the same as The paste of the image to the trapezoid area is shown in FIG.
The result is as shown in FIG. At this time, the image in FIG.
Is different from the intermediate data input unit 463 in that
Image data is input from the work area 424, and edge drawing is performed.
The image data is output to the unit 466. Inside the trapezoid data
The interim data is input from the input buffer. Edge drawing unit 4
66 is the currently output bar, as in the case of characters and graphics.
Write the output image to the command buffer. 〓 (Screen processing circuit 485) The screen
The number of colors per color held and expressed by the printer
If the number of colors per color that can be
This is a process for converting to a color value of the number of colors that can be represented. This generation
Tabular processing is called halftone processing,
It has NxM threshold data called
Compare data and image data for each color
Is to determine a color value for each. For example, one color
Or 8 bits per color on a 1-bit printer
When processing image data that has been processed, NxM threshold data
Halftone matrix can have any value from 0 to 255
Is stored. And the actual image data values
Halftone matrix determined by the position of the image
If the image data is larger than the threshold data,
If it is, output the color value to print the pixel and
Otherwise, output a color value that does not print the pixel.
You. The above is the case where the object to be processed is image data.
, The combination of the processing whose deployment processing ID corresponds to CodeG
(Decompression processing, resolution conversion, color space conversion, trapezoidal processing,
And the configuration of the processing circuit 480 corresponding to the screen)
Is the content of the processing to be performed. The reconfiguration hardware unit 46
Entry and exit from memory through arbitration unit 45
And store the result in the band buffer. 〓 (Use of expansion processing unit as accelerator) This embodiment
Then, the intermediate data generation process is performed by the intermediate data generation unit 31.
It was explained that processing was performed, but this intermediate data generation processing
By changing the hardware configuration of the expansion processing unit 4.
It is also possible to cause the reconfigurable developing unit 40 to execute
You. This will be described with reference to FIG. For example, intermediate day
LZW compression input to the instruction execution unit 311 of the data generation unit
The image obtained is expanded by the conventional image processing unit 312 in LZW.
And perform matrix operation, compress with LZW
To the disassembly management unit 219. This process is called image processing.
Reconfigurable exhibition of the expansion processing unit 4 in place of the management unit 312
This is performed by the opening 40. like this
Of reconstructed data that performs complex processing together with the expansion processing ID
Registered in advance in the data management unit 41,
When an image to be processed is input to the unit 312, the image processing unit 3
12 interprets the contents of the processing and sends it to the reconfigurable developing unit 40.
The expansion processing ID and the input image data are sent. Reconfigurable deployment
In the unit 40, the configuration is determined based on the transmitted expansion process ID.
Acquires configuration data from the data management unit and performs internal reconfiguration
Reconfigure possible hardware. Then the image processing procedure
The input image data sent can be reconstructed according to
Created as a result of processing using hardware
The transmitted image data is sent back to the image processing unit 312. this
With such a configuration, the reconfigurable deployment unit 40 can be reconfigured.
Active resources can be used effectively. 〓 (Partial rewriting of reconfiguration hardware)
Reconfiguration hardware unit 46 performed by the reconfiguration control unit 41
Rewrite all hardware resources.
Had to be replaced, but reconfigured hardware
A method of partially rewriting the part 46 as necessary may be considered.
It is. Before rewriting the partial reconfiguration hardware unit 46
The control method of the proposed reconfiguration control unit 41 will be described.
You. In this case, when generating the data structure of FIG.
All the objects that can be processed into one collection,
No hardware configuration ID is required. Partial reconstruction hardware
When rewriting the hardware unit 43, the reconfiguration control unit 4
FIG. 35 shows a flowchart of the process performed by No. 1. FIG.
5 is an object in which the reconstruction control unit 41 can execute one parallel processing.
This is a control flow performed for a group of projects. Reassembly
The control flow performed by the configuration control unit 41 is from S18 to S25.
It consists of eight steps. First, in S18, then
Input the expansion processing ID of the object to be processed. S1
In step 9, the resources of the reconfiguration hardware unit 46 are entered.
Write the configuration data corresponding to the input deployment process ID
Find out if there is space available. If there is room, S2
The process jumps to 1, and if there is no free space, the process proceeds to S20. S20 smell
A part being processed by the reconfigurable hardware unit 46
Wait until the end of the routine. In S21, the configuration data
Check if the data needs to be partially rewritten. Reconfigurable
Processing that has been completed by the functional hardware unit 46 and the development processing of the next processing
If the physical ID is the same, there is no need for partial rewriting. Department
If there is no need for partial rewriting, the process jumps to S24. Partial book
If there is a need for replacement, the process proceeds to S22. . In S22
Corresponds to the expansion processing ID input from the configuration data management unit 42
Is read out in S23,
Partially writes the reconstructed configuration data to the reconfiguration hardware unit 46.
Get in. In S24, the reconfiguration hardware unit 46
After the partial writing is completed, processing can be started.
A synchronization signal is sent to notify the fact. S25 smell
Is a collection of objects that can be processed in parallel.
Check if there is still object data in the ball
You. If there is, the process returns to S18; otherwise, the process ends. Finished
Then, all objects in the reconfiguration hardware unit 46 are
Wait for the project deployment process to finish, and then
FIG. 35 shows a set of objects that can be processed in parallel.
Is repeated. [Embodiment 2] FIG. 36 shows the structure of Embodiment 2 according to the present invention.
FIG. In FIG. 36, the image processing device
A print data creation unit 1, a print data input unit 2,
A processing unit 3, a development processing unit 4, and an output unit 5.
I have. Further, the conversion processing unit 3 includes a lexical analysis unit 30
The inter-data generating unit 31, the intermediate data optimizing unit 34,
From the inter-data reconstruction unit 35 and the intermediate data storage unit 33
The expansion processing unit 4 includes a reconfigurable expansion unit 40,
Consists of a reconfiguration control unit 41 and a configuration data management unit 42
Have been. In the above configuration, the print data creation unit 1
The print data input unit 2, the expansion processing unit 4, and the output unit 5
Since the configuration is the same as that of the first embodiment,
Description is omitted. The conversion processing unit 3 is a print data input unit 2
Print from the input print data
Generates intermediate data that can be expanded to data.
Yes, the lexical analyzer 30, the intermediate data generator 31,
An inter-data optimization unit 34, an intermediate data reconstruction unit 35,
And an intermediate data storage unit 33. Lexical analysis
Unit 30, intermediate data generation unit 31, and intermediate data storage unit 3
3 is the same as that of the first embodiment,
Here, the description is omitted. The intermediate data optimization unit 34
In the order described in the page description language by the inter-data generator 31
No. generated intermediate data for each drawing command after band division
(Hereinafter also referred to as objects) for each band
Rearrange so that the intermediate data of the same drawing command follows
Do. This corresponds to the reconfigurable circuit in the expansion processing unit 4.
Reduces the number of reconfigurations required to perform high-speed processing.
That's because. The sorting process is performed for each drawing order for each band.
Compare the circumscribed rectangle of the intermediate data for each command to determine if there is any overlap
And if sorting is possible based on the result,
Rearrange so that the intermediate data of the same drawing command continues.
If it is not possible to sort,
Writing intermediate data to the interim data storage unit 33
It is. In this way, the drawing command depends on whether there is overlap
It is necessary to determine whether or not the order can be rearranged
Is an imaging model called opaque in PDL
Is used, multiple drawing is performed in the same place
Only the last drawn command is left as a result.
This is due to the feature that Intermediate data reconstruction unit 35
Are grouped by the intermediate data optimization unit 34 for each drawing type.
Depending on the status of the intermediate data
Judge whether to skip the process. Intermediate data optimization unit 34
If the intermediate data is compared with a preset threshold
Just by rearranging the optimization unit 34, the reconstruction
It is determined that the number of reconfigurations for
If rejected, skip the process, but not enough
Is determined from the intermediate data storage unit 33,
The intermediate data is read in units of band, and each intermediate data is read in units of band.
Process to remove overlap between data
Generate interim data. The intermediate data completely overlap
Because there is no intermediate data
Reconstruct, and again to the intermediate data storage unit 33 in band units
Write. This process is repeated for the number of bands. next
The print data in the print processing apparatus configured as described above
Organize the flow of data. Created by print data creation unit 1
The generated print data is sent via the print data input unit 2
It is input to the lexical analyzer 30 of the conversion processor 3. Lexical analysis
Token cut out from print data in unit 30
Is input to the intermediate data generation unit 31. Intermediate data raw
Intermediate divided in band units generated by the component 31
The data is input to the intermediate data optimization unit 34,
Rearrange the intermediate data so that the same drawing command follows
And written to the intermediate data storage unit 33 in band units.
You. From the intermediate data storage unit 33 as necessary, in band units
The intermediate data read out by the intermediate data reconstructing unit 35
The intermediate data that is input to the
The intermediate data storage unit 3 is reconstructed in
3 is written. Expansion processing unit 4 and output processing unit 5
Is the same as the configuration in the first embodiment,
However, the description is omitted. The outline of the image processing apparatus of the present invention has been described above.
The point was described. Next, the main part of this image processing device
Will be described in detail. Here, the first embodiment is mainly the same as the first embodiment.
Intermediate data optimizing unit 34 in the generation processing unit 3 having different configurations
The intermediate data reconstruction unit 35 will be described. beginning
Next, the details of the intermediate data optimization unit 34 will be described.
FIG. 37 shows the configuration of the intermediate data optimization unit 34. Intermediate de
The data optimization unit 34 includes a band number determination unit 326 and a
Number of segmented intermediate data optimization units 327 corresponding to the number of commands
It is composed of FIG. 37 shows that one page is divided into four bands.
And the four segmented intermediate data
The intermediate data optimization unit 34 is configured by the optimization unit 327.
Indicates that The band number determination unit 326 performs band decomposition
Included in the object transferred from the unit 319
The band ID is determined, and the category corresponding to the band ID is determined.
Transfer the object related to the intermediate data optimization unit 327
You. FIG. 38 shows the configuration of the segmented intermediate data optimization unit 327.
(For convenience, only the two-partition intermediate data optimization unit 327 is shown.
Shown). The segmented intermediate data optimization unit 327
H processing unit 3271, circumscribed rectangle overlap determination unit 3272,
Force buffer 3273 and circumscribed rectangle set storage unit 3274
Consists of The latch processing unit 3271 stores the band number
Object as intermediate data transferred from the determination unit 326
Hold The circumscribed rectangle overlap determination unit 3272
Of each object held by the
Determine the overlap of the circumscribed rectangles. Also, circumscribed rectangle overlap
The setting unit 3272 outputs an output buffer based on a procedure described later.
Add objects to output 3273 or output buffer
Flash the filer 3273. Output buffer 3273
In order to enable sequential processing, as shown in FIG.
So-called first-in first-out for each type, that is, for each deployment processing ID
It is composed of an output buffer group of the output type. Circumscribed rectangle
The shape set storage unit 3274 includes a circumscribed rectangle overlap determination unit 327.
Each object for which the overlap of the circumscribed rectangle was determined in 2
A set of circumscribed rectangle data of the
(Hereinafter, each object stored as this bitmap is
A set of circumscribed rectangle data of a project is called a circumscribed rectangle set.
And). The circumscribed rectangle set is the circumscribed rectangle overlap judgment
Used to determine the overlap of the circumscribed rectangle in the part 3272
You. When determining the overlap of circumscribed rectangles,
The circumscribed rectangle data whose overlap should be determined
It is referred to as a circumscribed rectangle to be inspected. In addition,
The object corresponding to the elephant circumscribed rectangle is
Project. The object to be inspected
Holds the expansion processing ID of the previously processed object
In order for the circumscribed rectangle overlap determination unit 3272 to
Provide a resistor. The circumscribed rectangle overlaps the circumscribed object
When the rectangle overlaps the circumscribed rectangle set (a) or the pair to be inspected
When the elephant circumscribed rectangle does not overlap the circumscribed rectangle set (b)
(See FIG. 40), the processing type of the object to be inspected and
Processed immediately before processing the object to be inspected
Object processing type, that is, expansion processing ID register
Depending on whether the processing type indicated by the
Therefore, as shown in FIG. 41, it is divided into four modes. Less than
Next, the intermediate data performed for each band using FIG.
Optimization procedure, that is, each section intermediate data optimization unit 32
On the procedure for trapezoidal data rearrangement in Fig. 7
I will tell. (1) Initialization of the circumscribed rectangle overlap determination unit 3272 and others (S
26). Expansion processing ID record of the circumscribed rectangle overlap determination unit 3272
Clear the Vista. The storage of the circumscribed rectangle set storage unit 3274
Clear the bitmap you have. Output buffer 327
3. The buffer for each expansion processing ID is cleared. (2) Object latch processing (S27). The latch processing unit 3271 outputs the data from the band number determination unit 326
Holds the transferred object for each band. This protection
The object held is the object to be inspected.
You. (3) Determining the identity of the processing type (S28). The circumscribed rectangle overlap determination unit 3272 includes a latch processing unit 327
The processing type of the object to be inspected held from 1 and
Determines the identity of the processing type of the object processed immediately before.
Set. That is, the expansion processing I of the object to be inspected
D and expansion processing I held in the expansion processing ID register
Determine the identity with D. If the processing types are the same,
The value of the expansion process ID register is
After updating with the development processing ID, the process proceeds to S30. on the other hand,
If the processing types are different, the value of the
Update with the expansion processing ID of the object to be inspected,
Move to the processing of 29. FIG. 43 illustrates the determination of the identity of the processing types.
Processing unit 3271 and circumscribed rectangular overlap determination unit 3
272 shows the state of the expansion processing ID register. For example,
The expansion processing ID is Code A in the latch processing unit 3271
Certain object 1, the development processing ID is Code A
Object 2 and the expansion processing ID are Code B
When a certain object 3 is sequentially held, the object
When the object 2 is the object to be inspected,
The value of the D register is Code A, and the processing type is the same
Is determined. Also, the object 3 is the object to be inspected.
Object, the value of the expansion process ID register is Co
de B, and it is determined that the processing types are different. What
The first object held by the latch processing unit 3271
When processing is performed on the
Since it is in the reset state, the expansion processing ID register
Is updated with the expansion processing ID of the object to be inspected.
Then, the process immediately proceeds to S30. (4) Judgment of overlapping circumscribed rectangles (S29). The circumscribed rectangle overlap determination unit 3272 outputs the circumscribed rectangle to be inspected.
And the circumscribed rectangle set held by the circumscribed rectangle set storage unit 3274
By calculating the logical product of
Set. If the circumscribed rectangle to be inspected overlaps the circumscribed rectangle set
If (a), the process proceeds to S31. On the other hand,
If the rectangle does not overlap the circumscribed rectangle set (b),
Move on to processing. (5) Object connection processing (S30). Bitmap data corresponding to the circumscribed rectangle to be inspected
The bitmap stored in the circumscribed rectangle set storage unit 3274
Performs a logical OR operation with the data and sets the circumscribed rectangle set based on the result.
The bitmap of the storage unit 3274 is updated. Inspection target
Object is used as the expansion processing ID of output buffer 3273
Add to the corresponding output buffer. Subsequently, the processing of S32
Let's make sense. For example, FIG.
4 shows the state of the bitmap update process in FIG. Examination
For the circumscribed rectangle to be inspected, the logical sum with the circumscribed rectangle set is calculated.
And the bitmap is updated with the result. In addition,
Following object 1, the object whose circumscribed rectangle does not overlap
39 is held in the latch processing unit 3271, FIG.
Object 2 is an object on a first-in first-out basis.
Connected to project 1. (6) Buffer flush processing (S31). Clear the bitmap of the circumscribed rectangle set storage unit 3274
You. Each expansion processing I of the output buffer 3273 in a predetermined order
Objects stored in the buffer for each D
To the data storage unit 33. Then, in the process of S13g
Move on. (7) Inspection of existence of object to be processed (S3
2). The latch processing unit 3271 outputs the data from the band number determination unit 326
The transferred object is the end of the object for each band.
By determining whether or not the EOD indicates that the
Check for objects to process. Should be processed
If the object exists, the process proceeds to S27. one
If there is no object to process,
Finish. Further, the expansion processing unit 4 has the same or different configuration.
Process data in parallel, i.e. multiple
If it is possible, the segmented intermediate data optimization unit 327
It can also be configured and operated as follows. First, FIG.
As shown in FIG. 5, the circumscribed rectangle set storage unit 3274 stores
The coordinates of the vertices of the circumscribed rectangle are stored in a list format.
Is done. Here, the circumscribed rectangle overlap determination unit 3272
Single or multiple distinction
The unit of processing for each number of objects is called a layer.
You. Objects in each layer do not overlap each other.
As shown in FIG. 46, the output buffer 3273
Keep numbered objects in a list
It is configured as follows. The data of the layer number is an object
Is transferred from the output buffer 3273 to the intermediate data storage 33.
Deleted when sent. Here, the circumscribed rectangle overlaps
The determination unit 3272 does not need a deployment processing ID register.
The circumscribed rectangle overlap determination unit 3272 holds the value of the total number of layers.
Number of layers to register register to hold the value of the layer number being processed
Current layer register and circumscribed rectangle set storage unit 32
List of circumscribed rectangle vertex coordinates for each layer held in 74
A circumscribed rectangle to hold the last data of the format data
It has a register. According to the procedure shown in FIG.
To optimize the arrangement of objects. (1) Initialization of the circumscribed rectangle overlap determination unit 3272 and others (S
33). The layer total number register of the circumscribed rectangle overlap determination unit 3272;
The value of the current layer register is set to 0. Bounding rectangular register
Circumscribed rectangle set storage unit 3274 and output buffer 3
Clear 273. (2) Object latch processing (S34). The latch processing unit 3271 outputs the data from the band number determination unit 326
Holds the transferred object for each band. This protection
The object held is the object to be inspected.
You. (3) Overlap determination of the circumscribed rectangle (S35). The circumscribed rectangle overlap determination unit 3272 includes a latch processing unit 327
The circumscribed rectangle of the object to be inspected held in 1
Overlaps with the circumscribed rectangle held in the circumscribed rectangle register.
Judge what it is. When the circumscribed rectangles overlap, the process of S36 is performed.
Move on to On the other hand, if the circumscribed rectangles do not overlap, the process of S37 is performed.
Let's make sense. FIG. 48 shows the state of the layers due to the overlapping of the circumscribed rectangles.
Show. For example, object 1, object 2, and
Object 3 is sequentially held in the latch processing unit 3271
, The circumscribed rectangle of object 1 and object 2
If the circumscribed rectangle does not overlap, the layers are the same. here
Means that object 1 and object 2 belong to the first layer
I do. Also, the circumscribed rectangle of object 2 and the object
When the circumscribed rectangle of object 3 overlaps, object 3
Project 2 belongs to a different layer. Here, the object
3 belongs to the second layer. (4) Object list addition processing (S36). Increment the value held by the total layer number register. Suffered
A circumscribed rectangle set storage unit for the circumscribed rectangle of the inspection object
Added as the last data of 3274 list data
The circumscribed rectangle data is used as the contents of the circumscribed rectangle register.
You. In addition, the object to be inspected is stored in the layer total register.
Is added as a layer number, and the output buffer 3
273 as the last data of the list data
You. FIG. 49 shows the output buffer of the object to be inspected.
The state before and after addition to the list data of 3273 is shown.
The layer count register is incremented from 1 to 2, and
Object 3 to be inspected is an object
2 to be added. At this time, the layer number 2
Attached to object 3. (5) Object list insertion processing (S37). FIG. 50 shows the following object list insertion processing (S3).
The detailed processing procedure of 7) is shown. (5.1) Initialization of the current layer register (S39). The value of the current layer register is set to 1. (5.2) Overlap determination of circumscribed rectangles (S40). The circumscribed rectangle overlap determination unit 3272 outputs the object to be inspected.
Circumscribed rectangle of the object and stored in the circumscribed rectangle set storage unit 3274
Layer number stored in the current layer register
Is determined to overlap with the circumscribed rectangle corresponding to. There is overlap
If so, the process proceeds to S41. On the other hand, if there is no overlap
In this case, the process proceeds to S42. (5.3) Increment of current layer register (S4
1) The circumscribed rectangle overlap determination unit 3272 outputs the current layer register
Is incremented, and the process proceeds to S40.
You. (5.4) Update the circumscribed rectangular vertex coordinates (S42). The circumscribed rectangle overlap determination unit 3272 outputs the object to be inspected.
The circumscribed rectangle set storage unit 3274
Held in the current layer register
Update the circumscribed rectangle vertex coordinates corresponding to the layer number. FIG.
Shows the state before and after updating the vertex coordinates of the circumscribed rectangle. For example,
Following object 1, the circumscribed rectangle of object 1
Is the object 2 whose circumscribed rectangle does not overlap
3271, the current layer register is 1
Yes, the circumscribed rectangle set storage unit 3274 holds the
The circumscribed rectangle vertex coordinates corresponding to one layer (the upper hatch in FIG. 51)
Rectangle) indicates the coordinates of the circumscribed rectangle of object 1.
When tasting, the circumscribed rectangle or object to be inspected
A circumscribed rectangle including the circumscribed rectangle 2 (solid rectangle in FIG. 51)
The shape (the dashed rectangle in FIG. 51) is calculated, and the calculation result is
The updated circumscribed rectangle corresponding to the first layer (see the lower part of FIG.
Circumscribed rectangle set storage unit 3274
To hold. (5.5) Object List Insertion Process (S43) The circumscribed rectangle overlap determination unit 3272 outputs the
Corresponding to the layer number held in the current layer register
Output buffer 32 as the last object of the layer
73 is added to the list. At this time, the object
Is assigned a layer number. FIG. 52 shows a list of objects.
The state before and after the insertion process is shown. Current layer register is 1
, The object 4 is an object whose layer number is 1.
Object 3 after object 2 and layer number 2
Inserted before. At this time, object 4 is a layer number
1 is added. (6) Inspection of existence of object to be processed (S3
8). The latch processing unit 3271 outputs the data from the band number determination unit 326
The transferred object is the end of the object for each band.
By determining whether or not the EOD indicates that the
Check for objects to process. Should be processed
If the object exists, the process proceeds to S34. one
If there is no object to process,
Finish. Note that the data is stored in the output buffer 3273 in a list format.
The objects held are intermediate in a predetermined order for each layer.
The data is transferred to the data storage unit 33 and processed in parallel. Finally
The details of the intermediate data reconstruction unit 35 will be described. Middle
Data reconstruction, that is, trapezoidal data overlap removal,
This is performed by the intermediate data reconstruction unit 35 shown in FIG.
You. The intermediate data reconstruction unit 35 includes a page end determination unit 33
One and the number of segmented intermediate data corresponding to the number of bands
332. FIG. 53 shows that one page has four
Divided into bands and out of 4 divisions that match the number of bands 4
The intermediate data reconstruction unit 35 is configured by the inter-data reconstruction unit 332.
Indicates that it has been performed. FIG. 54 shows the intermediate data reconstruction.
The following shows the processing procedure. First, the page end determination unit 331
All latch processing units 327 of the intermediate data optimization unit 34
1 is the end of the object to be processed in each band
Intermediate data optimization such as whether or not the indicated EOD is held
Unit 34 stores one page of data in intermediate data storage unit 33
Whether the end of the page or not, depending on whether or not
It is determined that the operation of all the segmented intermediate data reconstruction units 332 is
An operation start is instructed (S44). Sectional intermediate data reconstruction unit
332 corresponds to each band from the intermediate data storage unit 33.
Reconstructs the intermediate data, and stores the result in the intermediate data storage unit.
The data is transferred to the part corresponding to each band 33 (S45).
The configuration of the sectioned intermediate data reconstruction unit 332 and S35
Explain the procedure in detail. FIG. 55 shows the sectioned intermediate data reconstruction unit 3
32 shows an example of the configuration. Sectional intermediate data reconstruction unit 33
2 is an intermediate data transfer unit 3321, an input band buffer
3322, fetch processing unit 3323, trapezoid overlap determination unit
3324, trapezoidal data subdivision unit 3325 and output bank
And a buffer 3326. Intermediate data transfer
The sending unit 3321 stores the intermediate data from the intermediate data storage unit 33.
Transfer to the input band buffer 3322 and output band
Reconstructed from buffer 3326 to intermediate data storage unit 33
Transfer the intermediate data. Input band buffer 332
2 is a so-called first-in first-out band buffer
It is structured and holds objects as intermediate data. H
The etch processing unit 3323 includes an input band buffer 3322
Trapezoidal overlap judging unit 33
24. The trapezoid overlap determination unit 3324 is described later.
The overlap of trapezoidal data for each object
Set. The trapezoid overlap judgment unit 332 is an output band buffer.
An input for indicating the position of the object in 3326
It has a index holding register Reg CUR. Trapezoid day
The data re-division unit 3325 stores the data in the output band buffer 3326.
All trapezoidal data and
Trapezoidal overlap judging unit 3324 by the switch processing unit 3323
Does not overlap with the trapezoid data of the object transferred to
Subdivides the trapezoidal data as follows. Output band buffer 3
326 is for storing an object having no trapezoidal data overlap.
Carry. In the output band buffer 3326, the object
Are stored in a list format with the end specified.
The reconstruction of the intermediate data for each band is as shown in FIG.
Follow the procedure below. (1) Initialization of trapezoid overlap judgment unit 3324 and others (S4
6). The intermediate data transfer unit 3321 is provided from the intermediate data storage unit 33.
The intermediate data corresponding to each band is input to the input band buffer 3
322. Clear output band buffer 3326
A. (2) Object fetch processing (S47). The fetch processing unit 3323 converts the object into the input band
Transfer from the buffer 3322 to the trapezoid overlap judgment unit 3324
I do. The object is the object to be inspected.
You. (3) Overlap removal processing of trapezoidal data (S48). FIG. 57 shows details of the following trapezoidal data overlap removal processing procedure.
Is shown. (3.1) Initialization of index holding register (S5
1). Outputs the contents of the index holding register Reg CUR
Indicates the position of the first object in the band buffer 3326
Index. (3.2) Overlap judgment of trapezoidal data (S52). The trapezoid overlap determination unit 3324 determines the object to be inspected.
Index for all trapezoidal data
Output indicated by index of holding register Reg CUR
Object held in band buffer 3326
Inspection is performed for all trapezoidal data and overlaps. Heavy
If there is, the process proceeds to S13p. Meanwhile, overlap
If not, the process proceeds to S54. (3.3) Trapezoidal data division processing (S53). The trapezoid data subdivision unit 3325 includes a trapezoid overlap determination unit 33.
24, the trapezoidal data of the inspected object and the overlap
Stored in the output band buffer 3326
The held trapezoidal data is further divided into trapezoidal data,
The trapezoidal data corresponding to the overlapping part is removed. Figure
Reference numeral 58 denotes a state before and after the trapezoidal data overlap removal processing.
The object to be inspected is the object 2, and the object
If it overlaps with the trapezoidal data of object 1,
The trapezoid data of object 1 is divided as shown in FIG.
Trapezoidal data of object 2 of trapezoidal data under object 1
The part that overlaps the data is removed. Where the object
There is no change in the trapezoid data of the project 2 itself. Like this
After all, the trapezoid data of the inspected object is overwritten
Remove the overlap so that (3.4) Update processing of index holding register (S5
4). The index holding register Reg CUR follows.
Keep an index indicating the position of the object
Update the value to (3.5) Inspection of existence of object to be processed (S5
5). The trapezoid overlap judging unit 3324 uses an index holding register.
Object indicated by the index held by the Reg CUR
Determine if the object is the last object
To check for objects to process.
You. If there is an object to be processed,
Move on to processing. On the other hand, if there is no object to process
If not, the process proceeds to S49. (4) Object addition processing (S49). Outputs the inspected object to the output band buffer 3326
Add to (5) Inspection of existence of object to be processed (S5
0). The fetch processing unit 3323 includes an input band buffer 332
2 to determine if an object exists
Then, the existence of the object to be processed is checked. Process
If there is an object to be processed, the process proceeds to S48.
You. On the other hand, if there are no objects to process,
Finish the process. Note that the configuration data in the development processing unit 4
In order to reduce the number of rewrites of
Intermediate data for each expansion processing ID for each band in the data storage unit 33
Sort the data so that they are continuous, or in the middle of each section
Output band buffer 3326 of data reconstruction section 332
With the output buffer 3273 of the intermediate data optimization unit 34
It is configured as a buffer for each similar development process ID, and
Next, intermediate data is continuous for each band for each processing ID.
Can be rearranged. I also mentioned earlier
The rewriting of the configuration data in one band is below the default value
In the case of, the processing from S46 to S50 may be omitted.
No. In other words, after the intermediate data optimization process,
Before the configuration processing, each object in the intermediate data storage unit 33
Count the number of times the expansion process ID changes, and the value is default
If the value is less than or equal to the value, the process of intermediate data reconstruction can be omitted.
Wear. [Third Embodiment] FIG. 59 shows the structure of a third embodiment according to the present invention.
FIG. In FIG. 59, the image processing device
A print data creation unit 1, a print data input unit 2,
A processing unit 3, a development processing unit 4, and an output unit 5.
I have. Further, the conversion processing unit 3 includes a lexical analysis unit 30
The inter-data generating unit 31, the parallel processing determining unit 36, and the intermediate data
And a data storage unit 33. Also, expand processing
The unit 4 includes a reconfigurable expansion unit 40 and a reconfiguration control unit 41
And a configuration data management unit 42. the above
Print data creation unit 1 and print data input unit
2, the expansion processing unit 4, and the output unit 5 are the same as those in the first embodiment.
Since this is the same as the configuration, the description is omitted here. Strange
The conversion unit 3 prints the print data input from the print data input unit 2.
Expansion processing from data to print data in expansion processing section 4
It generates intermediate data that can be processed.
30, an intermediate data generation unit 31, and a parallel processing determination unit 36
And an intermediate data storage unit 33. Lexical
Analysis unit 30, intermediate data generation unit 31, and intermediate data storage
The part 33 has the same configuration as that of the first embodiment.
Therefore, the description is also omitted here. The parallel processing determination unit 34
The intermediate data output from the intermediate data generation unit 31 is sequentially
Read, determine the overlap between them, and
When it is determined that there is no overlap between multiple intermediate data
Is a group of intermediate data that can be processed in parallel.
Parallel written to the reconfigurable expansion unit 40 of the open processing unit 4
Hardware that is an identifier for the configuration data to be processed
A to the intermediate data storage unit 33
You. Next, in the print processing apparatus configured as described above,
The flow of print data. Print data creation
The print data created by the unit 1 is sent to the print data input unit 2
The input is input to the lexical analyzer 30 of the conversion processor 3 via the interface.
The token extracted from the print data in the lexical analyzer 30.
The token is input to the intermediate data generation unit 31. Intermediate de
Is divided into band units generated by the data generation unit 31.
The intermediate data is input to the parallel processing determination unit 36,
Data into groups that can be processed in parallel based on the data overlap.
And the intermediate data storage unit 33 stores one page per band.
Minutes. The expansion processing unit 4 and the output processing unit 5
Since the configuration is the same as that of the first embodiment,
Description is omitted. The outline of the image processing apparatus of the present invention has been described above.
It was described. Next, details of the main parts of this image processing device
Will be described. Here, the difference between the first embodiment and the first embodiment is mainly described.
Of parallel processing determination unit 36 in conversion processing unit 3
I do. The parallel processing determination unit 36 determines whether the intermediate data generation unit 31
Sequentially read the intermediate data output from the
Judgment is made and overlapping between consecutive intermediate data
If it is determined that there is no intermediate data that can be processed in parallel
, The reconfigurable expansion unit 4 of the expansion processing unit 4
0 to the configuration data for parallel processing written to 0
An additional hardware configuration ID is added to the intermediate data.
Output to the data storage unit 33. In the parallel processing determination unit 36
The output data format is the same as that of FIG. 10 shown in the first embodiment.
You. In FIG. 10, the output from the parallel processing determination unit 36 is
The data structure of the inter-data is an object that can be processed in parallel.
It is summarized for each. The data for each set is Band I
D, hardware configuration ID, number of objects, set
It consists of the data of the object to which it belongs. FIG. 60 shows the parallel processing.
FIG. 2 shows a configuration diagram of a logical determination unit 36. In FIG. 60, 361
Is an input object buffer, 362 is an overlap determination unit,
363 is a configuration data addition unit, 364 is an output object
It is a buffer. The input object buffer 361 is
Input and store object data. object
Data may be entered and stored in one unit
Or a plurality of drawing objects,
It may be a larger unit such as a band or a page.
The overlap determination unit 362 determines whether the input object buffer 32
The same band ID is assigned to the objects sequentially stored in 1.
Enter the coordinates of the circumscribed rectangle of each object
The overlap between objects is determined. Weight between objects
The overlap judgment is held by the overlap judgment unit for each band.
The band ID of the input object of the circumscribed rectangle
And the circumscribed rectangle of the input object
Is determined. For an explanation of future processing,
Since the processing is independent for each band, the input object
The band is narrowed down to the band corresponding to the band ID of the project. Heavy
The circumscribed rectangle held by the
And then the first object entered
It becomes the circumscribed rectangle of the project. And the next object
The overlap is determined, and if there is no overlap,
If the circumscribed rectangle is held, enter
Circumscribed rectangle of the ORed area of the circumscribed rectangle of the drawn object
Changed to shape. If it is determined that there is overlap
Indicates that the circumscribed rectangle is
Is replaced by the circumscribed rectangle. Hold the overlap judgment
Lower left coordinates of the circumscribed rectangle (ldx0, ldy0), upper right
Coordinates (rux0, ruy0), input object
Lower left coordinates (ldx1, ldy1) of the circumscribed rectangle of
This is done using markers (rux1, ruy1), such as:
When the expression holds, it is determined that there is no overlap.

Ldx0> rux1 or rux0 <ldx
1 or ldy0> ruy1 or ruy0 <ldy
1 OR of circumscribed rectangle when it is determined that there is no overlap
Becomes

Ldx0 = min (ldx0, ldx1), l
dy0 = min (ldy0, ldy1), lux0 = m
ax (rux0, rux1), ruy0 = max (ru
y0, ruy1) The determination result thus determined is sent to the configuration data adding unit 363. The configuration data adding unit 363 determines the result of the determination and the object ID of the input object.
In the case where the judgment result indicates that there is no overlap, the expansion processing unit 4 can be reconfigured from the object ID of the previously input object stored in the output object buffer 364 and the object ID of the input object. If the combination is a combination that can be processed in parallel by the expansion unit 40, the input object is additionally written into the output object buffer 364. If the combination cannot be processed in parallel by the reconfigurable expansion unit 40 of the expansion processing unit 4, the parallel processing configuration data for the previously input object group stored in the output object buffer 364 is added. After the object stored in the output object buffer 364 is sent to the intermediate data storage unit 33, the input object is written to the output object buffer 364, and the circumscribed rectangle of the input object is input to the overlap determination unit 362. Then, the data of the circumscribed rectangle and the band ID are sent so that the held circumscribed rectangle is reset. If the judgment result indicates that there is an overlap, the output object buffer 364 is output.
After adding the configuration data of the parallel processing to the previously input object group stored in the output object buffer 364 and sending out the object stored in the output object buffer 364 to the intermediate data storage unit 33, the input object is output. A process for writing to the object buffer 364 is performed. The output object buffer 364 inputs and stores object data. As long as the number of objects to be input and stored is equal to or more than the maximum number of objects that can be processed in parallel by the reconfigurable expansion unit 40 of the expansion processing unit 4, even a larger unit such as a band or a page can be used. Good. In this way, the data output from the parallel processing determination unit 36 is sequentially sent to the intermediate data storage unit 33. Since the processing after the expansion processing unit 4 is the same as that of the first embodiment, the description is omitted. This concludes the description of the embodiment of the present invention. It should be noted that the present invention is not limited to the above-described embodiment, and various changes can be made without departing from the gist of the present invention. For example, the reconfiguration hardware unit 4
6 was composed of an FPGA as shown in FIG.
A plurality of arithmetic processing units (arithmetic logic operation units) are provided,
The input / output flow of each processing device may be controlled by the switching device. In this case, for example, an arithmetic processing unit may be arranged as the logic block 4621 in FIG. Further, a simple gate may be used instead of the cross point switch 4622 or the switch matrix 4623.

As described above, according to the present invention, characters,
A print processing device that has one of a drawing element of a figure and an image and receives print data described by a predetermined drawing command and outputs the print data to an output device. By using hardware, the required amount of hardware can be reduced, and the throughput can be improved by adopting an optimal hardware configuration according to the print data to be processed. For example, judging the overlap of drawing elements included in the print data, and rearranging the drawing elements of the print data based on the determination information and the contents of the print data, thereby causing the reconfiguration hardware means to operate in parallel. When,
By reducing the number of changes in the configuration of the reconfigurable hardware means, it is possible to speed up the expansion processing by the reconfigurable hardware means.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is an explanatory diagram of a configuration of a color page printer.

FIG. 3 is a block diagram illustrating an intermediate data generation unit.

FIG. 4 is a diagram illustrating an outline vector.

FIG. 5 is a diagram illustrating recursive division of a Bezier curve.

FIG. 6 is a diagram illustrating trapezoidal data.

FIG. 7 is a diagram illustrating division of trapezoidal data at a band boundary.

FIG. 8 is a diagram illustrating an example of a data representation of trapezoidal data.

FIG. 9 is a diagram for explaining correspondence of image data to trapezoidal data.

FIG. 10 is a diagram illustrating a data structure generated by an intermediate data order control unit.

FIG. 11 is a block diagram illustrating an intermediate data order control unit.

FIG. 12 is a diagram illustrating overlapping of drawing objects in a band area.

FIG. 13 is a diagram illustrating an example of an optimization table.

FIG. 14 is a flowchart illustrating a procedure in which a configuration data selection unit selects configuration data.

FIG. 15 illustrates an example of a candidate for a hardware configuration ID.

FIG. 16 is a block diagram of a reconfigurable developing unit.

FIG. 17 is a diagram illustrating a method of using a force buffer and a band buffer.

FIG. 18 is a flowchart illustrating a procedure in which a configuration control unit controls a reconfiguration hardware unit.

FIG. 19 is a diagram showing a configuration of a configuration data management unit.

FIG. 20 is a block diagram illustrating a configuration example of a reconfiguration hardware unit.

21 is a diagram illustrating a configuration of the FPGA unit in FIG.

FIG. 22 is a diagram for explaining the logical block in FIG. 21;

FIG. 23 is a diagram illustrating the cross point switch of FIG. 21.

FIG. 24 is a diagram illustrating the switch matrix of FIG. 21.

FIG. 25 is a diagram illustrating a configuration of a reconfiguration hardware unit when a hardware configuration ID is X;

FIG. 26 is a diagram illustrating trapezoidal data drawing.

FIG. 27 is a functional block diagram of a trapezoidal drawing circuit.

FIG. 28 is a functional block diagram of a coordinate calculation unit.

FIG. 29 is a functional block diagram of an edge drawing unit.

FIG. 30 is a functional block diagram of a decompression processing circuit.

FIG. 31 is a functional block diagram of a resolution conversion circuit.

FIG. 32 is a functional block diagram of a color space conversion circuit.

FIG. 33 is a diagram illustrating a process of linear interpolation of color space conversion.

FIG. 34 is a diagram illustrating a relationship between the conversion processing unit and the expansion processing unit when the expansion processing unit is used as an accelerator.

FIG. 35 is a flowchart illustrating a control procedure performed by the reconfiguration control unit when partially rewriting the reconfiguration hardware unit;

FIG. 36 is a block diagram showing a second embodiment of the present invention.

FIG. 37 shows an example of the configuration of the intermediate data optimization section 34.

FIG. 38 shows an example of the configuration of a sectioned intermediate data optimization section 327.

FIG. 39 illustrates an example of a configuration of an output buffer 3273.

FIG. 40 illustrates an aspect of overlapping circumscribed rectangles in the second embodiment.

FIG. 41 illustrates a mode of overlapping circumscribed rectangles based on the same processing type according to the second embodiment.

FIG. 42 shows a processing procedure of intermediate data optimization.

FIG. 43 shows how a latch processing unit 3271 and a circumscribed rectangle overlap determination unit 3272 determine the identity of processing types.

FIG. 44 shows a state of a bitmap update process of the circumscribed rectangle set storage unit.

FIG. 45 illustrates an example of a configuration of a circumscribed rectangle set storage unit 3274.

FIG. 46 illustrates an example of a configuration of an output buffer 3273.

FIG. 47 shows a processing procedure of second intermediate data optimization.

FIG. 48 shows a state of layers formed by overlapping circumscribed rectangles.

FIG. 49 shows an object list adding process.

50 shows details of the object list insertion processing procedure in FIG. 47.

FIG. 51 shows a state before and after updating the circumscribed rectangular vertex coordinates.

FIG. 52 shows an object list insertion process.

FIG. 53 shows an example of the configuration of an intermediate data reconstruction unit 35.

FIG. 54 shows a processing procedure of intermediate data reconstruction.

FIG. 55 shows an example of the configuration of a sectioned intermediate data reconstruction unit 332.

FIG. 56 shows a processing procedure of intermediate data reconstruction for each band.

FIG. 57 shows a trapezoidal data overlap removal processing procedure.

FIG. 58 shows a state before and after a trapezoidal data overlap removal process.

FIG. 59 is a block diagram showing a third embodiment of the present invention.

FIG. 60 is a block diagram illustrating a parallel processing determination unit.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Print data creation part 2 Print data input part 3 Conversion processing part 4 Expansion processing part 5 Output part 30 Lexical analysis part 31 Intermediate data generation part 310 Token interpretation part 311 Command execution part 312 Image processing part 313 Drawing state storage part 314 Vector data Generation unit 315 Font management unit 316 Matrix conversion unit 317 Short vector generation unit 318 Trapezoidal data generation unit 319 Band decomposition management unit 32 Intermediate data order control unit 321 Object buffer 322 Drawing order dependence detection unit 323 Optimization table creation unit 324 Configuration data selection Section 325 reorder section 326 band number determination section 327 section intermediate data optimization section 3271 latch processing section 3272 circumscribed rectangle overlap determination section 3273 output buffer 3274 circumscribed rectangle set storage section, 33 intermediate data storage section 332 Intermediate data transfer unit 3322 Input band buffer 3323 Fetch processing unit 3324 Trapezoid overlap determination unit 3325 Trapezoid data subdivision unit 3326 Output band buffer 34 Intermediate data optimization unit 35 Intermediate data reconstruction unit 36 Parallel processing determination unit 361 Input object buffer 362 Overlap Judgment unit 363 Configuration data addition unit 364 Output object buffer 40 Reconfigurable development unit 41 Reconfiguration control unit 410 Memory unit 411 Configuration code storage area 412 Control unit 413 Read control unit 414 Addition / update unit 415 Conversion table 42 Configuration data management unit 420 input buffer A 421 input buffer B 422 band buffer A 423 band buffer B 424 work area 43 intermediate data transfer control unit 44 print data transfer control unit 45 arbitrage Section 46 Reconstruction hardware section 460, 460-1, 460-2 Code A processing circuit 461 Trapezoid drawing circuit 462 Screen processing circuit 463 Intermediate data input section 464 Coordinate calculation section A 465 Coordinate calculation section B 466 Edge drawing section 467 DDA Parameter calculation section 468 DDA processing section 469 Coordinate update section 47 Refresh control section 470 Address calculation section 471 Mask calculation section 472 Data calculation section 473 RmodW processing section 480, 480-1, 480-2, 480-3 Co
de G processing circuit 481 Image decompression circuit 481-1 Intermediate data input section 481-2 Huffman decoding section 481-3 Inverse quantization section 481-4 Inverse DCT section 481-5 Writing section 482 Resolution conversion circuit 482-1 Pixel data Input section 482-2 Interpolation processing section 482-3 Pixel address calculation section 482-4 Writing section 483 Color conversion circuit 483-1 Pixel data input section 483-2 Table conversion section 483-3 Interpolation processing section 483-4 Writing section 484 Trapezoid Drawing circuit 485 Screen processing circuit 50 Video interface 51 Semiconductor laser scanning device 510 Polygon mirror 511 Lens 52 Photoreceptor drum 53 Charger 54 Rotary developing device 55 Transfer drum 56 Cleaner 57 Fixing device 58 Paper transport path 900 Band area 901 Graphic object DOO 902 image object 902 graphic object 903 image object

Continued on the front page (72) Inventor Noriaki Seki 430 Nakaicho, Nakai-machi, Ashigarakami-gun, Kanagawa Prefecture Inside Green Tech Nakafuji Fuji Xerox Co., Ltd. 72) Inventor Yoshinori Wada 430 Nakai-cho, Nakai-cho, Ashigara-kami, Kanagawa Prefecture Inside Fuji Xerox Fuji Xerox Co., Ltd.

Claims (19)

[Claims] 1. Developing first print data described by a predetermined drawing command, which represents at least one of a character, a graphic, and an image drawing element, into second print data of an image output data structure; A print processing apparatus for outputting an image based on the second print data, comprising: a plurality of processing modules; and a switching unit configured to control a flow of input data and output data of the plurality of processing modules. And hardware means capable of setting at least one of the switching modes of the switching means in accordance with the configuration data, wherein the configuration data is changed in accordance with the hardware configuration information to correspond to the hardware configuration information. Hardware means for expanding the first print data into the second print data; input means for inputting the first print data; Means for determining overlapping of drawing elements included in the first print data input to the input means; and at least determination information of the determination means and the first print data input to the input means. Based on the contents, the drawing elements of the first print data input to the input means are rearranged, and further converted into print data of a predetermined format including the hardware configuration information and supplied to the hardware means. A print processing apparatus comprising: an output unit that outputs an image based on the second print data expanded by the hardware unit. 2. The print processing apparatus according to claim 1, wherein the reordering of the drawing elements by the conversion means is performed so that the drawing elements which can be developed in parallel by the hardware means are continuous. 3. The print processing apparatus according to claim 2, wherein the parallel development by the hardware means is performed by a hardware configuration set to include a plurality of the same or different functional blocks. 4. The printing process according to claim 1, wherein the rearrangement of the drawing elements in the conversion unit is performed so that the number of times of changing the configuration data of the hardware unit is reduced. apparatus. 5. The print processing apparatus according to claim 1, wherein the conversion unit does not rearrange the order of the drawing elements determined to be overlapped by the determination unit. . 6. The print processing apparatus according to claim 5, wherein the determination unit determines the overlap using a circumscribed rectangle including the drawing element. 7. The apparatus according to claim 1, wherein said conversion unit rearranges the order after removing the overlap between the drawing elements determined to have an overlap by the determination unit.
5. The print processing apparatus according to 2, 3, or 4. 8. The method according to claim 1, wherein the rearrangement of the drawing elements is performed for each page or for each band obtained by dividing the page into a plurality of scan lines.
The print processing apparatus according to 5, 6, or 7. 9. The print processing apparatus according to claim 1, wherein the hardware means can change the hardware configuration entirely or partially. 10. When the hardware configuration information included in the print data of the predetermined format inputted one after another is the same, the hardware means omits the change of the configuration data. The print processing apparatus according to claim 1. 11. The print processing apparatus according to claim 1, wherein said hardware means includes at least a field programmable gate array. 12. The print processing apparatus according to claim 1, wherein said hardware means includes a plurality of processing units, and switching means for switching a flow of input data and output data of said plurality of processing units. 13. The conversion means includes a plurality of processing modules and a switching means for controlling a flow of input data and output data of the plurality of processing modules, and a function of the processing module and a switching mode of the switching means. 2. The apparatus according to claim 1, further comprising hardware means for setting at least one of them according to configuration data, wherein at least a part of the processing of said conversion means is executed by said hardware means in said conversion means. Print processing device. 14. The print processing apparatus according to claim 1, wherein said hardware means is set so as to perform expansion by performing a plurality of function blocks in a pipeline operation. 15. A first description described by a predetermined drawing command, which represents at least one of a drawing element of a character, a graphic, and an image.
The print data is expanded into second print data of an image output data structure, and an image is output based on the second print data. A plurality of processing modules and an input of the plurality of processing modules Switching means for controlling the flow of data and output data, wherein the hardware means is capable of setting at least one of the function of the processing module and the switching mode of the switching means according to configuration data; Hardware means for changing the configuration data according to the above and expanding the first print data into the second print data in a manner corresponding to the hardware configuration information; and inputting the first print data. Input means; determining means for determining an overlap of drawing elements included in the first print data input to the input means; The first print data input to the input unit is converted into a predetermined format including the hardware configuration information based on at least the determination information of the determination unit and the content of the first print data input to the input unit. A print processing apparatus comprising: a conversion unit that converts the print data into print data and supplies the print data to the hardware unit; and an output unit that outputs an image based on the second print data developed by the hardware unit. 16. A hardware unit for specifying a hardware configuration for developing print data including a plurality of continuous drawing elements determined as having no overlap by the determination unit in parallel with the plurality of drawing elements. 16. The print processing apparatus according to claim 15, wherein the format is converted into a format including configuration information. 17. The print processing apparatus according to claim 16, wherein the parallel development of the drawing elements is performed by a hardware configuration including a plurality of the same or different functional blocks. 18. A first method which is described by a predetermined drawing command and represents at least one of a character, a figure, and a drawing element of an image.
A print processing device that expands the print data of the above into second print data of an image output data structure and outputs an image based on the second print data. Switching means for controlling the flow of data and output data, wherein the hardware means is capable of setting at least one of the function of the processing module and the switching mode of the switching means in accordance with configuration data; Hardware means for changing the configuration data according to the above and expanding the first print data into the second print data in a manner corresponding to the hardware configuration information; and inputting the first print data. Input means; and a first print data input to the input means, the hardware corresponding to the content of the first print data. Conversion means for converting the print data into print data of a predetermined format including hardware configuration information and supplying the print data to the hardware means; and output means for outputting an image based on the second print data developed by the hardware means. Print processing device provided. 19. The print processing apparatus according to claim 18, wherein the conversion unit omits the hardware configuration information in the conversion data according to the hardware configuration information.