JPH10257398A - Generator for timing signal drive solid-state image-pickup element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a generator for timing signal which drives a solid-state image-pickup element that has a provision for diversified variations of solid-state image-pickup elements, in order to improve inefficiency that a timing signal generator is to be put into a product for each variation of the solid-state image- pickup element. SOLUTION: The generator is made up of an oscillator 1 that generates a reference clock, frequency dividers 2a, 2b, 2c,... that frequency-divide an output clock in a frequency division ratio of, e.g. 1/2, 1/3, 1/4,..., a selector 3 that selects an output clock of various frequency dividers, a counter 4, a decoder 5 that decodes, e.g. leading pulses, a decoder 6 that decodes trailing pulses, a buffer 7, and an output terminal 8 that provides an output of an output pulse ϕ. Then the timing signal generator uses a microcomputer to set a clock selection device 9 and a decode value 10, so as to set the output pulse ϕprogrammable.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device drive timing signal generator for generating drive timing signals for, for example, a CCD solid-state image sensor, and more particularly, to a timing pulse output from a timing signal generator. The present invention relates to a solid-state imaging device drive timing signal generation device that can be set by a microcomputer in a programmable manner and that can support various solid-state imaging devices.

[0002]

2. Description of the Related Art In recent years, efforts have been made to improve the resolution and performance of, for example, CCD solid-state imaging devices. Under such circumstances, the performance of the CCD solid-state imaging device may be improved and the resolution may be increased. In general, when such a CCD solid-state imaging device is improved, the compatibility of the drive timing signals is not ensured.

On the other hand, recently, many applications have been developed in which an image memory device or a computer is connected to a video camera, and an image of the video camera is taken into a computer device or the like in synchronization with the image memory device or the computer. In response to applications using these CCD solid-state imaging devices, the pixel lineup of CCD solid-state imaging devices is also increasing.

However, in the conventional method of driving a CCD solid-state image pickup device, a solid-state image pickup device drive timing signal generator (timing generator) is required in accordance with the number of pixels of the CCD solid-state image pickup device, drive specifications, and applications using the CCD solid-state image pickup device. : Simply referred to as "timing signal generator"). Such a situation is not only inefficient but also economically wasteful, and is not preferred.

[0005]

SUMMARY OF THE INVENTION The present invention has been made in view of the above point of view, and has as its object to reduce the inefficiency of having to commercialize a solid-state imaging device drive timing signal generator for each variation of the solid-state imaging device. An object of the present invention is to provide a solid-state imaging device drive timing signal generation device which can be improved and can cope with various variations.

[0006]

According to the present invention, there is provided a solid-state imaging device driving timing signal generator for generating each driving timing signal for a CCD solid-state imaging device or the like, which oscillates a reference clock. An oscillator, a plurality of frequency dividers for dividing the clock oscillated by the oscillator, a selector for selecting the clock divided by the divider, a counter for counting the clock selected by the selector, and an output from the counter And a control means including a microcomputer for arbitrarily setting the selection data of the selector and the decoding value of the decoder and outputting a desired output pulse.

According to the solid-state image pickup device drive timing signal generating device of the present invention, each drive timing signal necessary for driving the solid-state image pickup device is controlled, generated by software under the control of the microcomputer, and output. This allows
The inefficiency of having to commercialize the solid-state imaging device drive timing signal generator for each variation of the solid-state imaging device can be improved, and a solid-state imaging device drive timing signal generator capable of supporting various variations can be provided.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, specific embodiments of the present invention will be described with reference to the accompanying drawings.

First, the configuration of a solid-state imaging device drive timing signal generator according to the present invention will be described with reference to FIG. FIG.
FIG. 1 is a block circuit diagram showing an example of a solid-state imaging device drive timing signal generator according to the present invention.

In the timing signal generator of the present invention shown in FIG. 1, an oscillator 1 for generating a reference clock, and an output signal of the oscillator 1 are divided into, for example, 1/2, 1/3, 1/4,. .., A selector 3 for selecting output clocks of various frequency dividers, a counter 4 for counting, for example, a decoder 5 for decoding a rising pulse, a decoder 6 for decoding a falling pulse, a buffer 7, And an output 8 for outputting an output pulse φ.

The timing signal generating device of the present invention is a microcomputer (not shown: also referred to as "microcomputer").
The output pulse φ can be freely set by the data setting by. That is, the selector 3 sets the clock selection 9
And the clock selection 9 is controlled by data selected by the microcomputer, and is connected to various frequency dividers 2a, 2b, 2c.
.. Are selected. Similarly, a decode value 10 arbitrarily set by the microcomputer is supplied to the decoders 5 and 6, and decodes the rising and falling edges of the output pulse φ.

Here, the output pulse φ generated by the timing signal generating device of the present invention is, for example, 7 as shown in FIG.
20H CCD NTSC. H1, RG, XSHP, XSHD, XRS, X related to horizontal control of TV standard
Timing clocks such as V1, XV2, XV3, XV4, and IDs, XV1, XV2,
Various timing clocks such as XV3, XV4, PBLK, and CLPDM. It should be noted that the solid-state imaging device drive timing signal generation device of the present invention includes a conventionally known synchronization signal generation circuit and a solid-state imaging device driver (both not shown).
To drive the solid-state imaging device.

Next, the operation of the solid-state image pickup device drive timing signal generating apparatus of the present invention will be described with reference to FIGS. FIG. 2 is a timing chart showing an example of an output pulse generated by the solid-state imaging device drive timing signal generator of the present invention.

The oscillator 1 shown in FIG. 1 oscillates using the maximum frequency used in the timing signal generator of the present invention as a reference clock, and outputs it to the frequency dividers 2a, 2b, 2c,. The selector 3 selects a desired clock from the frequency dividers 2a, 2b, 2c,... According to the selection data of the clock selection 9, and outputs the selected clock to the counter 4CLK in the next stage. The counter 4 counts the master clock MCK based on the falling edge of the horizontal timing pulse AHD as shown in FIG. 2 (refer to the “0” clock in FIG. 2) and counts it to a predetermined number. Is generated with the number of bits.

That is, to explain an example of an output pulse generated by the solid-state image pickup device drive timing signal generator of the present invention, in H1 (CCD horizontal register clock output), "0" to "39" clocks are used. Is a through output of the master clock MCK, the "40" through "117" clocks are fixed at "high level", and then the MCK is again output through to output H1. Similarly, in the case of XV1 (CCD vertical register clock output), an output pulse which rises at "48" and falls at "75" clock is generated by setting "Low level" up to "47" clock to obtain XV1.

The decode value 10 outputs a reference decode value which defines the rise and fall output from the microcomputer as described above according to the number of bits of the counter 4.
The decoder 5 and the decoder 6 compare the timing pulse output from the counter 4 with the reference decode value of the decode value 10 to decode and output the rising and falling pulses that have been matched. The buffer 7 outputs an output pulse φ having predetermined rising and falling characteristics synchronized with the master clock MCK in a repetitive pattern synchronized with the horizontal timing pulse AHD.

The data setting in the timing signal generator of the present invention is performed by a single IC
In the case of forming by using a microcomputer, it is set by a microcomputer or the like via a serial port according to each operation mode. Also,
Timing signal generation device for camera signal processing integrated circuit I
When incorporated in C (camera core), data may be set by a microcomputer incorporated in the camera core.

The timing signal generator of the present invention includes a circuit for a required output pulse, using the above-described circuit as a basic circuit. In that case, the oscillator 1, the frequency dividers 2a, 2b,
2c..., The selector 3 and the counter 4 may be used as a common circuit, and a plurality of decoders 5 and 6 may be provided to constitute a circuit for required output pulses. Output 8
When further modulating the output pulse φ of
Is realized by connecting a similar circuit using as a reference clock. It should be noted that the above-described circuit configuration shows an example of the timing signal generator of the present invention, and the present invention is not limited to the above-described one, and it is needless to say that another configuration having the same function may be used. is there.

As a specific effect of the solid-state image pickup device drive timing signal generator of the present invention, first, it is possible to cope with driving of all the solid-state image pickup devices in various variations, and the timing signal is generated for each variation of the solid-state image pickup device. The inefficiency of having to commercialize the generator can be improved. Secondly, it is possible to flexibly cope with irregular driving due to a change in application of a solid-state imaging device developed other than a TV, and it is possible to expand design flexibility. Third, since it is possible to output all output timings (repetition patterns) in principle, a controllable timing signal generator is required for LSI (Large Scale Integrator).
ted Circuit). Fourth, when the timing signal generator of the present invention is built in a camera core,
The setting data may be set by a microcomputer built in the camera core, and design efficiency is improved. And the like.

Although the preferred embodiments of the present invention have been described in detail, various other embodiments of the present invention are possible in addition to these embodiments. For example, a decode value or the like used in the timing signal generator of the present invention may be stored in a memory, and the output pulse may be switched and output according to the application of the solid-state imaging device.

Further, by incorporating the timing signal generator of the present invention in an integrated circuit IC for camera signal processing, or by incorporating software based on a microcomputer program in an ASIC for a specific application, a timing signal corresponding to various applications can be obtained. Can occur.

Further, the timing signal generator of the present invention can be applied to a timing generator such as a sync generator or an HD / VD for various signal processing systems other than the solid-state imaging device. It goes without saying that the present invention can be developed into various forms without being limited to the embodiment described above.

[0023]

As described above, according to the solid-state imaging device drive timing signal generator of the present invention, various timing pulses required for driving the solid-state imaging device can be set programmably by data setting by a microcomputer. Provided is a solid-state imaging device drive timing signal generation device that can improve the inefficiency of having to commercialize a solid-state imaging device drive timing signal generation device for each variation of the solid-state imaging device and can cope with various variations in the solid-state imaging device. It is possible to do.

[Brief description of the drawings]

FIG. 1 is a block circuit diagram showing an example of a solid-state imaging device drive timing signal generation device of the present invention.

FIG. 2 is a timing chart illustrating an example of an output pulse generated by the solid-state imaging device driving timing signal generator according to the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Oscillator, 2a, 2b, 2c ... Divider, 3 ... Selector, 4 ... Counter, 5, 6 ... Decoder, 7 ... Buffer,
8 output, 9 clock selection, 10 decode value

Claims (3)

[Claims] 1. A solid-state imaging device driving timing signal generating device for generating each driving timing signal of a CCD solid-state imaging device or the like, comprising: an oscillator for oscillating a reference clock; and a plurality of frequency dividers for dividing the clock oscillated by the oscillator. A frequency divider; a selector for selecting a clock divided by the frequency divider; a counter for counting the clock selected by the selector; a decoder for decoding a clock output from the counter; and selection of the selector Control means for setting data and a decode value of the decoder and outputting a desired output pulse. 2. The solid-state imaging device drive according to claim 1, wherein the control unit can arbitrarily set the selection data of the selector and the decode value of the decoder by external communication data. Timing signal generator. 3. The solid-state imaging device driving timing signal generating apparatus according to claim 1, wherein said control means is constituted by a microcomputer.