JP2003230037A - Personal computer camera - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve a problem of compatibility between a high frame rate and high image quality and a program of cost-increase due to a circuit revision depending on a CCD. <P>SOLUTION: All of camera functions except the CCD are mounted on an interface board, the camera functions are programmable to cope with revisions of CCD specifications. Further, as a countermeasure against a problem of signal delay within a cable tying a camera main body and the interface board, the timing pulse generating circuit is divided into a first timing pulse generating circuit for generating a drive pulse group for the CCD and a second timing pulse generating circuit for generating a read pulse group used to extract an image signal from a CCD output signal for A/D conversion, a return-back circuit for receiving a clock signal and returning it through a buffer is provided to the camera main body, the first timing pulse generating circuit is operated by the original clock signal and the second timing pulse generating circuit is operated by the clock signal from the camera main body. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention receives reflected and scattered light from a subject through a lens system to a CCD two-dimensional image sensor (hereinafter referred to as CCD) so as to capture an image into a personal computer through an interface board. It relates to a personal computer camera configured in.

[0002]

2. Description of the Related Art Unlike a "digital camera" that has become popular these days, a personal computer camera is always connected to a personal computer and is used as a microscope image input device and a process control camera in the manufacturing process. . Generally, NTSC
Alternatively, a PAL type video camera is combined with a video capture board, but in terms of resolution, the "digital camera" is now in a superior position. In other words, both of them are one-handed to meet the requirement of "performance in some cases, high speed in some cases, and high-definition image quality in other cases", which is the performance required for personal computer cameras. As a solution to this problem, a CC for a still image of square pixels is adopted by the all-pixel reading method.
Cameras using D and image input boards corresponding to them have begun to spread.

However, as the number of pixels of the CCD increases and the resolution increases, the reading time becomes longer and the comfort of a video camera is lost. For example, 1/2
When a CCD with 1.4 million pixels per inch is used, the frame rate is 7.5 frames per second, which is not comparable to NTSC 60 fields / second and 30 frames / second. Therefore, an irregular thinning-out reading method in a draft mode is required for a live image that can be displayed at about 30 frames / second, and the CCD device is also provided with an electrode wiring and a dedicated signal terminal for that purpose. This trend has spurred, and CC with two types of draft modes
D is on sale. This makes it difficult for a camera maker to develop a circuit board every time the CCD changes. This is because, if only the CCD substrate having only the CCD is changed, the labor and cost are small, but the timing generator also needs to be changed at the same time.

On the other hand, when the CMOS sensor has reached a practical area and the characteristic of random reading is used to narrow the image capturing range, it is possible to read at a higher frame rate than ever before. Of course, the same effect can be obtained by thinning-out reading. However, in terms of noise characteristics, which is the basic performance, the CCD is still far superior. Therefore, it must be said that the condition of "sometimes fast, sometimes high-definition image quality" is not met.

There are some CCDs that can increase the frame rate by limiting the image capturing range. However, the CCD has a large number of vertical driving terminals, and a dedicated timing generator is used. Although it was necessary, it was difficult to specify the area freely, but it was premised on the draft mode. Such functions relating to the frame rate often limit the image capturing range in a pixel shift camera, that is, in a camera in which a CCD is slightly moved together with a substrate to take a plurality of images and combine these images to obtain a final image. Therefore, it is particularly useful, but it has not been realized.

[0006]

Problems to be solved are the problem of compatibility between high frame rate and high image quality, and CC.
This is a problem of cost increase due to the circuit change depending on D.

[0007]

[Means for solving the problems] All the camera functions other than the CCD are mounted on the interface board, the camera function is programmable, and the CCD is used by the personal computer software.
Respond to changes in specifications. As a result, not only the CCD substrate needs to be changed by the CCD, but also the size of the camera body can be significantly reduced. However, as a major problem, there is a signal delay, and in most cases, the image cannot be properly received due to the signal delay that changes depending on the length of the cable connecting the camera body and the interface board. As a solution to this problem, a first timing pulse generation circuit for generating a driving pulse group for the CCD two-dimensional image sensor and a reading pulse group for extracting an image signal from a CCD output signal and further performing A / D conversion are generated. A second timing pulse generating circuit for the interface board, and a return back circuit for receiving a clock signal and returning it through a buffer in the camera body. The first timing pulse generating circuit operates according to the original clock signal. The second timing pulse generation circuit is operated by the clock signal from the camera body.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The circuit configuration is improved and realized by personal computer software.

[0009]

1 is a system block diagram of the device of the present invention, in which 20 is a camera body and 30 is an interface.
The board, 40 is a personal computer.

The camera body 20 includes a CCD 1, a waveform shaping circuit 12 for directly driving the CCD 1, and an impedance matching circuit 1 for transmitting and receiving a signal whose frequency band and voltage are suppressed to prevent unwanted radiation and which has passed through a coaxial cable.
0 and a return-back circuit 11 that recovers the voltages of the clock signal and the reset signal to appropriate values and sends them back through the impedance matching circuit 10 as they are, and is a simple circuit unlike a CDS circuit or a timing generator. It is composed. The waveform shaping circuit 12 is composed of a discrete transistor having a sufficient current capacity as a driver. The impedance matching circuit 10 is composed of a simple transistor circuit and a terminating resistor and an output resistor. The power supply method is not particularly described because it is not particularly limited. In addition, the transmission and reception of the reset signal is not necessary when the delay is not so large, and any appropriate one of the drive pulses may be used as the signal to be transmitted back.

The interface board 30 has CDS circuits 2a and 2b usually mounted on the camera body after the impedance matching circuit 9, followed by A / D converters 3a and 3b, and image data stored in the memories 4a and 4b. Remembered. These are controlled by the read pulse group. The read pulse group is output from the read pulse group generation circuit 5 as the second timing pulse generation circuit. On the other hand, the drive pulse group for the CCD is output from the drive pulse group generation circuit 6 as the first timing pulse generation circuit. The oscillator 8 having a frequency of 40 to 70 MHz is used, and its output is sent to the drive pulse group generation circuit 6 and the camera body 20. When this clock is called a clock A signal, it reaches the camera body through a cable and the clock signal returned by the return-back circuit is a completely different signal in terms of phase, so it is called a clock B signal. To do. The read pulse group generation circuit 5 operates using this clock B signal as an input signal. However, a pulse that does not need to take cable delay into consideration may be shared between the two timing pulse generation circuits. Further, although it is desirable that the oscillator 8 be programmable, since the frequency characteristic of the CCD device is generally quite high, it may be fixed to a high frequency to some extent.

Both timing pulse generation circuits 5 and 6
Is an H counter 5a, 6 that counts the horizontal direction of the image.
a and a V counter 5b for counting the vertical direction of the image,
6b, comparator groups 5e and 6e, pulse timing register groups 5c and 6c, pulse width register groups 5d and 6d
Each pulse timing register and the counter are matched, and each pulse rises, and when each corresponding pulse width register and the counter match, it is configured to fall.

As a result, the frame rate can be increased. That is, when the capture range is narrowed, the reset timing of the H counter is advanced to the capture start position, the output of the H drive pulse is stopped, and only the V drive pulse is output at the reset timing of the H counter. It is possible to reach the start position quickly. Furthermore, the frame rate can be further increased by outputting the V counter reset early after the capture is completed.
It can be as fast as a MOS sensor. Further, for long-time exposure photography, it is possible to continue exposure for a predetermined time by using the clock function of a personal computer without outputting both H and V drive pulses.

The personal computer 40 can communicate with the interface board through the PCI slot 14 and receive not only image data but also all information on the interface board and set them. It is omitted because it is not the subject,
It goes without saying that the gain of the CDS circuit and the conversion range of the A / D converter are set.

Further, reference numerals 50 and 60 are an X piezoelectric actuator and a Y piezoelectric actuator, respectively, which are mounted on a pixel shift camera and used for minutely moving the CCD together with the substrate. An advantage of the present invention is that the size of the camera substrate can be smaller than before even if these mechanical components are mounted because the camera substrate is small. Reference numeral 15 is a drive circuit, which is a piezoelectric element drive circuit including a booster circuit near 100 V, a high-voltage OP amplifier, a D / A converter, and a register that can be set by a personal computer.

FIG. 2 is a timing chart of a normal camera. From the top, a clock signal, a CCD driving H pulse, a CCD driving RG pulse, a CCD output, and a reading S are shown.
HP pulse and read SHD pulse. For comparison with the present invention, it is shown as a reference example that does not include cable delay.

FIG. 3 is a timing chart of the device of the present invention, which shows the clock A signal on the interface board from above, the H pulse for CCD driving which reaches the CCD of the camera body through the cable, and similarly for CCD driving. RG pulse, CCD from the camera body to the CDS circuits 2a and 2b on the interface board through the cable
The output is a read SHP pulse to be applied to the CDS circuit, and similarly an ideal read SHD pulse.
What is shown below is a clock signal necessary for producing the SHP and SHD, and the clock B signal of the present invention corresponds to this. In the figure, the arrows 51 and 52 represent cable delays.

[0018]

As described above, the personal computer camera of the present invention can be operated by mounting most of the camera functions on the interface board.
It became possible to change the CD specifications, and it became almost unnecessary to change the circuit by changing the CCD. Further, since the CCD driving system can be arbitrarily changed, the capturing range can be freely changed, and the frame rate can be made as fast as the CMOS sensor. Since the camera body has almost no circuitry, it can be made small, so
Even if a pixel shift mechanism is installed, a camera body that is smaller than a conventional camera can be realized, so a compact ultra-high-speed and ultra-high-definition camera can be realized at a low cost.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a personal computer camera of the present invention.

FIG. 2 is a time chart showing a drive signal of a normal camera.

FIG. 3 is a time chart diagram showing drive signals of the personal computer camera of the present invention.

[Explanation of symbols]

1 CCD 2D image sensor 2 CDS circuit 3 A / D converter 4 memory 5 Second timing pulse generation circuit 6 First timing pulse generation circuit 7 Wave shaping circuit 8 oscillators 9 Impedance matching circuit 10 Impedance matching circuit 11 Return back circuit 12 Wave shaping circuit 13 PCI controller 14 PCI slots 15 Piezoelectric element drive circuit 20 camera board 30 interface board 40 personal computers 50 X piezoelectric actuator 60 Y piezoelectric actuator

Claims (3)

[Claims] 1. A camera body for receiving reflected and scattered light from a subject through a lens system to a CCD two-dimensional image sensor and outputting an analog image signal, and an image obtained by inputting the analog image signal and performing A / D conversion. In a personal computer camera composed of an interface board for sending data to a personal computer, a first timing pulse generating circuit for generating a driving pulse group for the CCD two-dimensional image sensor, and an image signal extracted from a CCD output signal, A personal computer camera characterized in that the interface board is provided with a second timing pulse generation circuit for generating a read pulse group for D / D conversion. 2. The both timing pulse generation circuits include:
A counter for counting a clock signal, a timing register group for controlling each pulse timing, a pulse width register group for controlling the pulse width thereof, and a comparator group for detecting a match between the register and the counter, and the both register groups The personal computer camera according to claim 1, wherein the set value can be set from a personal computer. 3. A return back circuit for receiving a clock signal and sending it back through a buffer is provided in the camera body, the first timing pulse generation circuit operates according to an original clock signal, and the second timing pulse generation circuit operates in the camera body. 3. The personal computer camera according to claim 2, wherein the personal computer camera is configured to have a portion operated by a clock signal from the computer.