JPH10256372A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent degradation in embedding characteristics, which is caused by the fact that, when a wiring material is embedded in connection holes, etc., by high pressure reflow method, etc., a film of high hygroscopicity such as O3 -TEOS film and the water content diffused from the film of high hygroscopicity to the film of low hygroscopicity such as plasma SiO2 film are discharged to connection holes, etc. SOLUTION: A film of high hygroscopicity 4 is thermally processed while it is exposed on the inside surface of a connection hole 7, ao that water content is discharged from the film of high hygroscopicity 4. A silicon nitride film 5 is provided between the film of high hygroscopicity 4 and a film of low hygroscopicity 6, and the water content is prevent from diffusing from the film of high hygroscopicity 4 to the film of low hygroscopicity 6 at the thermal processing. After a sufficient water content is discharged from the film of high hygroscopicity 4, embedding process is performed. Thus, a discharge is prevented regardless or the fact that the water content which has diffused from the film of high hygroscopicity 4 to the film of low hygroscopicity 6 is not discharged easily at the thermal processing but discharged into the connection hole 7 at the embedding process there after.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, for example, a reflow method or a high-temperature sputtering method for forming a connection hole such as a contact hole or a via hole formed in an interlayer insulating film or a groove for forming a groove wiring. It is particularly suitable when applied to the case where a wiring material is embedded by using a technique such as a high-pressure reflow method.

[0002]

2. Description of the Related Art In recent years, as semiconductor devices such as very large scale integrated circuits (VLSI) have become highly integrated, multilayer wiring and miniaturization of internal wirings have advanced, and the aspect ratio of connection holes such as contact holes and via holes has increased. doing. For this reason, a technique of embedding a fine and high aspect ratio connection hole with a wiring material is very important.

On the other hand, recently, a so-called grooved wiring technique has attracted attention as a method capable of realizing finer wiring and flattening an interlayer insulating film by a simple process. In this trench wiring technique, a wiring material such as aluminum (Al) or copper (Cu) is formed so as to fill the inside of the trench formed in the interlayer insulating film,
Thereafter, the wiring material other than the groove is removed by a chemical mechanical polishing (CMP) method or the like, and the wiring material left in the groove is used as the wiring. In this groove wiring technique, a technique of embedding a wiring material in a fine groove is particularly important.

[0004] As a technique for embedding the above minute connection holes and grooves, conventionally, blanket tungsten (W) is used.
A chemical vapor deposition (CVD) method, a high-temperature sputtering method of Al or Cu, a reflow method, a high-pressure reflow method, and the like have been studied, and some of them have been put to practical use. Above all, the high-temperature sputtering method, the reflow method, and the high-pressure reflow method are advantageous in that the process is simpler than the blanket WCVD method, and that the manufacturing cost of the semiconductor device can be reduced.

In the high-temperature sputtering method, for example, a wiring material layer such as an Al alloy is formed by a sputtering method while a silicon substrate is heated to about 400 to 450 ° C. Then, the wiring material layer deposited on the interlayer insulating film is in a fluid state because the substrate is heated, and flows into the connection holes and grooves,
Embed them.

In the reflow method, for example, a wiring material layer such as an Al alloy is formed by a sputtering method while a silicon substrate is heated to about 200 ° C. At this point, the wiring material layer deposited on the interlayer insulating film does not flow because the substrate is not sufficiently heated. Therefore, after forming the wiring material layer, the substrate is heated to, for example, about 400 to 450 ° C., thereby flowing the wiring material layer into the connection hole or the groove in a flowing state.

In the high-pressure reflow method, after forming a wiring material layer in the same manner as the above-described reflow method, the substrate is heated to, for example, about 400 to 450 ° C. in a high-pressure argon (Ar) atmosphere. Then, the wiring material layer deposited on the interlayer insulating film is in a fluidized state, and since the atmosphere is at a high pressure, the wiring material layer is easily pushed into the connection holes and grooves and buried therein.

With reference to FIGS. 8 to 10, a description will be given of a conventional method of manufacturing a semiconductor device using a high-pressure reflow method.

First, as shown in FIG. 8A, a first interlayer insulating film 1 mainly made of silicon oxide (SiO ₂ ) is formed on a silicon substrate 101 on which a predetermined element structure and the like are formed.
02, and a lower wiring 103 made of an Al-Cu alloy or the like is formed thereon in a predetermined pattern.

[0010] Thereafter, an O ₃ -T is formed on the entire surface as an insulating film having excellent flatness and step coverage.
An EOS film 104 is formed. This O ₃ -TEOS film is
Ozone (O ₃ ) and tetraethoxysilane (TEOS)
Formed by atmospheric pressure CVD using Al as a reaction gas
O ₂ film. As an insulating film having excellent flatness and step coverage, other than the O ₃ -TEOS film, SOG
(Spin On Glass) film may be used in some cases.

Next, as shown in FIG.
(Reactive Ion Etching) is performed to etch back the O ₃ -TEOS film 104 until the surface of the lower wiring 103 is exposed. As a result, the O ₃ -TEOS film 104 is left only between the lower wirings 103.

Next, as shown in FIG. 9A, an SiO ₂ film (hereinafter referred to as “PE-Si
It referred to as the O ₂ film ". ) 105 is formed.

Next, as shown in FIG. 9B, the PE-S
A connection hole (via hole) 110 reaching the lower wiring 103 is formed at a predetermined position of the iO ₂ film 105.

Next, as shown in FIG. 10A, the entire surface of the PE-SiO ₂ film 105 including the inner surface of the connection hole 10 is
By a sputtering method, for example, a TiN / Ti film 106 which is a stacked film of titanium (Ti) and titanium nitride (TiN) is formed.

Thereafter, an upper wiring material 107 made of an Al-Cu alloy or the like is formed on the entire surface by a sputtering method. At this time, if the aspect ratio of the connection hole 110 is large, the upper layer wiring material 107 is formed in a bridge shape on the connection hole 110 as shown in the figure, and a void (gap) 111 is formed in the connection hole 110.
Remains.

Then, as shown in FIG. 10B, the silicon substrate 101 is heated to about 400 to 450 ° C. in a high vacuum to soften the upper layer wiring material 107. At about the same time, an inert gas such as Ar gas is introduced into the apparatus to increase the pressure inside the apparatus, and the upper wiring material 107 is pushed into the connection holes 110 to be buried. At this time, the wettability of the upper wiring material 107 is improved by the TiN / Ti film 106 formed on the inner surface of the connection hole 110 in advance, and the upper wiring material 107 is preferably pushed into the connection hole 110.

According to the high-pressure reflow method, under ideal conditions, the connection holes 110 having an aspect ratio of about 4 to 5 are formed.
Can be embedded.

[0018]

The O ₃ -TEOS film and the SOG film which are excellent in flatness and step coverage are also known as films having high hygroscopicity. On the other hand, P having low hygroscopicity
In a film such as an E-SiO ₂ film, an O ₃ -TEOS film or an SOG
The flatness and step coverage of the film cannot be obtained. Therefore,
In general, an interlayer insulating film is formed by combining a film having high hygroscopicity with excellent flatness and step coverage and a film having poor flatness and step coverage but low hygroscopicity.

At this time, conventionally, as described above, for example,
The O ₃ -TEOS film 104 is etched back so that the highly hygroscopic O ₃ -TEOS film 104 is not exposed in the connection hole 110 so that the O ₃ -TEOS film 104 is formed only between the lower wirings 103. And then put PE-SiO on it
_{The second} film 105 was almost completely covered with a film having low hygroscopicity. And thereby, the O ₃ -TEOS film 10
4 was prevented from being released.

However, in such a configuration, in the case of a process in which the substrate 101 is heated to a relatively high temperature of about 400 to 450 ° C., such as the above-described high-temperature sputtering method, reflow method, high-pressure reflow method, etc. As conceptually shown in FIG. 11, the moisture from the O ₃ -TEOS film 104 is PE-Si
It was found that the light was transmitted through the O ₂ film 105 and released into the connection hole 110.

For example, FIG. 14 shows the results of an experiment conducted by the present inventors.

In FIG. 14, a sample A is made of an O ₃ -TEOS film on a substrate and a P
Sample B formed by laminating E-SiO ₂ films
Is obtained by forming only PE-SiO ₂ film on the substrate, the sample C is obtained by forming the O ₃ -TEOS film only on a substrate. Note that the O ₃ -TEOS film and the PE-SiO
The thickness of each of the _two films was about 650 nm. The horizontal axis of each graph indicates the heat treatment temperature [° C.], and the vertical axis indicates the number (relative value) of water molecules as a result of analyzing the water released from the film by a mass spectrometer.

As can be seen from FIG. 14, O
_In sample C in which only the _3- TEOS film was formed, 100
Although a large amount of water molecules are released by the heat treatment at about ° C, in Sample A in which the O ₃ -TEOS film and the PE-SiO ₂ film are laminated on the substrate, the release of water molecules becomes remarkable from about 350 ° C, In the temperature range of ５００500 ° C., a considerable amount of water molecules is released. Sample B was formed only PE-SiO ₂ film on the substrate, since hardly observed release of water molecules, water molecules are released in this sample A, O ₃
It is clear that from -TEOS film is a water molecule that is released through the PE-SiO ₂ film thereon.

That is, in the case of a conventional structure in which a highly hygroscopic film such as an O ₃ -TEOS film is completely covered with a film having a low hygroscopicity such as a PE-SiO ₂ film, the temperature is lower than 350 ° C. Can prevent the release of moisture. However, as in the high-temperature sputtering method, reflow method, high-pressure reflow method, etc.
In a process performed by heating to a relatively high temperature of about 00 to 450 ° C., moisture is released through the PE-SiO ₂ film.

As shown in FIG. 11, the water released into the connection hole 110 oxidizes the surface of the TiN / Ti film 106 to form a surface oxide film 112, and further, contacts the surface oxide film 112. A portion of the upper wiring material 107 made of an Al—Cu alloy or the like is oxidized, and the upper wiring material 107 and T
For example, an aluminum oxide layer that hardly flows to the interface with the iN / Ti film 106 is formed. As a result, the embedding property of the upper layer wiring material 107 is reduced, the connection between the upper layer wiring material 107 and the lower layer wiring 103 becomes insufficient, and the wiring resistance is increased.

Therefore, based on the findings in FIG. 14 described above, the present inventor intentionally exposes a highly hygroscopic film such as an O ₃ -TEOS film to the inner surface of a connection hole or the like. After sufficiently releasing moisture from a film having a high hygroscopicity, a structure in which a wiring material is formed on connection holes and the like was proposed (Japanese Patent Application No. 8-305179).

That is, as can be seen from the results shown in FIG. 14, it is relatively difficult to release a sufficient amount of moisture from a highly hygroscopic film such as an O ₃ -TEOS film by performing a heat treatment in advance in the conventional structure. (For example, it is necessary to perform heat treatment for a considerably long time even at a temperature of about 500 ° C., and there is a risk of damaging lower wirings and the like), but water is directly released from a highly hygroscopic film such as an O ₃ -TEOS film. In this case, a sufficient amount of water can be easily released.

[0028] Therefore, for example, as shown in FIG. 12 remain on the inner surface of the connection hole 110 as O ₃ -TEOS film 104 is exposed, to form a thick O ₃ -TEOS film 104,
A PE-SiO ₂ film 105 is formed thereon, and
A connection hole 110 is formed through the E-SiO ₂ film 105 and the O ₃ -TEOS film 104. Then, for example,
A heat treatment is performed at a substrate temperature of about 450 ° C. for about 2 minutes in a reduced Ar atmosphere to release moisture from the O ₃ -TEOS film 104. Furthermore, if a film of the upper wiring material is formed continuously without being brought into contact with the atmosphere, the O ₃ -TEOS film 104 which has been sufficiently degassed will be formed in a subsequent step.
Almost no moisture is released.

According to this configuration, it is possible to greatly improve the poor filling of the connection holes, and it is also necessary to perform O ₃
Since the etch-back step of the TEOS film 104 is not necessarily performed, the manufacturing process is also simplified.

However, according to the subsequent research of the present inventors,
It has been found that even in the configuration shown in FIG. The reason is that in the configuration of FIG. _12, O 3 is sufficiently water can be removed from -TEOS film 104, during PE-SiO ₂ film 105 remains some moisture in the PE-SiO ₂ film 105 Is released when the upper wiring material is formed, thereby deteriorating the embedding property.

That is, at the time of heat treatment for removing moisture, O ₃ −
The moisture in the TEOS film 104 is O ₃ -TEOS film 104
In addition to being directly emitted from the outside, some PE-SiO ₂
It diffuses into the film 105. The PE-SiO ₂ film 105 diffuse moisture in is thought to exist as a type of bound water in PE-SiO ₂ film 105 is not easily released to the outside. Therefore, as shown in FIG.
Moisture diffused into the iO ₂ film 105 and captured there,
It is not released at the time of the heat treatment, but is released at the time of forming the upper wiring material later, thereby deteriorating the embedding property.

From the O ₃ -TEOS film 104, PE-S
In order to sufficiently remove the water diffused into the iO ₂ film 105, a considerably long heat treatment is required. In consideration of the throughput of the manufacturing process and the effect on the lower wiring and the internal element structure, the water is subjected to PE- It is practically impossible to sufficiently remove the SiO ₂ film 105.

Further, in order to solve this problem, it is conceivable to configure the interlayer film only by O ₃ -TEOS film, highly hygroscopic film such as O ₃ -TEOS film, when formed too thick film There is a risk of peeling or the like, and it is practically difficult to form a thick interlayer film only with an O ₃ -TEOS film or the like.

Accordingly, an object of the present invention is to remove moisture from a highly hygroscopic film such as an O ₃ -TEOS film exposed to the outside, and then to remove moisture from the highly hygroscopic film to a low hygroscopic film. It is an object of the present invention to provide a method of manufacturing a semiconductor device in which diffusion is prevented and moisture is prevented from remaining in a highly hygroscopic film.

[0035]

According to a method of manufacturing a semiconductor device of the present invention, which solves the above-described problems, at least a part of a wiring material is buried and formed in a connection hole or a groove provided in an interlayer insulating film. In the method, as the interlayer insulating film, a first insulating film having relatively high hygroscopicity and a second insulating film having lower hygroscopicity than the first insulating film are laminated on each other via a moisture permeation preventing film. Forming the connection hole or groove in the interlayer insulating film so that the first insulating film is exposed on at least a part of the inner surface thereof; and forming the connection hole or groove in the inner surface of the connection hole or groove. Performing a heat treatment in a state in which the first insulating film is exposed to release moisture from at least the first insulating film; and, after the heat treatment, burying the wiring material in the connection hole or the groove. Have.

The first insulating film having a relatively high hygroscopicity is formed, for example, by a so-called O ₃ -T formed by a normal pressure chemical vapor deposition method using ozone and tetraethoxysilane as a reaction gas.
EOS film or spin-on-glass film.

As the moisture permeation preventing film, for example,
The number of silicon nitride films or Si—H bonds is 1 × 10 ²¹ / cm ³
The above silicon oxide film can be used.

[0038]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described according to preferred embodiments.

[First Embodiment] First, referring to FIGS. 1 to 4, the present invention is applied to a case where an upper layer wiring material is buried in a connection hole (via hole) between wirings by a high-pressure reflow method. One embodiment will be described.

First, as shown in FIG. 1A, after a predetermined element structure (not shown) or the like is formed on a single crystal silicon semiconductor substrate 1, over the entire surface thereof, for example, mainly silicon oxide (SiO ₂₎ ) Is formed by a CVD method. Next, for example, an Al alloy film such as Al-0.5% Cu is formed on the first interlayer insulating film 2 by a sputtering method, and this Al alloy film is patterned by photolithography and etching. Then, the lower wiring 3 made of an Al alloy film is formed.

Next, as shown in FIG. 1B, an O ₃ -TEOS film 4 having a thickness of, for example, about 600 nm is formed on the entire surface by a normal pressure CVD method using O ₃ and TEOS as a reaction gas.
To form

Thereafter, in this embodiment, in particular, O ₃ -T
Etch-back process of the EOS film 4 is not carried out, but, O ₃ -T
An etch-back step may be performed to further improve the flatness of the EOS film 4. However, even in that case, as shown in the figure,
An etch-back process is performed so that the O ₃ -TEOS film 4 having a sufficient thickness remains on the lower wiring 3.

Next, as shown in FIG. 1C, in this embodiment, the O ₃ -TEOS film 4 is formed by plasma nitridation.
The surface is nitrided, and a silicon nitride film 5 having a thickness of, for example, about 20 to 50 nm is formed on the surface.

This plasma nitriding treatment is performed, for example, by ECR
(Electron cyclotron Resonance) method, for example, under the following conditions. Plasma nitriding conditions Process gas: H ₂ / NH ₃ / Ar = 30/8 /
170 [sccm] Pressure: 0.23 Pa Microwave power: 2800 W Heating temperature: 400 ° C. At this time, N ₂ may be used instead of NH ₃ .

Further, the plasma nitriding treatment may be performed by using another method such as a parallel plate method, a magnetron method and the like. Further, the silicon nitride film 5 may be formed by a thermal nitridation process without using plasma.

[0046] Additionally, O ₃ and -TEOS film 4 surface instead of nitride, O ₃ by -TEOS film 4 CVD method such as plasma CVD on may be formed by depositing a silicon nitride film 5.

Next, as shown in FIG. 2A, PE-SiO _{2 is formed} on the silicon nitride film 5 by a plasma CVD method.
The film 6 is formed to a thickness of, for example, about 400 nm.

Next, as shown in FIG. 2B, the O ₃ -TEOS film 4 is formed by photolithography and RIE.
A _second silicon nitride film 5 and a PE-SiO ₂ film 6
A connection hole 7 having a diameter of, for example, about 0.3 μm reaching the lower wiring 3 is formed at a predetermined position of the interlayer insulating film.

In this RIE, for example, the PE-SiO ₂ film 6, the silicon nitride film 5, and the O ₃ -TEOS film 4 are etched by the following etching conditions (1) → (2) → (1)
The order is as follows. Etching conditions (1) Etching gas: CHF ₃ / O ₂ = 75/8 [sc]
cm] RF power: 1200 W Pressure: 7 Pa Etching conditions (2) Etching gas: CHF ₃ / O ₂ = 75/35 [s]
ccm] RF power: 600 W Pressure: 5 Pa

Next, for example, heat treatment is performed under the following conditions to release moisture from the O ₃ -TEOS film 4. Heat treatment conditions Temperature: 450 ° C. Atmospheric gas: Ar pressure: 133 Pa Heating time: 2 minutes

At this time, in this embodiment, O ₃ -TEO
Silicon nitride film 5 between S film 4 and PE-SiO ₂ film 6
Is provided, the silicon nitride film 5 functions as a moisture permeation preventing film, and the O ₃ -TEOS film 4
Diffusion of water into the O ₂ film 6 is prevented. As a result, O ₃
Substantially all of the moisture in the TEOS film 4 is O ₃ -TE
It is released from the OS film 4 to the outside.

The moisture permeation preventing film used in the present invention preferably has a water permeability of 10% or less, and in the case of a silicon nitride film, preferably has a thickness of 1 to 100 nm. If the thickness of the silicon nitride film is less than 1 nm, a sufficient moisture permeation inhibiting ability may not be obtained, while if the thickness exceeds 100 nm, the silicon nitride film may be peeled off. The thickness of the silicon nitride film is more preferably in the range of 20 to 50 nm. Note that a so-called silicon oxynitride (SiON) film may be used instead of the silicon nitride film.

After this heat treatment, the natural oxide film formed on the surface of the lower wiring 3 at the bottom of the connection hole 7 is removed by, for example, sputter etching using Ar as a process gas.

Next, as shown in FIG.
Over the entire surface of the second interlayer insulating film including the inner surface of, for example, DC
By magnetron sputtering, for example, a film thickness of about 20 n
An underlying conductive film 8 which is a stacked film of mTi and TiN having a thickness of about 50 nm is formed. The film forming conditions of each film are exemplified below. Ti film formation conditions DC power: 6 kW Process gas: Ar 100 sccm Pressure: 0.4 Pa Film formation temperature: 400 ° C. TiN film formation conditions DC power: 12 kW Process gas: Ar 20 sccm, N ₂ 70
sccm Pressure: 0.4 Pa Film forming temperature: 400 ° C.

The underlying conductive film 8 is provided in order to improve the wettability of the upper wiring material to be formed later.
In addition to the laminated structure film of Ti, a single layer film of Ti or TiN, or a laminated structure film of three or more layers of Ti / TiN / Ti may be used. Further, in addition to Ti and TiN, for example, a material such as titanium tungsten (TiW) or tungsten (W) may be used, and these may be used alone or in an appropriate combination.

Next, as shown in the figure, for example, a DC magnetron sputtering method is used to
An upper wiring material 9 made of an Al-Cu film such as 1-0.5% Cu is formed on the entire surface. The film forming conditions are, for example, as follows. Al-Cu film forming conditions DC power: 15 kW Process gas: Ar 100 sccm Pressure: 0.4 Pa Film forming temperature: 400 ° C.

When the upper wiring material 9 is thus formed, the upper wiring material 9 is formed in a bridge shape on the connection hole 7 as shown in the figure, and a void (void) remains in the connection hole 7.

As the upper wiring material 9, in addition to the above-described Al-Cu film, Al-Si (silicon), Al-
An Al alloy film such as Si-Cu or Al-Ge (germanium) or a film of Al alone may be used. In addition, with a material other than the Al-based material, a film containing Cu, Ag (silver), Au (gold), or the like as a main component can be used.

Next, as shown in FIG. 3B, the upper wiring material 9 is pushed into the connection holes 7 by a high-pressure reflow method. The conditions for this high-pressure reflow are, for example, as follows. High pressure reflow conditions Process gas: Ar pressure: 70 MPa Reflow time: 1 minute Substrate temperature: 450 ° C.

At this time, in this embodiment, since the moisture has been sufficiently removed from the O ₃ -TEOS film 4 by the heat treatment described above, the O ₃ -TEOS film 4
Almost no water is released from the water. Also, O
Due to the silicon nitride film 5 provided between the _3- TEOS film 4 and the PE-SiO ₂ film 6, O ₃ -T
Since the diffusion of water from the EOS film 4 to the PE-SiO ₂ film 6 is prevented, the PE-
Almost no moisture is released from the SiO ₂ film 6. Therefore, at the time of this high-pressure reflow, the upper-layer wiring material 9 is reliably pushed into the connection holes 7, and the occurrence of embedding defects due to the release of moisture can be reduced significantly.

For example, in the conventional configuration shown in FIG.
Embedding failure occurs even when the aspect ratio of the connection hole is about 2, while in the configuration shown in FIG. 12, substantially no embedding failure occurs until the aspect ratio of the connection hole is about 3, but the aspect ratio is 3 or more. , A slight embedding failure occurs. On the other hand, in the configuration according to the present embodiment, even if the aspect ratio of the connection hole is 3 or more, substantially no filling failure occurs.

The steps from the above-described heat treatment step for removing moisture to the above-mentioned high-pressure reflow step are continuously performed without releasing the vacuum, for example, by performing the transfer in a lock chamber.

After the connection holes 7 are filled with the upper wiring material 9 by the high-pressure reflow method as described above, as shown in FIG. 4, the upper wiring material 9 and the underlying conductive film 8 are formed by photolithography and etching. Process into a wiring pattern.

In the first embodiment of the present invention described above, the moisture formed of the silicon nitride film 5 is interposed between the O ₃ -TEOS film 4 having high hygroscopicity and the PE-SiO ₂ film 6 having low hygroscopicity. the permeation prevention film is provided, O ₃ from -TEOS film 4 during the heat treatment for the release of water, some of the water from the O ₃ -TEOS film 4 to PE-SiO ₂ film 6 is prevented from diffusing I have. Thereby, substantially all of the moisture is released from the O ₃ -TEOS film 4 to the outside during the heat treatment,
-Water does not diffuse into the SiO ₂ film 6. Therefore, no moisture is released from the PE-SiO ₂ film 6 during the subsequent high-pressure reflow treatment. As a result, the connection holes 7 can be satisfactorily filled with the upper-layer wiring material 9 and the reliability of the wiring can be improved. Performance can be improved.

Further, PE-S is formed on the O ₃ -TEOS film 4.
Since the iO ₂ film 6 is formed, after the connection holes 7 are filled with the upper layer wiring material 9, even if the substrate is brought into contact with the atmosphere,
Substantially no moisture absorption of the O ₃ -TEOS film 4 occurs, so that the lower wiring 3 and the element portion thereunder are not adversely affected by moisture.

These effects are almost the same even when an SOG film, which is also known as a film having excellent flatness and step coverage but high hygroscopicity, is used instead of the O ₃ -TEOS film 4. Is obtained.

In the first embodiment, the case where the connection hole 7 is buried by the high-pressure reflow method has been described.
Even when another reflow technique such as a normal reflow method or a high-temperature sputtering method is used, almost the same effects as described above can be obtained.

As the moisture permeation preventing film, in addition to the silicon nitride film described above, for example, the number of Si—H bonds is 1 ×.
A silicon oxide (SiO ₂ ) film of 10 ²¹ / cm ³ or more can also be used.

SiO ₂ having a very large number of Si—H bonds
The mechanism by which the membrane blocks the permeation of moisture can be explained as follows.

First, the following reaction occurs. Si—H + H ₂ O → Si—OH + H ₂ … (1) Here, when the number of Si—H bonds is relatively small, the following reaction occurs and water is released. Si—OH + Si—OH → Si—O—Si + H ₂ O (2) However, when the number of Si—H bonds is very large, (1)
After expression, Si-H + Si-OH → Si-O-Si + H 2 ↑ ... responds in a (3), the water will not be released.

That is, the expressions (1) and (3) can be summarized as follows: 2Si—H + H ₂ O → Si—O—Si + H ₂ … (4), and water is decomposed to release hydrogen. As a result, the release of water, that is, the permeation is prevented.

Therefore, in order to use this SiO ₂ film as a moisture permeation preventing film, it is necessary that the number of Si—H bonds is very large with respect to moisture. For example, the number of Si—H bonds is 1 × 10 It is necessary to be ²¹ / cm ³ or more.

The SiO ₂ film used for this purpose is preferably formed as a dense film by a plasma CVD method or an ECR plasma CVD method.

The Si—H is formed by ECR plasma CVD.
An example of conditions for forming an SiO ₂ film having a number of bonds of about 2 × 10 ²¹ / cm ³ is shown below. SiO ₂ deposition conditions Microwave: 2.45 GHz, 2.8 kW Process gas: SiH ₄ / O ₂ = 40/55 [sc
cm] Pressure: 0.4 Pa Substrate temperature: 200 ° C. At this time, by increasing the flow rate ratio of SiH ₄ / O ₂ , the number of Si—H bonds in the obtained SiO ₂ film can be increased, and moisture permeation can be achieved. Stopping power can be increased.

[Second Embodiment] Next, a second embodiment of the present invention will be described with reference to FIG. In the second embodiment, portions corresponding to those in the above-described first embodiment are denoted by the same reference numerals as those in the above-described first embodiment.

The second embodiment is an example in which the present invention is applied to a case where an upper layer wiring material is buried in a groove provided in an interlayer insulating film to form a groove wiring.

That is, a groove 10 having a desired upper wiring pattern is formed in the second interlayer insulating film composed of the O ₃ -TEOS film 4, the silicon nitride film 5, and the PE-SiO ₂ film 6 by photolithography and etching. Prior to the formation of the groove 10, a connection hole 7 reaching the lower wiring 3 is formed at a predetermined position in the second interlayer insulating film. Also, the groove 10
Is formed so as to penetrate the silicon nitride film 5 as shown in the figure, so that the O ₃ -TEOS film 4
Is exposed.

Next, a heat treatment is performed in this state, and O ₃ -T
The moisture is removed from the EOS film 4.

Next, a base conductive film 8 made of, for example, TiN / Ti is formed on the entire surface including the inner surface of the groove 10 (and the inner surface of the connection hole 7), and an upper wiring material 9 is further formed thereon. I do.

Next, the upper wiring material 9 is pushed into the groove 10 (and the connection hole 7) by, for example, a reflow method or a high-pressure reflow method. When the upper wiring material 9 is formed by the high-temperature sputtering method, the upper wiring material 9 is formed inside the groove 10 (and in the connection hole 7) when the upper wiring material 9 is formed.
To the inside).

Thereafter, for example, the PE
-The upper wiring material 9 and the underlying conductive film 8 on the SiO ₂ film 6 are removed by polishing.

Through the above steps, the groove 1 of the second interlayer insulating film is formed.
Groove wiring embedded in the groove 0 is formed.

Also in the second embodiment, the O ₃ -TEOS film 4 having high hygroscopicity and the PE-SiO
Silicon nitride film 5 which is provided between the _two films 6, O ₃ -TE
At the time of heat treatment for releasing moisture from the OS film 4, the diffusion of a part of moisture from the O ₃ -TEOS film 4 to the PE-SiO ₂ film 6 is prevented. Therefore, at the time of the heat treatment, substantially all of the water is released from the O ₃ -TEOS film 4 to the outside, and the water does not diffuse into the PE-SiO ₂ film 6. As a result, during the subsequent high-temperature sputtering, reflow or high-pressure reflow, moisture is not released from the PE-SiO ₂ film 6, and the trench 10 (and the connection hole 7) is satisfactorily filled with the upper layer wiring material 9. Thus, the reliability of the wiring can be improved.

Further, PE-S is formed on the O ₃ -TEOS film 4.
Since the iO ₂ film 6 is formed, after the inside of the trench 10 is filled with the upper layer wiring material 9, even if the substrate is brought into contact with the atmosphere, the O
Substantially no moisture absorption of the _3- TEOS film 4 occurs, so that the lower wiring 3 and the element portion thereunder are not adversely affected by moisture.

Note that instead of the O ₃ -TEOS film 4, SO
A G film can be used. Instead of the silicon nitride film 5, for example, a Si film having a Si—H bond number of 1 × 10 ²¹ / cm ³ or more can be used.
The fact that an O ₂ film can be used is the same as in the above-described first embodiment.

[Third Embodiment] Next, a third embodiment of the present invention will be described with reference to FIG. In the third embodiment, portions corresponding to those in the above-described first embodiment are denoted by the same reference numerals as those in the above-described first embodiment.

As shown in FIG. 6, in the third embodiment, a PE-SiO ₂ film 11 is provided under an O ₃ -TEOS film 4 with a silicon nitride film 5 interposed therebetween.

That is, after forming up to the lower wiring 3 in the same manner as in the first embodiment described above, the PE-SiO ₂ film 11 is formed on the entire surface by plasma CVD.
Since the PE-SiO ₂ film 11 has relatively poor flatness, irregularities are formed on the surface of the PE-SiO ₂ film 11 as shown in FIG.

Therefore, after the silicon nitride film 5 is formed on the PE-SiO ₂ film 11, the O ₃ -TEOS film 4 having excellent flatness is further formed thereon to form an interlayer insulating film. Flatten the surface.

Thereafter, a connection hole 7 is formed at a predetermined position in the second interlayer insulating film composed of the O ₃ -TEOS film 4, the silicon nitride film 5, and the PE-SiO ₂ film 11, and the first hole described above is formed.
As in the first embodiment, the connection hole 7 is filled with an upper wiring material (not shown) by a high-pressure reflow method or the like.

Also in the third embodiment, the O ₃ -TEOS film 4 having high hygroscopicity and the PE-SiO
Silicon nitride film 5 which is provided between the _two membranes 11, O ₃ -T
At the time of heat treatment for releasing moisture from the EOS film 4, diffusion of a part of moisture from the O ₃ -TEOS film 4 to the PE-SiO ₂ film 11 is prevented. Therefore, at the time of the heat treatment, the diffusion of moisture from the O ₃ -TEOS film 4 into the PE-SiO ₂ film 11 and the retention of relatively strong moisture in the PE-SiO ₂ film 11 are prevented. During the subsequent high-pressure reflow, reflow, or high-temperature sputtering, the water is prevented from being released from the PE-SiO ₂ film 11. As a result, the connection hole 7 can be satisfactorily filled with the upper layer wiring material, and the reliability of the wiring can be improved.

In the third embodiment, O ₃ −
Since the PE-SiO ₂ film 11 is provided under the TEOS film 4, O ₃ is filled after the connection holes 7 are filled with the upper wiring material.
-Even if the TEOS film 4 absorbs a little moisture,
This prevents the lower wiring 3 and the element portion from being adversely affected.

Note that also in the _third embodiment, O ₃ −
The SOG film can be used instead of the TEOS film 4, and the number of Si—H bonds is 1 instead of the silicon nitride film 5.
The fact that an SiO ₂ film of × 10 ²¹ / cm ³ or more can be used is the same as in the first embodiment described above.

[Fourth Embodiment] Next, a fourth embodiment of the present invention will be described with reference to FIG. In the fourth embodiment, parts corresponding to those in the first and third embodiments are denoted by the same reference numerals as those in the first and third embodiments.

As shown in FIG. 7, in the fourth embodiment, the O ₃ -TEOS film 4 of the _third embodiment described above is used.
PE-SiO ₂ film 1 on the silicon nitride film 12
3 are provided.

That is, the O ₃ − of the third embodiment described above.
After the TEOS film 4 is formed, the silicon nitride film 1 is formed thereon.
2 and a PE-SiO ₂ film 13 is further formed thereon by a plasma CVD method.

Thereafter, a connection hole is formed at a predetermined position in the second interlayer insulating film composed of the PE-SiO ₂ film 13, the silicon nitride film 12, the O ₃ -TEOS film 4, the silicon nitride film 5, and the PE-SiO ₂ film 11. 7, and the connection holes 7 are filled with an upper layer wiring material (not shown) by a high-pressure reflow method or the like, as in the first embodiment described above.

In the fourth embodiment, as shown, the highly hygroscopic O ₃ -TEOS film 4 is sandwiched from above and below by the lowly hygroscopic PE-SiO ₂ films 13 and 11. Therefore, even if the substrate is brought into contact with the atmosphere after the connection hole 7 is filled with the upper layer wiring material, the upper layer P
Since the E-SiO ₂ film 13 prevents the O ₃ -TEOS film 4 from absorbing moisture, and the lower PE-SiO ₂ film 11 protects the lower wiring 3 and the element portion thereunder.
Even if the O ₃ -TEOS film 4 absorbs some moisture, adverse effects on the lower wiring 3 and the element portion due to the moisture absorption can be more reliably prevented.

The O ₃ -TEOS film 4 and the upper and lower PE-
Between the SiO ₂ film 13 and 11, respectively, since there is provided a moisture permeation preventing film made of a silicon nitride film 12 and 5, during the heat treatment for releasing water from the O ₃ -TEOS film 4, the O ₃ -From the TEOS film 4, any PE
The diffusion of moisture into -SiO ₂ films 11 and 13 is prevented, the high pressure reflow after, during reflow or high temperature sputtering, the release of moisture from either PE-SiO ₂ films 11 and 13 is also prevented. As a result, the connection hole 7 can be satisfactorily filled with the upper layer wiring material, and the reliability of the wiring can be improved.

Note that also in the fourth embodiment, O ₃ −
The SOG film can be used instead of the TEOS film 4, and the number of Si—H bonds is 1 instead of the silicon nitride film 5.
The fact that an SiO ₂ film of × 10 ²¹ / cm ³ or more can be used is the same as in the above-described first and third embodiments.

Although the present invention has been described with reference to the preferred embodiments, the present invention is not limited to the above-described embodiments. For example, in the above-described embodiment, the case where the upper layer wiring material is buried in the connection hole (so-called via hole) or groove provided in the interlayer insulating film between the upper and lower wiring layers has been described. The present invention is also applicable to a case where a connection hole (so-called contact hole) or a groove provided in an interlayer insulating film between them is filled with a wiring layer.

[0102]

According to the present invention, when at least a part of a wiring material is buried in a connection hole or a groove provided in an interlayer insulating film, the first insulating film having a relatively high hygroscopic property constituting the interlayer insulating film is formed. A moisture permeation preventing film is provided between the film and the second insulating film having a lower hygroscopicity than the first insulating film, and the first insulating film is provided on the inner surface of the connection hole or groove provided in the interlayer insulating film. Is heat-treated in a state in which is exposed to release moisture from at least the first insulating film, and thereafter, the connection holes or the grooves are filled with a wiring material.

Therefore, moisture can be effectively removed from the first insulating film during the heat treatment, and the diffusion of moisture from the first insulating film to the second insulating film is prevented by the moisture permeation preventing film. Relatively high-temperature treatment for filling the connection holes or grooves with a wiring material, for example, in which the moisture which is diffused from the first insulating film to the second insulating film and held by the second insulating film and which is relatively hard to release is filled with the wiring material. Sometimes, emission from the second insulating film is prevented. As a result, the connection hole or the groove can be more reliably filled with the wiring material, the reliability of the wiring is improved, and the production yield is improved.
Manufacturing costs can be reduced.

Further, even a connection hole or a trench having a relatively high aspect ratio can be reliably filled with a wiring material, which greatly contributes to miniaturization and high integration of a semiconductor device.

[Brief description of the drawings]

FIG. 1 is a sectional view illustrating a method for manufacturing a semiconductor device according to a first embodiment of the present invention in the order of steps.

FIG. 2 is a sectional view illustrating a method of manufacturing the semiconductor device according to the first embodiment of the present invention in the order of steps.

FIG. 3 is a sectional view illustrating the method of manufacturing the semiconductor device according to the first embodiment of the present invention in the order of steps.

FIG. 4 is a sectional view illustrating the method for manufacturing the semiconductor device according to the first embodiment of the present invention;

FIG. 5 is a sectional view illustrating the method for manufacturing the semiconductor device according to the second embodiment of the present invention.

FIG. 6 is a sectional view illustrating the method for manufacturing the semiconductor device according to the third embodiment of the present invention.

FIG. 7 is a sectional view illustrating the method for manufacturing the semiconductor device according to the fourth embodiment of the present invention;

FIG. 8 is a cross-sectional view showing a conventional method of manufacturing a semiconductor device in the order of steps.

FIG. 9 is a cross-sectional view showing a conventional method for manufacturing a semiconductor device in the order of steps.

FIG. 10 is a sectional view showing a conventional method for manufacturing a semiconductor device in the order of steps.

FIG. 11 is a conceptual diagram showing a problem of a conventional semiconductor device manufacturing method.

FIG. 12 is a cross-sectional view illustrating a manufacturing method obtained by improving a conventional method of manufacturing a semiconductor device.

FIG. 13 is a conceptual diagram showing a problem of a manufacturing method obtained by improving a conventional semiconductor device manufacturing method.

FIG. 14 is a graph showing a problem of a conventional method of manufacturing a semiconductor device.

[Explanation of symbols]

1 ... silicon substrate, 2 ... first interlayer insulating film, 3 ... lower wiring, 4 ... O ₃ -TEOS film, 5,12 ... silicon nitride film, 6,11,13 ... PE-SiO ₂ film, 7 ... connection hole ,
8 ... underlying conductive film, 9 ... upper wiring material, 10 ... groove

Claims (14)

[Claims] 1. A method of manufacturing a semiconductor device in which at least a part of a wiring material is buried in a connection hole or a groove provided in an interlayer insulating film, wherein the first insulating film having relatively high hygroscopicity is used as the interlayer insulating film. And a second insulating film having a lower hygroscopicity than the first insulating film are laminated on each other via a moisture permeation preventing film, and the connection hole or the groove is formed in the interlayer insulating film. Forming the first insulating film so as to expose at least a part of the first insulating film; and performing heat treatment in a state where the first insulating film is exposed on the inner surface of the connection hole or the groove, and performing at least the first A method of manufacturing a semiconductor device, comprising: releasing moisture from an insulating film of the above; 2. The semiconductor device according to claim 1, wherein the first insulating film is formed by a normal pressure chemical vapor deposition method using ozone and tetraethoxysilane as a reaction gas. Method. 3. The method according to claim 1, wherein the first insulating film is formed of a spin-on-glass film. 4. The method for manufacturing a semiconductor device according to claim 1, wherein a silicon oxide film is formed as said second insulating film by a plasma enhanced chemical vapor deposition method. 5. The method according to claim 1, wherein a silicon nitride film is used as the moisture permeation preventing film. 6. The method according to claim 5, wherein the silicon nitride film is formed by nitriding a surface of the first or second insulating film. 7. The method according to claim 5, wherein the silicon nitride film is formed by a chemical vapor deposition method. 8. The method for manufacturing a semiconductor device according to claim 1, wherein a silicon oxide film having a Si—H bond number of 1 × 10 ²¹ / cm ³ or more is used as the moisture permeation preventing film. 9. The method according to claim 8, wherein the silicon oxide film is formed by a plasma enhanced chemical vapor deposition method. 10. The method according to claim 1, wherein the wiring material is embedded in the connection hole or the groove by a reflow method, a high-temperature sputtering method, or a high-pressure reflow method. 11. The wiring material includes aluminum,
The method according to claim 1, wherein a material containing at least one selected from the group consisting of copper, silver, and gold is used. 12. The method according to claim 1, wherein when burying the wiring material, a base film having good wettability of the wiring material is formed at least on an inner surface of the connection hole or the groove.
13. The method for manufacturing a semiconductor device according to item 5. 13. The semiconductor device according to claim 12, wherein at least one selected from the group consisting of a titanium film, a titanium nitride film, a titanium-tungsten film, and a tungsten film is used as the underlayer. Manufacturing method. 14. The method according to claim 1, wherein, after the heat treatment, at least until the wiring material is buried in the connection hole or the groove, the interlayer insulating film is not brought into contact with the atmosphere.
13. The method for manufacturing a semiconductor device according to item 5.