JPH06349950A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To prevent gas from going out through the exposed side wall of a hole provided to an interlayer insulating film in a heat treatment process. CONSTITUTION:A nitride film 13 is deposited on an exposed surface which includes the inner wall of a viahole 5 provided to a second interlayer insulating film 4 which is interposed between a first wiring layer 2 and a second wiring layer 7 formed on a semiconductor substrate 1. When a conductive layer 6 which electrically connects the first wiring layer 2 and the second wiring layer 7 together is formed by burying a conductive material through a CVD growth method, the nitride film 13 prevents the growth failure of conductive material caused by gas that goes out through the second interlayer insulating film 4.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor manufacturing device having a multilayer wiring structure.

[0002]

2. Description of the Related Art With the high integration of LSIs, improvement in multilayer wiring technology has been strongly desired. In particular, as the aspect ratio of the via hole provided for electrically connecting the upper and lower two wiring layers is increased, the reliability of the via hole is significantly deteriorated. As a method for solving this problem, a structure in which a via hole is filled with a metal film has been developed by using a selective CVD method. Less than,
A conventional example of a method for manufacturing the structure of this semiconductor device is shown in FIGS.
25 will be described.

In FIG. 25, 1 is a semiconductor substrate made of Si or the like, 2 is a first interlayer insulating film made of a silicon oxide film or the like formed on the surface of the semiconductor substrate 1, and 3 is this first interlayer insulating film. A first wiring layer 4 formed partially of an Al alloy or the like is formed on the surfaces of the first wiring layer and the first interlayer insulating film, and is made of a silicon oxide film or the like. Second insulating film 4a, a second insulating film 4b made of an SOG (Spin on Glass) film, and a third insulating film 4c made of a silicon oxide film, etc.
Reference numeral 5 is a hole (via hole) reaching from the surface of the second interlayer insulating film 4 to the surface of the first wiring layer 3, and 6 is a metal film such as tungsten embedded in the via hole. A conductive material 7 is a second wiring layer made of the conductive material and an Al alloy or the like formed on the surface of the second interlayer insulating film 4.

Next, a method of manufacturing the semiconductor device having the above structure will be described. First, as shown in FIG. 21, the first interlayer insulating film 2 is formed on the surface of the semiconductor substrate 1 by CV.
It is formed by the D method. Then, an Al alloy film is formed on the surface of the first interlayer insulating film 2 by using a sputtering method or the like, and the first wiring layer 3 is formed by using photoengraving and etching techniques. Next, after forming a silicon film 4a which is a first insulating film by a CVD method or the like, a second insulating film 4b which is an SOG film is formed by a spin coating method and further a silicon oxide film which is a third insulating film. By forming 4c by a CVD method or the like, a second interlayer insulating film 4 having a three-layer structure is formed. Here, the second insulating film 4b made of an SOG film is formed for flattening the step, and the first insulating film 4a and the third insulating film 4c are the SOG film.
It is formed in order to prevent the deterioration of the 4b by reacting with the wiring layer 3 and the like.

Next, as shown in FIG. 22, a via hole 5 which is a hole reaching the surface of the first wiring layer 3 is formed in the second interlayer insulating film 4 by photolithography and etching. To form. As shown in FIG. 23, the inside of the via hole 5 is exposed to the Bcl ₃ plasma 8 to remove the natural oxide film formed on the surface of the first wiring layer 3. Next, as shown in FIG. 24, after chlorine adsorbed on the exposed surface of the first wiring layer 3 is released by annealing,
A conductive material 6 such as tungsten is embedded in the via hole 5 by the selective CVD method. Then, as shown in FIG. 25, an Al alloy film is formed on the surfaces of the conductive material 6 and the second interlayer insulating film 4 by using a sputtering method or the like, and the second wiring is formed by using photoengraving and etching techniques. Form the layer 7.

[0006]

Since the conventional semiconductor device is constructed as described above, the second interlayer insulating film 4, particularly the SOG, is formed when the conductive material 6 such as tungsten is formed by the selective CVD method. Since water, hydrocarbons and the like adsorbed in the film of the film 4b are desorbed and affect the growth of tungsten by the selective CVD method, there is a problem that the growth of the conductive material 6 such as tungsten is defective. Also,
The exposed surface of the first wiring layer 3 is re-oxidized by desorption of adsorbed gas, especially water, even after annealing after the Bcl ₃ plasma 8 treatment, and the conductive material filling the first wiring layer 3 and the via holes. There was a problem in that the electric resistance between No. 6 and 6 increased, causing a defect.

The present invention has been made to solve the above problems, and an object of the present invention is to obtain a semiconductor device capable of preventing the influence of desorption of adsorbed gas in the second interlayer insulating film and a method of manufacturing the same. It is what

[0008]

A semiconductor device according to a first aspect of the present invention is a wiring layer formed on a first interlayer insulating film formed on a semiconductor substrate, and a wiring layer formed on the wiring layer and a wiring layer formed on the wiring layer. A second interlayer insulating film having a hole reaching from the surface to the surface of the wiring layer, and the exposed surface including at least the side surface of the hole of the second interlayer insulating film. A nitride is formed and a conductive layer made of a conductive material is embedded inside the hole.

A method of manufacturing a semiconductor device according to a second aspect of the present invention comprises a step of forming a first interlayer insulating film on a semiconductor substrate and a step of forming a wiring layer on the first interlayer insulating film. And a step of forming a second interlayer insulating film on the wiring layer and the first interlayer insulating film, and a step of forming a hole from the surface of the second interlayer insulating film to the surface of the wiring layer. The step of nitriding the exposed surface of the second interlayer insulating film including at least the side surface of the hole and the step of embedding a conductive material in the hole of the second interlayer insulating film are provided.

A method of manufacturing a semiconductor device according to a third aspect of the present invention comprises a step of forming a first interlayer insulating film on a semiconductor substrate and a step of forming a wiring layer on the first interlayer insulating film. A step of forming a second interlayer insulating film on the wiring layer and the first interlayer insulating film, and a step of forming a hole from the surface of the second interlayer insulating film to the surface of the wiring layer,
Depositing a nitride film on the surface of the second interlayer insulating film including the hole and the surface of the wiring layer, and removing the nitride film except the side surface portion of the hole of the second interlayer insulating film; And a step of embedding a conductive material in the hole of the interlayer insulating film.

A method of manufacturing a semiconductor device according to a fourth aspect of the present invention comprises a step of forming a first interlayer insulating film on a semiconductor substrate and a step of forming a wiring layer on the first interlayer insulating film. A step of forming a second interlayer insulating film on the wiring layer and the first interlayer insulating film, and a step of forming a hole from the surface of the second interlayer insulating film to the surface of the wiring layer, A step of annealing in a vacuum, a step of removing the oxide film on the first wiring layer without breaking the vacuum, and a conductive material inside the hole of the second interlayer insulating film without breaking the vacuum. And a step of embedding.

[0012]

In the first aspect of the present invention, the nitride formed on the exposed surface including the side surface of the hole of the second interlayer insulating film is
Gas is prevented from desorbing from the second interlayer insulating film.

In the second aspect of the present invention, the nitride is formed on at least the side surface of the hole in the second interlayer insulating film by the step of nitriding the exposed surface including the side surface of the hole of the second interlayer insulating film. In the subsequent steps, the gas is prevented from desorbing from the second interlayer insulating film.

In a third aspect of the present invention, the step of depositing a nitride film on the side surface of the hole of the second interlayer insulating film
Nitride is formed on the side surface of the hole of the second interlayer insulating film to prevent gas from desorbing from the second interlayer insulating film in the subsequent steps.

In the fourth aspect of the present invention, after performing the annealing in a vacuum, the step of removing the oxide film of the wiring layer and the step of filling the conductive material are continuously performed without breaking the vacuum, By annealing, the adsorbed gas in the second interlayer insulating film is released, and the subsequent steps are performed in the state where the adsorbed gas is not released.

[0016]

EXAMPLES Example 1. A first embodiment of the semiconductor device of the present invention will be described below with reference to FIG. In the figure, 1 is Si
Such as a semiconductor substrate, 2 is a first interlayer insulating film made of a silicon oxide film or the like formed on the surface of the semiconductor substrate 1, and 3 is partially formed on the first interlayer insulating film.
The first wiring layers 4 made of Al alloy or the like are formed on the surfaces of the first wiring layer and the first interlayer insulating film 2, and the first insulating film 4a made of a silicon oxide film and SOG ( Sp
(In on Glass) film, a second insulating film 4b made of a three-layer structure of a second insulating film 4b made of a silicon oxide film and a third insulating film 4c made of a silicon oxide film. A hole (via hole) reaching from the surface to the surface of the first wiring layer 3, 6 is a conductive layer of a conductive material made of a metal film such as tungsten embedded in the via hole 5, and 7 is this conductive layer. And a second wiring layer made of Al alloy or the like formed on the surface of the second interlayer insulating film 4, and 13 is a Si nitride film formed on the surface of the second interlayer insulating film.

Since the Si nitride film 13 has low gas permeability, by covering the entire surface of the second interlayer insulating film 4, the gas is released from the second interlayer insulating film 4, especially the SOG film 4b. Since it has a suppressing effect, in the heat treatment such as when the conductive layer 6 is grown by the selective CVD method,
It is possible to prevent the growth failure due to the released gas, the growth failure of the conductive material at the time of forming the conductive layer 6 and the oxidation of the surface of the first wiring layer 3, and the first wiring layer 3 and the second wiring layer. The electrical connection with 7 is improved.

Example 2. Next, a method of manufacturing the semiconductor device configured as in the first embodiment will be described with reference to FIGS. As shown in FIG. 2, the semiconductor substrate 1
A first interlayer insulating film 2 is formed on the surface of by the CVD method.
Next, an Al alloy film is formed on the surface of the first interlayer insulating film 2 by using a sputtering method or the like, and the first wiring layer 3 is formed by using photoengraving and etching techniques. Next, CV
After forming the silicon insulating film 4a which is the first insulating film by the D method or the like, the second insulating film 4b made of the SOG film is formed by the spin coating method, and the silicon oxide film 4c which is the third insulating film is further formed. The second interlayer insulating film 4 having a three-layer structure is formed by forming it by the CVD method or the like. Here, the second insulating film 4b made of an SOG film is formed to flatten the step, and the first insulating film 4a and the third insulating film 4c are the same as the SOG film 4b in the wiring layer. It is formed to prevent deterioration due to reaction with 3 or the like.

Next, as shown in FIG. 3, a via hole 5 which is a hole reaching the surface of the first wiring layer 3 is formed in the second interlayer insulating film 4 by photolithography and etching. To form. As shown in FIG. 4, the state shown in FIG. 3 is exposed to nitrogen plasma 11 while being heated to about 300.degree. The processing conditions at this time are, for example, a nitrogen flow rate of 30 sc
cm, pressure 30 mtorr, RF power 100 W, processing time about 3 minutes. Since this plasma treatment is performed while heating the substrate in a reduced pressure state (about 30 mtorr), water and hydrocarbons adsorbed in the second interlayer insulating film 4, especially the SOG film 4b are effectively released. Then, the Si nitride film (SiN) 13 is formed on the exposed surface of the second interlayer insulating film 4 by the reaction of Si and N ₂ contained in the second interlayer insulating film 4. Since this Si nitride film 13 is formed, when this state is exposed to the atmosphere,
It is possible to prevent the gas such as water from being adsorbed by the second interlayer insulating film 4 again and prevent the residual gas in the second interlayer insulating film 4 from being released during the subsequent process.

Next, as shown in FIG.
The native oxide film formed on the surface of the first wiring layer 3 is removed by exposing the inside of the substrate to the Bcl ₃ plasma 8. Next, as shown in FIG. 6, after chlorine adsorbed on the first wiring layer 3 is released by annealing, a conductive material such as tungsten is embedded in the via hole 5 by a selective CVD method to form the conductive layer 6. Form. Then, as shown in FIG. 7, an Al alloy film is formed on the surfaces of the conductive layer 6 and the second interlayer insulating film 4 by using a sputtering method or the like, and the second wiring is formed by using photoengraving and etching techniques. Form the layer 7.
In each of the above steps, since the release of gas from the second interlayer insulating film 4 can be prevented by the Si nitride film, the growth of the conductive material by the selective CVD method for forming the conductive layer 6 was shown in the conventional example. It is possible to prevent the growth failure due to the influence of the gas from the second interlayer insulating film. Further, also in the annealing step after the Bcl ₃ plasma 8 treatment, it is possible to prevent the surface of the first wiring layer 3 from being re-oxidized by a gas such as water.

Example 3. A method of manufacturing a semiconductor device according to a third embodiment of the present invention will be described with reference to FIGS. As shown in FIGS. 8 and 9, the steps up to forming the via hole 5 in the second interlayer insulating film 4 are the same as those in the second embodiment. Next, as shown in FIG. 10, while heating the substrate to 300 ° C. in an ammonia (NH ₃ ) atmosphere, for example, in an atmosphere with an ammonia flow rate of 1 SLM and a pressure of 0.5 torr, with respect to the exposed surface of the second interlayer insulating film 4, Irradiate UV light (ultraviolet ray) 12 for about 5 minutes. This process is under reduced pressure (0.5tor
Since it is performed while heating the substrate at about r), water and hydrocarbons adsorbed in the second interlayer insulating film 4, especially the SOG film 4b are effectively released. Then, the Si nitride film (SiN) 13 is formed on the exposed surface of the second interlayer insulating film 4 by the reaction of Si and N ₂ contained in the second interlayer insulating film 4. Since this Si nitride film 13 is formed, when this state is exposed to the atmosphere, a gas such as water is prevented from being again adsorbed by the second interlayer insulating film 4, and the second interlayer insulating film 4 is prevented. Similar to the second embodiment, the residual gas in the insulating film 4 can be prevented from being released during the subsequent process.

Subsequent steps are the same as those in the second embodiment.
As shown in FIG. 1, the inside of the via hole 5 is exposed to the Bcl ₃ plasma 8 to remove the natural oxide film formed on the surface of the first wiring layer 3. Then, as shown in FIG. 12, after chlorine adsorbed on the first wiring layer 3 is released by annealing, a conductive material such as tungsten is embedded in the via hole 5 by a selective CVD method to form the conductive layer 6. Form. Then, as shown in FIG.
Then, an Al alloy film is formed on the surface of the second interlayer insulating film 4 by using a sputtering method or the like, and the second wiring layer 7 is formed by using photoengraving and etching techniques. Moreover, the effect in each step is similar to that of the second embodiment.

Example 4. A semiconductor device manufacturing method according to a fourth embodiment of the present invention will be described with reference to FIGS. As shown in FIGS. 14 and 15, the steps up to forming the via hole 5 in the second interlayer insulating film 4 are the same as those in the above-described second and third embodiments. Next, as shown in FIG. 16, a Si nitride film (SiN) 13 is formed on the entire exposed surface of the second interlayer insulating film 4 by the plasma CVD method. The processing conditions at this time are, for example, a mixed gas of silane (SiH ₄ ) and ammonia (NH ₃ ) with a pressure ratio of about 1 torr and a flow ratio of 1: 1 at a substrate temperature of about 300 ° C. A thick film is formed. Needless to say, other film forming conditions can be used. This process is performed under reduced pressure (1
Since it is performed while heating the substrate at about (torr), water and hydrocarbon adsorbed in the second interlayer insulating film 4, especially the SOG film 4b are effectively released. Then, a Si nitride film (SiN) 13 is formed on the exposed surface of the second interlayer insulating film 4. This Si nitride film
Since 13 is formed, when the gas in this state is exposed to the atmosphere, the gas such as water is prevented from being adsorbed to the second interlayer insulating film 4 again, and the inside of the second interlayer insulating film 4 is prevented. It is the same as in Embodiments 2 and 3 in that the residual gas can be prevented from being released during the subsequent process. Further, since the thickness of the Si nitride film (SiN) 13 can be freely set, the effect of preventing gas adsorption can be enhanced.

Next, as shown in FIG. 17, anisotropic dry etching is applied to a region of the via hole 5 excluding the side surface.
Etch-back of Si nitride film (SiN) 13, via hole 5
Si nitride film (SiN) 13 is left only on the side surface of the. Subsequent steps are the same as those in Examples 2 and 3, and as shown in FIG. 18, by exposing the inside of the via hole 5 to Bcl ₃ plasma 8, it was formed on the surface of the first wiring layer 3. Remove the natural oxide film. Then, as shown in FIG. 19, chlorine adsorbed on the first wiring layer 3 is released by annealing, and then a conductive material such as tungsten is embedded in the via hole 5 by a selective CVD method to form a conductive layer 6. To do. Then, as shown in FIG. 20, an Al alloy film is formed on the surfaces of the conductive layer 6 and the second interlayer insulating film 4 by using a sputtering method or the like, and the second wiring is formed by using photoengraving and etching techniques. Form the layer 7. In addition, the effect of each step is the same as in the second embodiment.
And 3 are the same. In this embodiment, plasma C
The Si nitride film (SiN) 13 was formed by VD, but another method,
For example, it may be formed by atmospheric pressure CVD or the like.

Example 5. A semiconductor device manufacturing method according to a fifth embodiment of the present invention will be described. In the fifth embodiment,
Since the basic steps are almost the same as those shown in the conventional example, they will be described with reference to FIGS. In the step shown in FIG. 22, after forming the via hole 5 in the second interlayer insulating film 4, in a high vacuum of about 10 ⁻⁵ torr, 400 ° C.
Heat for about 10 minutes. After that, the following steps are continuously performed in a high vacuum state without exposing the state shown in FIG. 22 to the atmosphere. That is, as shown in FIG.
By exposing to Bcl ₃ plasma 8, the natural oxide film formed on the surface of the first wiring layer 3 is removed, and chlorine adsorbed to the first wiring 3 is released by annealing, as shown in FIG. The process of filling the inside of the via hole 5 with a conductive material such as tungsten by the selective CVD method to form the conductive layer 6 is continuously performed while maintaining a high vacuum. The subsequent steps shown in FIG. 24 are similar to those of the conventional example.

In the fifth embodiment, the gas adsorbed on the second interlayer insulating film 4 is released by performing a heat treatment in high vacuum after forming the via hole 5.
Then, by up to the step of forming the conductive layer 6 without exposing it to the atmosphere, it is possible to prevent a gas such as water from being newly adsorbed in the second interlayer insulating film 4. Therefore, a process of embedding a conductive material by selective CVD and
It is possible to prevent the influence of degassing from the second interlayer insulating film 4 described in the conventional example in the annealing process after the BCl ₃ treatment. In each of the above examples, the conductive material 6
Although tungsten is used as the material, molybdenum, tantalum, aluminum, copper, or the like may be used, or an alloy of these metals or a silicide compound may be used.

[0027]

According to the first aspect of the present invention, the nitride film is formed on the exposed surface including the side surface of the hole of the second interlayer insulating film.
This nitride film can prevent release of gas from the second interlayer insulating film, prevent growth failure during filling of the conductive material due to degassing, and prevent oxidation of the surface of the first wiring layer due to degassing. There is an effect that the electrical connection between the one wiring layer and the conductive layer embedded in the hole can be surely performed and the reliability can be improved.

In the second aspect of the present invention, since the step of nitriding the exposed surface including the side surface of the hole of the second interlayer insulating film is provided, the nitride film is formed on the side surface of the hole in the second interlayer insulating film. It is possible to prevent the release of gas from the second interlayer insulating film in the process including the subsequent heat treatment, and to prevent the growth of the first interlayer insulating film due to the growth failure and the degassing during the filling of the conductive material by the degassing from the second interlayer insulating film. The surface of the wiring layer can be prevented from oxidation,
There is an effect that the electrical connection between the first wiring layer and the conductive layer embedded in the hole can be surely performed and the reliability can be improved.

According to the third aspect of the present invention, since the step of depositing the nitride film on the exposed surface including the side surface of the hole of the second interlayer insulating film is provided, the side surface of the hole in the second interlayer insulating film is nitrided. Gas is prevented from being released from the second interlayer insulating film in the subsequent process including heat treatment, and growth failure or degassing due to degassing from the second interlayer insulating film when the conductive material is embedded. This has an effect that the surface of the first wiring layer can be prevented from being oxidized, the electrical connection between the first wiring layer and the conductive layer embedded in the hole can be surely performed, and the reliability can be improved.

In a fourth aspect of the present invention, after forming a hole in the second interlayer insulating film, heat treatment is performed in a high vacuum to release the gas adsorbed in the second interlayer insulating film,
Since the process up to the step of embedding the conductive material in the hole without exposing to the atmosphere is performed thereafter, it is possible to prevent the gas such as water from being newly adsorbed in the second interlayer insulating film, and in the process including the subsequent heat treatment. Also, there is an effect that gas is not released from the second insulating film, electrical connection between the first wiring layer and the conductive layer embedded in the hole can be surely performed, and reliability can be improved.

[Brief description of drawings]

FIG. 1 is a sectional view of a semiconductor device showing a first embodiment of the present invention.

FIG. 2 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the second embodiment of the present invention in the order of steps.

FIG. 3 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the second embodiment of the present invention in the order of steps.

FIG. 4 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the second embodiment of the present invention in the order of steps.

5A to 5C are cross-sectional views showing a method of manufacturing a semiconductor device according to the second embodiment of the present invention in the order of steps.

FIG. 6 is a cross-sectional view showing the method of manufacturing a semiconductor device according to the second embodiment of the present invention in the order of steps.

FIG. 7 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the second embodiment of the present invention in the order of steps.

FIG. 8 is a sectional view showing a method of manufacturing a semiconductor device according to a third embodiment of the present invention in the order of steps.

FIG. 9 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the third embodiment of the present invention in the order of steps.

FIG. 10 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the third embodiment of the present invention in the order of steps.

FIG. 11 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the third embodiment of the present invention in the order of steps.

FIG. 12 is a cross-sectional view showing the method of manufacturing the semiconductor device in the process order of the third embodiment of the present invention.

FIG. 13 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the third embodiment of the present invention in the order of steps.

FIG. 14 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the fourth embodiment of the present invention in the order of steps.

FIG. 15 is a cross-sectional view showing the method of manufacturing the semiconductor device in the process order of the fourth embodiment of the present invention.

FIG. 16 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the fourth embodiment of the present invention in the order of steps.

FIG. 17 is a sectional view showing the method of manufacturing the semiconductor device according to the fourth embodiment of the present invention in the order of steps.

FIG. 18 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the fourth embodiment of the present invention in the order of steps.

FIG. 19 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the fourth embodiment of the present invention in the order of steps.

FIG. 20 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the fourth embodiment of the present invention in the order of steps.

FIG. 21 is a sectional view showing the method of manufacturing the conventional semiconductor device in the order of steps.

FIG. 22 is a sectional view showing the method of manufacturing the conventional semiconductor device in the order of steps.

FIG. 23 is a cross-sectional view showing the method of manufacturing the conventional semiconductor device in the order of steps.

FIG. 24 is a cross-sectional view showing the method of manufacturing the conventional semiconductor device in the order of steps.

FIG. 25 is a cross-sectional view showing the method of manufacturing the conventional semiconductor device in the order of steps.

[Explanation of symbols]

 1 Semiconductor Substrate 2 First Interlayer Insulating Film 3 First Wiring Layer 4 Second Interlayer Insulating Film 5 Holes (Via / Hole) 6 Conductive Material 13 Si Nitride Film

Claims (4)

[Claims] 1. A first interlayer insulating film formed on a semiconductor substrate, a wiring layer formed on the first interlayer insulating film, and a wiring layer formed on the wiring layer and the first interlayer insulating film. A second interlayer insulating film having a hole reaching from the surface to the surface of the wiring layer, a nitride film formed on an exposed surface of at least the side surface of the hole of the second interlayer insulating film, the second interlayer insulating film A semiconductor device comprising a conductive layer made of a conductive material embedded in the hole of an interlayer insulating film. 2. A step of forming a first interlayer insulating film on a semiconductor substrate, a step of forming a wiring layer on the first interlayer insulating film, and a step of forming a wiring layer on the wiring layer and the first interlayer insulating film. Including a step of forming a second interlayer insulating film, a step of forming a hole from the surface of the second interlayer insulating film to the surface of the wiring layer, and a side surface of at least the hole of the second interlayer insulating film. A method of manufacturing a semiconductor device, comprising: a step of nitriding an exposed surface; and a step of burying a conductive material in the hole of the second interlayer insulating film. 3. A step of forming a first interlayer insulating film on a semiconductor substrate, a step of forming a wiring layer on the first interlayer insulating film, and a step of forming a wiring layer on the wiring layer and the first interlayer insulating film. Forming a second interlayer insulating film, forming a hole from the surface of the second interlayer insulating film to the surface of the wiring layer, the surface of the second interlayer insulating film including the hole, and A step of depositing a nitride film on the surface of the wiring layer, a step of removing the nitride film except for a side surface portion of the hole of the second interlayer insulating film, and a conductive material inside the hole of the second interlayer insulating film. A method for manufacturing a semiconductor device, comprising a step of embedding a semiconductor. 4. A step of forming a first interlayer insulating film on a semiconductor substrate, a step of forming a wiring layer on the first interlayer insulating film, and a step of forming a wiring layer on the wiring layer and the first interlayer insulating film. The step of forming a second interlayer insulating film, the step of forming a hole from the surface of the second interlayer insulating film to the surface of the wiring layer, the step of annealing in a vacuum, the above without breaking the vacuum. 2. A method of manufacturing a semiconductor device, comprising: a step of removing an oxide film on the first wiring layer; and a step of burying a conductive material in the hole of the second interlayer insulating film without breaking the vacuum.