JPH10242510A - Semiconductor light emitting element and its manufacture - Google Patents

Semiconductor light emitting element and its manufacture

Info

Publication number
JPH10242510A
JPH10242510A JP4633797A JP4633797A JPH10242510A JP H10242510 A JPH10242510 A JP H10242510A JP 4633797 A JP4633797 A JP 4633797A JP 4633797 A JP4633797 A JP 4633797A JP H10242510 A JPH10242510 A JP H10242510A
Authority
JP
Japan
Prior art keywords
layer
light emitting
emitting device
semiconductor
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4633797A
Other languages
Japanese (ja)
Other versions
JP3332785B2 (en
Inventor
Hiroyuki Hosobane
弘之 細羽
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP4633797A priority Critical patent/JP3332785B2/en
Priority to TW087102739A priority patent/TW472399B/en
Priority to DE19808446A priority patent/DE19808446C2/en
Priority to KR1019980006570A priority patent/KR100329054B1/en
Priority to CNB981062644A priority patent/CN1151562C/en
Publication of JPH10242510A publication Critical patent/JPH10242510A/en
Application granted granted Critical
Publication of JP3332785B2 publication Critical patent/JP3332785B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To improve the luminous efficiency and reliability of a semiconductor light emitting element, by correcting the lattice distortion of a Ga1-x Inx P(0<x<1) current diffusing layer by forming the current diffusing layer on a laminated semiconductor structure. SOLUTION: After an n-type GaAs buffer layer 2 is formed on an n-type GaAs substrate 1, a laminated semiconductor structure 12 composed of an n-type AlGaInP clad layer 3, an AlGaInP active layer 4, and a p-type AlGaInP clad layer 5 is formed on the buffer layer 2, and a p-type Ga1-x Inx P(0<x<1) current diffusing layer 6 is formed on the structure 12. A p-type electrode 11 is provided on the central part of the layer 6, and an n-type electrode 10 is provided on the whole lower surface of the substrate 1. Therefore, the luminous efficiency and reliability of a semiconductor light emitting element thus constituted can be improved, because the crystal defect in the current diffusing layer 6 can be reduced and, at the same time, the crystal defect resulting from the dislocation of the active layer 4, etc., constituting the light emitting section of the element can be reduced.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、例えば発光ダイオ
ード等の半導体発光素子およびその製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device such as a light emitting diode and a method for manufacturing the same.

【0002】[0002]

【従来の技術】従来、AlGaInP系半導体材料を用
いた半導体発光素子は、可視領域用の発光素子として用
いられている。その理由は、AlGaInP系材料にお
いては、GaAs基板と格子整合が可能であること、I
II−V族化合物半導体の中で最も直接遷移のバンドギ
ャップが大きいこと等の特徴を有しているためである。
特に、発光ダイオードでは、550nmから690nm
の範囲で直接遷移型の発光を行うため、高い発光効率を
得ることができる。
2. Description of the Related Art Conventionally, a semiconductor light emitting device using an AlGaInP-based semiconductor material has been used as a light emitting device for a visible region. The reason is that AlGaInP-based materials can be lattice-matched with a GaAs substrate.
This is because it has the feature that the band gap of the direct transition is the largest among II-V compound semiconductors.
In particular, for light emitting diodes, 550 nm to 690 nm
In this range, high emission efficiency can be obtained because direct transition light emission is performed.

【0003】しかし、AlGaInP系材料を用いた面
発光型の従来の半導体発光素子には、光の取り出し効率
の点で問題点があった。この問題点について、図12に
示す発光ダイオードを用いて説明する。この発光ダイオ
ードは、n型GaAs基板121上に、n型AlGaI
nP第1クラッド層123、GaInP活性層124お
よびp型AlGaInP第2クラッド層125からなる
半導体積層構造1212が設けられている。p型クラッ
ド層125の中央部上にはp型電極1211が設けら
れ、n型基板121側には全面にn型電極1210が設
けられている。発光部であるGaInP活性層124で
発生した光は、p型電極1211側のp型電極1211
が形成されていない部分から取り出される。この発光ダ
イオードにおいて、発光効率を高くするためには、p型
電極1211から注入された電流がGaInP活性層1
24全体に広がる必要がある。しかし、p型AlGaI
nPクラッド層125の抵抗率が大きいため、p型クラ
ッド層125内で電流が少ししか広がらず、GaInP
活性層124におけるp型電極1211の直下の部分で
しか発光が得られなかった。このため、図12に示した
ような従来の発光ダイオードでは、上面方向への光の取
り出し効率が非常に小さくなってしまっていた。
However, the conventional surface-emitting type semiconductor light emitting device using an AlGaInP-based material has a problem in light extraction efficiency. This problem will be described with reference to a light emitting diode shown in FIG. This light emitting diode is formed on an n-type GaAs substrate 121 by n-type AlGaI.
A semiconductor multilayer structure 1212 including an nP first cladding layer 123, a GaInP active layer 124, and a p-type AlGaInP second cladding layer 125 is provided. A p-type electrode 1211 is provided on the center of the p-type cladding layer 125, and an n-type electrode 1210 is provided on the entire surface of the n-type substrate 121. Light generated in the GaInP active layer 124 which is a light emitting portion is transmitted to the p-type electrode 1211 on the p-type electrode 1211 side.
Is taken out from the part where it is not formed. In this light emitting diode, in order to increase the luminous efficiency, the current injected from the p-type electrode 1211 is applied to the GaInP active layer 1.
24. However, p-type AlGaI
Since the resistivity of the nP cladding layer 125 is large, the current spreads only a little in the p-type cladding layer 125, and GaInP
Light emission was obtained only in the portion of the active layer 124 immediately below the p-type electrode 1211. For this reason, in the conventional light emitting diode as shown in FIG. 12, the light extraction efficiency in the upper surface direction has become extremely small.

【0004】この問題点に対し、GaP電流拡散層を設
けて電流をより広い部分に広げた半導体発光素子が、例
えばRobert M. FletcherらによりU
nited States Patent 5,00
8,718に提案されている。
In order to solve this problem, a semiconductor light emitting device in which a GaP current diffusion layer is provided to spread the current to a wider portion is disclosed in, for example, Robert M. U by Fletcher et al.
nighted States Patent 5,000
8,718.

【0005】以下に、提案された半導体発光素子につい
て、図13を用いて説明する。この半導体発光素子は発
光ダイオードであり、n型GaAs基板131上に、n
型AlGaInP第1クラッド層133、GaInP活
性層134およびp型AlGaInP第2クラッド層1
35からなる半導体積層構造1312が設けられ、その
上にp型GaP電流拡散層136が設けられている。p
型GaP電流拡散層136の中央部上にはp型電極13
11が設けられ、n型基板131側には全面にn型電極
1310が設けられている。この半導体発光素子では、
p型GaP電流拡散層136Cの抵抗率がp型AlGa
InPクラッド層135の抵抗率よりも小さく、p型電
流拡散層136内で電流が広がるため、GaInP活性
層124における広い範囲で発光が得られ、発光効率が
向上する。また、活性層134で発生した光はp型電極
1311側から取り出されるが、p型GaP電流拡散層
136のバンドギャップがp型AlGaInPクラッド
層135のバンドギャップよりも大きく、発光した光が
p型電流拡散層136で吸収されずに透過するため、発
光効率を高くすることができる。
The proposed semiconductor light emitting device will be described below with reference to FIG. This semiconductor light emitting device is a light emitting diode, and n-type GaAs substrate 131 has n
-Type AlGaInP first cladding layer 133, GaInP active layer 134 and p-type AlGaInP second cladding layer 1
There is provided a semiconductor laminated structure 1312 consisting of 35, on which a p-type GaP current diffusion layer 136 is provided. p
The p-type electrode 13 is provided on the center of the GaP current diffusion layer 136.
11 are provided, and an n-type electrode 1310 is provided on the entire surface of the n-type substrate 131. In this semiconductor light emitting device,
The resistivity of the p-type GaP current diffusion layer 136C is p-type AlGa
Since the current is smaller than the resistivity of the InP cladding layer 135 and the current spreads in the p-type current diffusion layer 136, light emission can be obtained in a wide range in the GaInP active layer 124, and luminous efficiency is improved. Light generated in the active layer 134 is extracted from the p-type electrode 1311 side. However, the band gap of the p-type GaP current diffusion layer 136 is larger than the band gap of the p-type AlGaInP cladding layer 135, and the emitted light is p-type. Since the light is transmitted without being absorbed by the current diffusion layer 136, the luminous efficiency can be increased.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、図13
に示した従来の半導体発光素子においては、電流拡散層
としてGaP層を用いているため、以下のような問題点
があった。
However, FIG.
In the conventional semiconductor light emitting device shown in (1), since the GaP layer is used as the current diffusion layer, there are the following problems.

【0007】第1の問題点は、GaP層では良好な結晶
性が得られないことである。GaP層は、その結晶中に
おけるGa原子とP原子との結合が強いため、Ga原子
が成長表面上で拡散(マイグレーション)しにくく、良
好な層状成長でなく島状成長となり、結晶欠陥が発生し
やすい原因となっている。これらの結晶欠陥によりGa
P層の結晶性が低下し、抵抗率が大きくなったりするた
め、半導体発光素子の発光効率および信頼性の低下の要
因となっていた。
A first problem is that good crystallinity cannot be obtained with a GaP layer. In the GaP layer, Ga atoms and P atoms are strongly bonded to each other in the crystal, so that the Ga atoms are unlikely to diffuse (migrate) on the growth surface, resulting in island growth instead of good layer growth, and crystal defects occur. It is a probable cause. Due to these crystal defects, Ga
Since the crystallinity of the P layer is reduced and the resistivity is increased, this has been a factor of reducing the luminous efficiency and reliability of the semiconductor light emitting device.

【0008】第2の問題点は、GaP層の格子定数と、
GaAs基板およびそれと格子整合したAlGaInP
系半導体層の格子定数とが大きく異なることである。G
aAsの格子定数は5.65オングストロームであるの
に対し、GaPの格子定数は5.45オングストローム
であり、−3.54%の格子不整合が発生する。この格
子不整合の発生は、上記第1の問題点を引き起こす要因
ともなり、GaP結晶中に結晶欠陥が発生して結晶性が
低下する。これによっても、半導体発光素子の発光効率
および信頼性が低下していた。
[0008] The second problem is that the lattice constant of the GaP layer is
GaAs substrate and AlGaInP lattice-matched therewith
That is, the lattice constant of the system semiconductor layer is greatly different. G
The lattice constant of aAs is 5.65 angstroms, whereas the lattice constant of GaP is 5.45 angstroms, and a lattice mismatch of -3.54% occurs. The occurrence of the lattice mismatch also causes the first problem described above, and crystal defects occur in the GaP crystal to lower the crystallinity. This also reduced the luminous efficiency and reliability of the semiconductor light emitting device.

【0009】第3の問題点は、上記第2の問題点である
GaPの格子不整合が発光部にも悪影響を与えることで
ある。上記−3.54%の格子不整合により転位が発生
し、発光部である活性層やクラッド層等にも結晶欠陥が
発生するなど、非発光再結合中心の発生要因となる。こ
のため、半導体発光素子の発光効率が大幅に低下すると
共に、信頼性についても大幅に低下していた。
A third problem is that the lattice mismatch of GaP, which is the second problem, adversely affects the light emitting portion. Dislocations occur due to the -3.54% lattice mismatch, and crystal defects also occur in the active layer, the cladding layer, and the like, which are light emitting portions, and are factors that cause non-radiative recombination centers. For this reason, the luminous efficiency of the semiconductor light emitting element has been significantly reduced, and the reliability has also been significantly reduced.

【0010】本発明は、このような従来技術の課題を解
決するためになされたものであり、発光効率および信頼
性を大幅に改善することができる半導体発光素子および
その製造方法を提供することを目的とする。
SUMMARY OF THE INVENTION The present invention has been made to solve such problems of the prior art, and has as its object to provide a semiconductor light emitting device capable of greatly improving luminous efficiency and reliability and a method of manufacturing the same. Aim.

【0011】[0011]

【課題を解決するための手段】本発明の半導体発光素子
は、基板上に、第1導電型の第1クラッド層と活性層と
第2導電型の第2クラッド層とを少なくとも含む半導体
積層構造が設けられ、該半導体積層構造上に第2導電型
のGa1-xInxP(0<x<1)からなる電流拡散層が
設けられており、そのことにより上記目的が達成され
る。
According to the present invention, there is provided a semiconductor light emitting device having a semiconductor laminated structure including at least a first cladding layer of a first conductivity type, an active layer, and a second cladding layer of a second conductivity type on a substrate. Is provided, and a current diffusion layer made of Ga 1-x In x P (0 <x <1) of the second conductivity type is provided on the semiconductor multilayer structure, thereby achieving the above object.

【0012】前記電流拡散層のIn組成比xが0<x<
0.49にしてあるのが好ましい。
When the In composition ratio x of the current diffusion layer is 0 <x <
It is preferably 0.49.

【0013】前記電流拡散層のIn組成比xが0<x<
0.27にしてあるのが好ましい。
When the In composition ratio x of the current diffusion layer is 0 <x <
It is preferably set to 0.27.

【0014】本発明の半導体発光素子は、基板上に、第
1導電型の第1クラッド層と活性層と第2導電型の第2
クラッド層とを少なくとも含む半導体積層構造が設けら
れ、該半導体積層構造上に、そのIn組成比xを層厚方
向に向かって変化させた第2導電型のGa1-xInx
(0<x<1)からなる電流拡散層が設けられており、
そのことにより上記目的が達成される。
According to the semiconductor light emitting device of the present invention, a first conductive type first cladding layer, an active layer and a second conductive type second cladding layer are formed on a substrate.
A semiconductor multilayer structure including at least a cladding layer, and a second conductivity type Ga 1-x In x P in which the In composition ratio x is changed in the layer thickness direction on the semiconductor multilayer structure.
A current diffusion layer composed of (0 <x <1) is provided;
Thereby, the above object is achieved.

【0015】前記電流拡散層の変化させたIn組成比x
が0<x<0.49にしてあるのが好ましい。
The changed In composition ratio x of the current diffusion layer
Is preferably 0 <x <0.49.

【0016】前記電流拡散層の変化させたIn組成比x
が0<x<0.27にしてあるのが好ましい。
The changed In composition ratio x of the current diffusion layer
Is preferably 0 <x <0.27.

【0017】前記活性層が(AlyGa1-yzIn1-z
(0≦y≦1、0≦z≦1)、AlpGa1-pAs(0≦
p≦1)またはInqGa1-qAs(0≦q≦1)からな
っていてもよい。
The active layer is (Al y Ga 1 -y ) z In 1 -z P
(0 ≦ y ≦ 1, 0 ≦ z ≦ 1), Al p Ga 1-p As (0 ≦
p ≦ 1) or In q Ga 1-q As (0 ≦ q ≦ 1).

【0018】前記基板、前記半導体積層構造および前記
電流拡散層を挟んで一対の電極が設けられ、該電流拡散
層を間に挟んで該電流拡散層側の電極と対向するよう
に、電流阻止層が設けられていてもよい。
A pair of electrodes are provided with the substrate, the semiconductor laminated structure and the current diffusion layer interposed therebetween, and the current blocking layer is opposed to the electrode on the current diffusion layer side with the current diffusion layer interposed therebetween. May be provided.

【0019】前記電流拡散層側の電極が該電流拡散層の
中央部上に設けられ、該電極の非形成部から光を取り出
すようになっていてもよい。
An electrode on the side of the current diffusion layer may be provided on a central portion of the current diffusion layer, and light may be extracted from a portion where the electrode is not formed.

【0020】前記電流拡散層側の電極が該電流拡散層の
中央部上を取り囲むように設けられ、該電極の非形成部
から光を取り出すようになっていてもよい。
An electrode on the side of the current diffusion layer may be provided so as to surround a central portion of the current diffusion layer, and light may be extracted from a portion where the electrode is not formed.

【0021】前記電流阻止層がGa1-aInaP(0<a
<1)からなっていてもよい。
When the current blocking layer is Ga 1-a In a P (0 <a
<1) may be included.

【0022】前記電流阻止層がAlを含む化合物半導体
からなっていてもよい。
The current blocking layer may be made of a compound semiconductor containing Al.

【0023】前記電流阻止層がAlbGa1-bAs(0≦
b≦1)または(AlcGa1-cdIn1-dP(0≦c≦
1、0≦d≦1)からなっていてもよい。
The current blocking layer is made of Al b Ga 1 -b As (0 ≦
b ≦ 1) or (Al c Ga 1-c ) d In 1-d P (0 ≦ c ≦
1, 0 ≦ d ≦ 1).

【0024】本発明の半導体発光素子の製造方法は、基
板上に、第1導電型の第1クラッド層と活性層と第2導
電型の第2クラッド層とを少なくとも含む半導体積層構
造が設けられ、該半導体積層構造の上に一部重畳して第
1導電型の電流阻止層が設けられ、該電流阻止層の形成
部および非形成部にわたって第2導電型のGa1-xInx
P(0<x<1)からなる電流拡散層が設けられ、該電
流拡散層を間に介し、かつ、該電流阻止層と対向するよ
うに一方の電極が設けられ、該基板側に他方の電極が設
けられている半導体発光素子を製造する方法であって、
該基板上に該半導体積層構造を形成し、該半導体積層構
造上にAlを含まない材料からなる保護層を間に介して
Alを含む化合物半導体からなる電流阻止層形成用の層
を形成する工程と、該電流阻止層形成用の層と該保護層
とを選択的にエッチングして該半導体積層構造の上に一
部重畳するように電流阻止層を残す工程とを含み、その
ことにより上記目的が達成される。
According to the method of manufacturing a semiconductor light emitting device of the present invention, a semiconductor laminated structure including at least a first conductive type first clad layer, an active layer and a second conductive type second clad layer is provided on a substrate. A current blocking layer of the first conductivity type is provided on the semiconductor multilayer structure so as to partially overlap with the semiconductor stacked structure, and Ga 1-x In x of the second conductivity type is formed over a portion where the current blocking layer is formed and a portion where the current blocking layer is not formed.
A current diffusion layer made of P (0 <x <1) is provided, one electrode is provided so as to interpose the current diffusion layer and face the current blocking layer, and the other electrode is provided on the substrate side. A method for manufacturing a semiconductor light emitting device provided with an electrode,
Forming the semiconductor laminated structure on the substrate and forming a current blocking layer forming layer made of an Al-containing compound semiconductor on the semiconductor laminated structure with a protective layer made of an Al-free material interposed therebetween; And selectively etching the layer for forming the current blocking layer and the protective layer to leave a current blocking layer so as to partially overlap the semiconductor multilayer structure, thereby achieving the above object. Is achieved.

【0025】前記エッチングの際に、前記電流阻止層が
前記半導体積層構造の中央部上に残るようにエッチング
を行ってもよい。
In the etching, the etching may be performed so that the current blocking layer remains on the central portion of the semiconductor multilayer structure.

【0026】前記エッチングの際に、前記電流阻止層が
前記半導体積層構造の中央部上を取り囲んで残るように
エッチングを行ってもよい。
At the time of the etching, the etching may be performed so that the current blocking layer surrounds the central portion of the semiconductor multilayer structure and remains.

【0027】前記電流阻止層としてAlbGa1-bAs
(0≦b≦1)層または(AlcGa1-cdIn1-d
(0≦c≦1、0≦d≦1)層を形成してもよい。
As the current blocking layer, Al b Ga 1 -b As
(0 ≦ b ≦ 1) layer or (Al c Ga 1-c ) d In 1-d P
(0 ≦ c ≦ 1, 0 ≦ d ≦ 1) layers may be formed.

【0028】以下、本発明の作用について説明する。Hereinafter, the operation of the present invention will be described.

【0029】本発明にあっては、半導体積層構造上に設
けられたGa1-xInxP(0<x<1)電流拡散層によ
り電流が広げられるので、活性層の広い範囲で発光が得
られる。GaInP電流拡散層には、P原子に比べて原
子半径が大きいIn原子が含まれているので、その結晶
成長途中でP原子が結晶中を移動しにくくなっており、
結晶欠陥が生じにくい。また、GaInPはGaAs基
板やその上に形成される半導体層との格子不整合がGa
Pに比べて小さいため、電流拡散層自体に結晶欠陥が生
じにくくなると共に、発光部である活性層やクラッド層
等にも結晶欠陥が生じにくくなる。
[0029] In the present invention, since the current is widened by semiconductor multilayer structure provided on Ga 1-x In x P ( 0 <x <1) current spreading layer, the light-emitting in a broad range of the active layer can get. Since the GaInP current diffusion layer contains In atoms having an atomic radius larger than that of P atoms, it is difficult for P atoms to move through the crystal during the crystal growth.
Crystal defects are less likely to occur. GaInP has a lattice mismatch with a GaAs substrate or a semiconductor layer formed thereon.
Since it is smaller than P, crystal defects hardly occur in the current diffusion layer itself, and crystal defects hardly occur in the active layer, the cladding layer, or the like, which is a light emitting portion.

【0030】この電流拡散層のIn組成比xを0<x<
0.49とすると、GaInP活性層やAlGaInP
活性層から発光した光を吸収せずに透過させることがで
き、しかもGaAs基板やその上に形成される半導体層
との格子不整合による結晶欠陥を低減することができ
る。
When the In composition ratio x of the current diffusion layer is 0 <x <
Assuming 0.49, the GaInP active layer and the AlGaInP
Light emitted from the active layer can be transmitted without absorption, and crystal defects due to lattice mismatch with the GaAs substrate and the semiconductor layer formed thereon can be reduced.

【0031】また、電流拡散層のIn組成比xを0<x
<0.27とすると、そのバンドギャップがGaPとほ
ぼ同じになるため、発光部である活性層で発生した光が
電流拡散層で吸収されず、光吸収による電流拡散層の劣
化も生じない。
The In composition ratio x of the current diffusion layer is set to 0 <x
If <0.27, the band gap is almost the same as that of GaP, so that the light generated in the active layer as the light emitting portion is not absorbed by the current diffusion layer, and the current diffusion layer does not deteriorate due to light absorption.

【0032】電流拡散層のIn組成比xを層厚方向に向
かって徐々に変化させると、格子歪みを徐々に緩和して
格子歪みを低減させることができる。
When the In composition ratio x of the current diffusion layer is gradually changed in the layer thickness direction, lattice distortion can be gradually relaxed and lattice distortion can be reduced.

【0033】この電流拡散層の変化させたIn組成比x
を0<x<0.49とすると、GaInP活性層やAl
GaInP活性層から発光した光を吸収せずに透過させ
ることができ、しかもGaAs基板やその上に形成され
る半導体層との格子不整合による結晶欠陥を低減するこ
とができる。
The changed In composition ratio x of the current diffusion layer
Is 0 <x <0.49, the GaInP active layer and the Al
The light emitted from the GaInP active layer can be transmitted without absorption, and crystal defects due to lattice mismatch with the GaAs substrate and the semiconductor layer formed thereon can be reduced.

【0034】また、電流拡散層の変化させたIn組成比
xを0<x<0.27とすると、バンドギャップがGa
Pとほぼ同じになるため、発光部である活性層で発生し
た光が電流拡散層で吸収されず、光吸収による電流拡散
層の劣化も生じない。
When the changed In composition ratio x of the current diffusion layer is 0 <x <0.27, the band gap is Ga
Since it is almost the same as P, light generated in the active layer, which is a light emitting portion, is not absorbed by the current diffusion layer, and deterioration of the current diffusion layer due to light absorption does not occur.

【0035】活性層としては、AlyGa1-yzIn1-z
P(0≦y≦1、0≦z≦1)、AlpGa1-pAs(0
≦p≦1)またはInqGa1-qAs(0≦q≦1)等の
化合物半導体を用いることができ、結晶欠陥が少ない発
光部が得られる。
As the active layer, Al y Ga 1-y ) z In 1-z
P (0 ≦ y ≦ 1, 0 ≦ z ≦ 1), Al p Ga 1-p As (0
≦ p ≦ 1) or a compound semiconductor such as In q Ga 1-q As (0 ≦ q ≦ 1), so that a light emitting portion with few crystal defects can be obtained.

【0036】上記基板、半導体積層構造および電流拡散
層を挟んで設けられる一対の電極のうちの電流拡散層側
の電極と対向するように、電流拡散層を間に挟んで電流
阻止層を設けると、電流拡散層において電流阻止層の非
形成部に電流が導かれる。活性層の所望の領域に効率良
く電流が導かれるので、その部分での発光効率が向上
し、その発光部の上に電極が設けられていないので、電
極非形成部からの光の取り出し効率が向上する。
When a current blocking layer is provided with the current diffusion layer interposed therebetween so as to face the electrode on the current diffusion layer side of the pair of electrodes provided with the substrate, the semiconductor laminated structure and the current diffusion layer interposed therebetween. In the current diffusion layer, a current is guided to a portion where the current blocking layer is not formed. Since the current is efficiently guided to a desired region of the active layer, the luminous efficiency in that portion is improved, and since no electrode is provided on the light emitting portion, the light extraction efficiency from the electrode non-formed portion is reduced. improves.

【0037】例えば、電流拡散層側の電極を電流拡散層
の中央部上に設けて、その電極に対向するように電流阻
止層を設けると、活性層の周縁部に電流が導かれてその
部分での発光効率が向上し、電極の非形成部である周縁
部からの光の取り出し効率が向上する。
For example, if an electrode on the side of the current diffusion layer is provided on the center of the current diffusion layer, and a current blocking layer is provided so as to face the electrode, current is led to the peripheral portion of the active layer, and In this case, the light emission efficiency is improved, and the light extraction efficiency from the peripheral portion where the electrode is not formed is improved.

【0038】また、電流拡散層側の電極を電流拡散層の
中央部上を取り囲むように設けて、その電極に対向する
ように電流阻止層を設けると、活性層の中央部に電流が
導かれてその部分での発光効率が向上し、電極の非形成
部である中央部からの光の取り出し効率が向上する。
When an electrode on the side of the current diffusion layer is provided so as to surround the center of the current diffusion layer, and a current blocking layer is provided so as to face the electrode, current is led to the center of the active layer. Thus, the luminous efficiency at that portion is improved, and the light extraction efficiency from the central portion where the electrode is not formed is improved.

【0039】この電流阻止層がGa1-aInaP(0<a
<1)層であれば、電流阻止層とGaAs基板やその上
に形成される半導体層との格子不整合も小さくなり、結
晶欠陥がさらに低減される。
This current blocking layer is Ga 1 -a In a P (0 <a
In the case of <1) layer, the lattice mismatch between the current blocking layer and the GaAs substrate or the semiconductor layer formed thereon is reduced, and the crystal defects are further reduced.

【0040】また、電流阻止層としてAlbGa1-bAs
(0≦b≦1)や(AlcGa1-cdIn1-dP(0≦c
≦1、0≦d≦1)等のAlを含む化合物半導体層を用
いれば、半導体積層構造上にAlを含まない材料からな
る保護層を介して電流阻止層を形成することにより、保
護層と電流阻止層とを選択的にエッチングして所望の領
域に電流阻止層を配置することができる。
Further, Al b Ga 1 -b As is used as a current blocking layer.
(0 ≦ b ≦ 1) or (Al c Ga 1-c ) d In 1-d P (0 ≦ c
When a compound semiconductor layer containing Al such as ≦ 1, 0 ≦ d ≦ 1) is used, a current blocking layer is formed on the semiconductor laminated structure via a protective layer made of a material containing no Al, thereby forming a protective layer. By selectively etching the current blocking layer, the current blocking layer can be disposed in a desired region.

【0041】[0041]

【発明の実施の形態】以下に、本発明の実施形態につい
て図面を用いて説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0042】(実施形態1)この実施形態1では、Ga
1-xInxP(0<x<1)電流拡散層を設けたAlGa
InP系半導体発光素子について説明する。
(Embodiment 1) In this embodiment 1, Ga
AlGa provided with 1-x In x P (0 <x <1) current diffusion layer
An InP-based semiconductor light emitting device will be described.

【0043】図1に、実施形態1の半導体発光素子の断
面図を示す。
FIG. 1 is a sectional view of the semiconductor light emitting device of the first embodiment.

【0044】この半導体発光素子は発光ダイオードであ
り、n型GaAs基板1上にn型GaAs(例えばSi
濃度5×1017cm-3、厚み0.5μm)バッファ層2
が設けられ、その上にn型(AlyGa1-yzIn1-z
(0≦y≦1、0≦z≦1、例えばy=0.5、z=
0.5、Si濃度5×1017cm-3、厚み1.0μm)
クラッド層3、(AlyGa1-yzIn1-zP(0≦y≦
1、0≦z≦1、例えばy=0、z=0.5、厚み0.
5μm)活性層4およびp型(AlyGa1-yzIn1-z
P(0≦y≦1、0≦z≦1、例えばy=0.5、z=
0.5、Zn濃度5×1017cm-3、厚み1.0μm)
クラッド層5からなる半導体積層構造12が設けられて
いる。その上にp型Ga1-xInxP(0<x<1、例え
ばx=0.40、Zn濃度5×1018cm-3、厚み5.
0μm)電流拡散層6が設けられている。p型電流拡散
層6の中央部上にはp型電極11が設けられ、n型基板
1側には全面にn型電極10が設けられている。
This semiconductor light emitting device is a light emitting diode, and n-type GaAs (for example, Si
Buffer layer 2 (concentration: 5 × 10 17 cm −3 , thickness: 0.5 μm)
Is provided thereon, and n-type (Al y Ga 1-y ) z In 1-z P
(0 ≦ y ≦ 1, 0 ≦ z ≦ 1, for example, y = 0.5, z =
0.5, Si concentration 5 × 10 17 cm -3 , thickness 1.0 μm)
Cladding layer 3, (Al y Ga 1- y) z In 1-z P (0 ≦ y ≦
1, 0 ≦ z ≦ 1, for example, y = 0, z = 0.5, thickness 0.
5 μm) Active layer 4 and p-type (Al y Ga 1-y ) z In 1-z
P (0 ≦ y ≦ 1, 0 ≦ z ≦ 1, for example, y = 0.5, z =
0.5, Zn concentration 5 × 10 17 cm -3 , thickness 1.0 μm)
A semiconductor laminated structure 12 including the clad layer 5 is provided. On top of this, p-type Ga 1-x In x P (0 <x <1, for example, x = 0.40, Zn concentration 5 × 10 18 cm −3 , thickness 5.
0 μm) The current spreading layer 6 is provided. A p-type electrode 11 is provided on the center of the p-type current diffusion layer 6, and an n-type electrode 10 is provided on the entire surface of the n-type substrate 1.

【0045】本実施形態の半導体発光素子においては、
Ga1-xInxP(x=0.55)電流拡散層6を用いて
いるため、格子歪みを改善することができる。このこと
について図2を参照しながら説明する。
In the semiconductor light emitting device of this embodiment,
Since the Ga 1-x In x P (x = 0.55) current diffusion layer 6 is used, lattice distortion can be improved. This will be described with reference to FIG.

【0046】図2は、Ga1-xInxP中のIn組成xと
GaAsに対する格子不整合率との関係を示すグラフで
ある。この図2からわかるように、Ga1-xInxP中の
In組成x=0.49のときにGaAsと格子定数が一
致して、格子不整合率が0となる。本実施形態ではGa
1-xInxP(x=0.40)電流拡散層6の格子不整合
率が−0.6%となり、図13に示した従来の半導体発
光素子におけるGaP電流拡散層の格子不整合率−3.
54%に比べて83%も格子歪みを改善することができ
た。
FIG. 2 is a graph showing the relationship between the In composition x in Ga 1-x In x P and the lattice mismatch ratio with GaAs. As can be seen from FIG. 2, when In composition x = 0.49 in Ga 1-x In x P, the lattice constant matches that of GaAs, and the lattice mismatch rate becomes zero. In the present embodiment, Ga
The lattice mismatch ratio of the 1-x In x P (x = 0.40) current diffusion layer 6 is -0.6%, and the lattice mismatch ratio of the GaP current diffusion layer in the conventional semiconductor light emitting device shown in FIG. -3.
The lattice distortion could be improved by 83% compared to 54%.

【0047】また、本実施形態の半導体発光素子におい
ては、(AlyGa1-yzIn1-zP(y=0、z=0.
5)活性層4に対してGa1-xInxP(x=0.40)
電流拡散層6を用いているため、活性層4で発生した光
が電流拡散層6で吸収されない。このことについて図3
を参照しながら説明する。
In the semiconductor light emitting device of this embodiment, (Al y Ga 1 -y ) z In 1 -z P (y = 0, z = 0.
5) Ga 1-x In x P (x = 0.40) for the active layer 4
Since the current diffusion layer 6 is used, light generated in the active layer 4 is not absorbed by the current diffusion layer 6. This is illustrated in FIG.
This will be described with reference to FIG.

【0048】図3は、Ga1-xInxP中のIn組成xと
バンドギャップEgとの関係を示すグラフである。この
図3からわかるように、Ga1-xInxP中のIn組成比
xが0<x≦0.27の場合には間接遷移であるX遷移
となるのでGaPのバンドギャップEg=2.27eV
とほぼ同じバンドギャップであり、0.27<x<1の
場合には直接遷移であるΓ遷移となるのでGaPのバン
ドギャップよりも小さくなる。本実施形態ではGa1-x
InxP(x=0.40)電流拡散層6のバンドギャッ
プEg=2.0eVであり、(AlyGa1-yzIn1-z
P(y=0、z=0.5)活性層4のバンドギャップE
g=1.9eVに比べて大きいため、活性層4で発生し
た光は電流拡散層6で吸収されることなく、上面から取
り出される。
FIG. 3 is a graph showing the relationship between the In composition x in Ga 1-x In x P and the band gap Eg. As can be seen from FIG. 3, when the In composition ratio x in Ga 1-x In x P satisfies 0 <x ≦ 0.27, the transition is an X transition which is an indirect transition, so that the band gap Eg of GaP = 2. 27 eV
The band gap is almost the same as that of the GaP band gap. When 0.27 <x <1, the transition is a 遷移 transition which is a direct transition, and is therefore smaller than the band gap of GaP. In this embodiment, Ga 1-x
In x P (x = 0.40) is a band gap Eg = 2.0 eV of the current diffusion layer 6, (Al y Ga 1- y) z In 1-z
P (y = 0, z = 0.5) Band gap E of active layer 4
Since g is larger than 1.9 eV, light generated in the active layer 4 is extracted from the upper surface without being absorbed by the current diffusion layer 6.

【0049】このように本実施形態の半導体発光素子に
おいては、電流拡散層6中の結晶欠陥が低減できると共
に、発光部である活性層4等の転位による結晶欠陥を大
幅に低減できるため、発光効率および信頼性を大幅に改
善することができた。また、活性層4で発生した光が電
流拡散層6で吸収されないため、発光効率が低下せず、
光吸収による素子特性の劣化も生じなかった。素子特性
については、波長650nmの赤色発光ダイオードにお
いて発光効率が従来より20%向上し、信頼性について
も、20mA駆動時60℃条件下において光度が半分に
なるまでの時間が1.5倍に増加した。
As described above, in the semiconductor light emitting device of this embodiment, crystal defects in the current diffusion layer 6 can be reduced, and crystal defects due to dislocations in the active layer 4 or the like, which is a light emitting portion, can be greatly reduced. Efficiency and reliability could be greatly improved. Further, since the light generated in the active layer 4 is not absorbed by the current diffusion layer 6, the luminous efficiency does not decrease,
No deterioration of device characteristics due to light absorption occurred. Regarding the device characteristics, the luminous efficiency of the red light emitting diode with a wavelength of 650 nm is improved by 20% compared with the conventional device, and the reliability is increased by 1.5 times in the time required for the luminous intensity to be reduced to half under the condition of 60 ° C. when driven at 20 mA. did.

【0050】なお、本実施形態において、n型クラッド
層、活性層およびp型クラッド層を構成する(Aly
1-yzIn1-zPの組成比yおよびzは適宜変更して
もよい。このことは以下の実施形態でも同様である。ま
た、半導体発光素子の構造は本実施形態および以下の実
施形態に示したような発光ダイオードに限られず、Ga
As基板と格子整合する化合物半導体材料を用いた面発
光型の半導体発光素子であれば、それ以外の構造を採用
することも可能である。
In this embodiment, the n-type clad layer, the active layer and the p-type clad layer are formed (Al y G
a 1-y ) The composition ratios y and z of z In 1-z P may be appropriately changed. This is the same in the following embodiments. Further, the structure of the semiconductor light emitting device is not limited to the light emitting diodes described in the present embodiment and the following embodiments.
Other structures can also be adopted as long as they are surface emitting semiconductor light emitting elements using a compound semiconductor material that lattice-matches with the As substrate.

【0051】(実施形態2)この実施形態2では、Ga
1-xInxP電流拡散層のIn組成比xを実施形態1と異
ならせた半導体発光素子について説明する。
(Embodiment 2) In this embodiment 2, Ga
A semiconductor light emitting device in which the In composition ratio x of the 1-x In x P current diffusion layer is different from that of the first embodiment will be described.

【0052】図4に、実施形態2の半導体発光素子の断
面図を示す。
FIG. 4 is a sectional view of the semiconductor light emitting device of the second embodiment.

【0053】この半導体発光素子は発光ダイオードであ
り、n型GaAs基板21上にn型GaAs(例えばS
i濃度5×1017cm-3、厚み0.5μm)バッファ層
22が設けられ、その上にn型(AlyGa1-yzIn
1-zP(0≦y≦1、0≦z≦1、例えばy=1.0、
z=0.5、Si濃度5×1017cm-3、厚み1.0μ
m)クラッド層23、(AlyGa1-yzIn1-zP(0
≦y≦1、0≦z≦1、例えばy=0.45、z=0.
5、厚み0.5μm)活性層24およびp型(Aly
1-yzIn1-zP(0≦y≦1、0≦z≦1、例えば
y=1.0、z=0.5、Zn濃度5×1017cm-3
厚み1.0μm)クラッド層25からなる半導体積層構
造212が設けられている。その上にp型Ga1-xInx
P(0<x<1、例えばx=0.2、Zn濃度5×10
18cm-3、厚み5.0μm)電流拡散層26が設けられ
ている。p型電流拡散層26の中央部上にはp型電極2
11が設けられ、n型基板21側には全面にn型電極2
10が設けられている。
This semiconductor light emitting device is a light emitting diode, and n type GaAs (for example, S
A buffer layer 22 having an i concentration of 5 × 10 17 cm −3 and a thickness of 0.5 μm is provided, and an n-type (Al y Ga 1-y ) z In
1-z P (0 ≦ y ≦ 1, 0 ≦ z ≦ 1, for example, y = 1.0,
z = 0.5, Si concentration 5 × 10 17 cm −3 , thickness 1.0 μ
m) cladding layer 23, (Al y Ga 1- y) z In 1-z P (0
≦ y ≦ 1, 0 ≦ z ≦ 1, for example, y = 0.45, z = 0.
5, 0.5 μm thick active layer 24 and p-type (Al y G
a 1-y ) z In 1-z P (0 ≦ y ≦ 1, 0 ≦ z ≦ 1, for example, y = 1.0, z = 0.5, Zn concentration 5 × 10 17 cm −3 ,
A semiconductor multilayer structure 212 including a cladding layer 25 (thickness: 1.0 μm) is provided. On top of this, p-type Ga 1-x In x
P (0 <x <1, for example, x = 0.2, Zn concentration 5 × 10
A current diffusion layer 26 ( 18 cm −3 , thickness 5.0 μm) is provided. On the central portion of the p-type current diffusion layer 26, the p-type electrode 2
The n-type electrode 2 is provided on the entire surface of the n-type substrate 21 side.
10 are provided.

【0054】本実施形態においては、Ga1-xInx
(x=0.2)電流拡散層26を用いているため、図2
に示すように格子不整合率が−2.1%となり、図13
に示した従来の半導体発光素子におけるGaP電流拡散
層の格子不整合率−3.54%に比べて40%も格子歪
みを改善することができた。
In this embodiment, Ga 1-x In x P
(X = 0.2) Since the current diffusion layer 26 is used, FIG.
As shown in FIG. 13, the lattice mismatch rate becomes -2.1%, and FIG.
The lattice distortion of the GaP current diffusion layer in the conventional semiconductor light emitting device shown in FIG.

【0055】この格子歪み低減効果は実施形態1に比べ
て小さいものの、実施形態2では実施形態1に比べて電
流拡散層のバンドギャップを大きくできる。本実施形態
の半導体発光素子においては、図3に示すように、Ga
1-xInxP(x=0.2)電流拡散層26のバンドギャ
ップEgがGaPのバンドギャップとほぼ同じ2.27
eVであり、(AlyGa1-yzIn1-zP(y=0.4
5、z=0.5)活性層24のバンドギャップEg=
2.18eVに比べて大きいため、活性層24で発生し
た緑色光についても電流拡散層26で吸収されることは
なく、上面から取り出される。
Although the effect of reducing the lattice distortion is smaller than that of the first embodiment, the band gap of the current diffusion layer can be made larger in the second embodiment than in the first embodiment. In the semiconductor light emitting device of the present embodiment, as shown in FIG.
The band gap Eg of the 1-x In x P (x = 0.2) current diffusion layer 26 is almost the same as the band gap of GaP 2.27.
a eV, (Al y Ga 1- y) z In 1-z P (y = 0.4
5, z = 0.5) Band gap Eg of active layer 24 =
Since it is larger than 2.18 eV, green light generated in the active layer 24 is not absorbed by the current spreading layer 26 but is extracted from the upper surface.

【0056】このように本実施形態の半導体発光素子に
おいては、電流拡散層26中の結晶欠陥が低減できるた
め、発光効率および信頼性を大幅に改善することができ
た。また、活性層24で発生した緑色光が電流拡散層2
6で吸収されないため、発光効率が低下せず、光吸収に
よる素子特性の劣化も生じなかった。素子特性について
は、波長550nmの緑色発光ダイオードにおいて発光
効率が従来より30%向上し、信頼性についても、20
mA駆動時60℃条件下において光度が半分になるまで
の時間が2.0倍に増加した。
As described above, in the semiconductor light emitting device of the present embodiment, since the crystal defects in the current diffusion layer 26 can be reduced, the luminous efficiency and the reliability can be greatly improved. The green light generated in the active layer 24 is
6, the luminous efficiency did not decrease, and the device characteristics did not deteriorate due to light absorption. Regarding the device characteristics, the luminous efficiency of the green light-emitting diode having a wavelength of 550 nm is improved by 30% compared with the conventional device, and the reliability is also improved by 20%.
The time required to reduce the luminous intensity by half under the condition of 60 ° C. at the time of driving with mA was increased by 2.0 times.

【0057】(実施形態3)この実施形態3では、Ga
1-xInxP電流拡散層のIn組成比xを実施形態1およ
び実施形態2と異ならせた半導体発光素子について説明
する。
(Embodiment 3) In this embodiment 3, Ga
A semiconductor light emitting device in which the In composition ratio x of the 1-x In x P current diffusion layer is different from that of the first and second embodiments will be described.

【0058】図5に、実施形態3の半導体発光素子の断
面図を示す。
FIG. 5 is a sectional view of the semiconductor light emitting device of the third embodiment.

【0059】この半導体発光素子は発光ダイオードであ
り、n型GaAs基板31上にn型GaAs(例えばS
i濃度5×1017cm-3、厚み0.5μm)バッファ層
32が設けられ、その上にn型(AlyGa1-yzIn
1-zP(0≦y≦1、0≦z≦1、例えばy=1.0、
z=0.5、Si濃度5×1017cm-3、厚み1.0μ
m)クラッド層33、(AlyGa1-yzIn1-zP(0
≦y≦1、0≦z≦1、例えばy=0.30、z=0.
5、厚み0.5μm)活性層34およびp型(Aly
1-yzIn1-zP(0≦y≦1、0≦z≦1、例えば
y=1.0、z=0.5、Zn濃度5×1017cm-3
厚み1.0μm)クラッド層35からなる半導体積層構
造312が設けられている。その上にp型Ga1-xInx
P(0<x<1、例えばx=0.01、Zn濃度5×1
18cm-3、厚み5.0μm)電流拡散層36が設けら
れている。p型電流拡散層36の中央部上にはp型電極
311が設けられ、n型基板31側には全面にn型電極
310が設けられている。
This semiconductor light emitting device is a light emitting diode, and n type GaAs (for example, S
A buffer layer 32 having an i concentration of 5 × 10 17 cm −3 and a thickness of 0.5 μm) is provided, and an n-type (Al y Ga 1-y ) z In
1-z P (0 ≦ y ≦ 1, 0 ≦ z ≦ 1, for example, y = 1.0,
z = 0.5, Si concentration 5 × 10 17 cm −3 , thickness 1.0 μ
m) cladding layer 33, (Al y Ga 1- y) z In 1-z P (0
≦ y ≦ 1, 0 ≦ z ≦ 1, for example, y = 0.30, z = 0.
5, a 0.5 μm thick active layer 34 and a p-type (Al y G
a 1-y ) z In 1-z P (0 ≦ y ≦ 1, 0 ≦ z ≦ 1, for example, y = 1.0, z = 0.5, Zn concentration 5 × 10 17 cm −3 ,
A semiconductor laminated structure 312 composed of a cladding layer 35 (1.0 μm thick) is provided. On top of this, p-type Ga 1-x In x
P (0 <x <1, for example, x = 0.01, Zn concentration 5 × 1
(0 18 cm −3 , thickness 5.0 μm) The current diffusion layer 36 is provided. A p-type electrode 311 is provided on the center of the p-type current diffusion layer 36, and an n-type electrode 310 is provided on the entire surface of the n-type substrate 31.

【0060】本実施形態においては、Ga1-xInx
(x=0.1)電流拡散層36を用いているため、図2
に示すように、図13に示した従来の半導体発光素子に
おけるGaP電流拡散層の格子不整合率−3.54%に
比べて殆ど改善できていない。しかし、本実施形態にお
いては、Ga1-xInxP(x=0.1)電流拡散層36
を用いたことによりGaP層に比べて結晶性を改善させ
ることができた。このことについて以下に説明する。G
aP層はその結晶中でGa原子とP原子の結合が強いた
め、Ga原子が成長表面上を拡散(マイグレーション)
しにくく、良好な成長でなく島状成長となり、結晶欠陥
が発生しやすい原因となっていた。これに対して、In
原子を少しでも含んだGaInPにおいては、結晶欠陥
が大幅に低減する。このように結晶欠陥が低減するの
は、In原子はP原子と結合エネルギーが小さく、In
原子が成長表面を拡散(マイグレーション)しやすく、
それに伴いGa原子も拡散し、良好な層状成長が得ら
れ、結晶欠陥が低減して良好な結晶性が得られるためと
考えられる。
In this embodiment, Ga 1-x In x P
(X = 0.1) Since the current diffusion layer 36 is used, FIG.
As shown in FIG. 13, the lattice mismatch rate of the GaP current diffusion layer in the conventional semiconductor light emitting device shown in FIG. However, in the present embodiment, the Ga 1-x In x P (x = 0.1) current diffusion layer 36
By using, the crystallinity could be improved as compared with the GaP layer. This will be described below. G
In the aP layer, Ga atoms and P atoms are strongly bonded in the crystal, so that Ga atoms diffuse on the growth surface (migration).
However, the growth is not good and the growth becomes island-like, which causes crystal defects to occur easily. In contrast, In
In GaInP containing even a small amount of atoms, crystal defects are significantly reduced. The reason that the crystal defects are reduced as described above is that the In atom has a small bond energy with the P atom,
Atoms easily diffuse (migrate) on the growth surface,
It is considered that Ga atoms are also diffused along with this, good layer growth is obtained, crystal defects are reduced, and good crystallinity is obtained.

【0061】また、本実施形態の半導体発光素子におい
ては、図3に示すように、Ga1-xInxP(x=0.0
1)電流拡散層36のバンドギャップEgがGaPのバ
ンドギャップとほぼ同じ2.27eVであり、(Aly
Ga1-yzIn1-zP(y=0.30、z=0.5)活
性層34のバンドギャップに比べて大きいため、活性層
34で発生した黄色光についても電流拡散層36で吸収
されることはなく、上面から取り出される。
Further, in the semiconductor light emitting device of this embodiment, as shown in FIG. 3, Ga 1 -x In x P (x = 0.0
1) the band gap Eg of the current diffusion layer 36 is substantially the same 2.27eV bandgap of GaP, (Al y
Ga 1−y ) z In 1−z P (y = 0.30, z = 0.5) Since the bandgap of the active layer 34 is larger than that of the active layer 34, the yellow light generated in the active layer 34 also has a current diffusion layer 36. And is taken out from the upper surface.

【0062】このように本実施形態の半導体発光素子に
おいては、電流拡散層36中の結晶欠陥が低減できるた
め、発光効率および信頼性を大幅に改善することができ
た。また、活性層34で発生した緑色光は電流拡散層3
6で吸収されないため発光効率が低下せず、光吸収によ
る素子特性の劣化も生じなかった。素子特性について
は、波長590nmの黄色発光ダイオードにおいて発光
効率が従来より20%向上し、信頼性についても、20
mA駆動時60℃条件下において光度が半分になるまで
の時間が1.5倍に増加した。
As described above, in the semiconductor light emitting device of the present embodiment, since the crystal defects in the current diffusion layer 36 can be reduced, the luminous efficiency and the reliability can be greatly improved. The green light generated in the active layer 34 is
6, the luminous efficiency did not decrease, and the device characteristics did not deteriorate due to light absorption. Regarding the device characteristics, the luminous efficiency of the yellow light emitting diode having a wavelength of 590 nm is improved by 20% compared with the conventional device, and the reliability is also improved by 20%.
The time required to reduce the luminous intensity by half under the condition of 60 ° C. at the time of driving with the mA was increased by 1.5 times.

【0063】(実施形態4)この実施形態4では、Ga
1-xInxP電流拡散層のIn組成比xを層厚方向に徐々
に変化させ、活性層としてInqGa1-qAs(0≦q≦
1)を用いた半導体発光素子について説明する。
(Embodiment 4) In this embodiment 4, Ga
The In composition ratio x of the 1-x In x P current diffusion layer is gradually changed in the layer thickness direction, and In q Ga 1-q As (0 ≦ q ≦
A semiconductor light emitting device using the method 1) will be described.

【0064】図6に、実施形態4の半導体発光素子の断
面図を示す。
FIG. 6 is a sectional view of the semiconductor light emitting device of the fourth embodiment.

【0065】この半導体発光素子は発光ダイオードであ
り、n型GaAs基板61上にn型GaAs(例えばS
i濃度5×1017cm-3、厚み0.5μm)バッファ層
62が設けられ、その上にn型(AlyGa1-yzIn
1-zP(0≦y≦1、0≦z≦1、例えばy=0.5、
z=0.5、Si濃度5×1017cm-3、厚み1.0μ
m)クラッド層63、InqGa1-qAs(0≦q≦1、
例えばq=0.6、厚み0.5μm)活性層64および
p型(AlyGa1-yzIn1-zP(0≦y≦1、0≦z
≦1、例えばy=0.5、z=0.5、Zn濃度5×1
17cm-3、厚み1.0μm)クラッド層65からなる
半導体積層構造612が設けられている。その上にp型
Ga1-xInxP(0<x<1、例えばx=0.4→0.
2、Zn濃度5×1018cm-3、厚み5.0μm)電流
拡散層66が設けられている。p型電流拡散層66の中
央部上にはp型電極611が設けられ、n型基板61側
には全面にn型電極610が設けられている。
This semiconductor light emitting device is a light emitting diode, and n-type GaAs (for example, S
A buffer layer 62 having an i concentration of 5 × 10 17 cm −3 and a thickness of 0.5 μm is provided, and an n-type (Al y Ga 1-y ) z In
1-z P (0 ≦ y ≦ 1, 0 ≦ z ≦ 1, for example, y = 0.5,
z = 0.5, Si concentration 5 × 10 17 cm −3 , thickness 1.0 μ
m) cladding layer 63, In q Ga 1-q As (0 ≦ q ≦ 1,
For example q = 0.6, thickness 0.5 [mu] m) active layer 64 and p-type (Al y Ga 1-y) z In 1-z P (0 ≦ y ≦ 1,0 ≦ z
≦ 1, for example, y = 0.5, z = 0.5, Zn concentration 5 × 1
(0 17 cm −3 , thickness 1.0 μm) A semiconductor multilayer structure 612 including the cladding layer 65 is provided. On top of that, p-type Ga 1-x In x P (0 <x <1, for example, x = 0.4 → 0.
2, a Zn concentration of 5 × 10 18 cm −3 and a thickness of 5.0 μm). A p-type electrode 611 is provided on the center of the p-type current diffusion layer 66, and an n-type electrode 610 is provided on the entire surface of the n-type substrate 61.

【0066】本実施形態においては、Ga1-xInxP電
流拡散層66のIn組成比xを層厚方向に0.4から
0.2まで徐々に変化させて成長させている。これによ
り格子歪みを徐々に低減させることができ、発光部に格
子歪みが生じるのを改善することができた。
In the present embodiment, the Ga 1 -x In x P current diffusion layer 66 is grown by gradually changing the In composition ratio x from 0.4 to 0.2 in the thickness direction. As a result, the lattice distortion could be gradually reduced, and the occurrence of lattice distortion in the light emitting portion could be improved.

【0067】また、本実施形態の半導体発光素子におい
ては、Ga1-xInxP(x=0.4→0.2)電流拡散
層66のバンドギャップEgがInqGa1-qAs(q=
0.6)活性層64のバンドギャップに比べて大きいた
め、活性層64で発生した赤外光が電流拡散層66で吸
収されることはなく、上面から取り出される。
In the semiconductor light emitting device of the present embodiment, the band gap Eg of the Ga 1 -x In x P (x = 0.4 → 0.2) current diffusion layer 66 is In q Ga 1 -q As ( q =
0.6) Since the bandgap of the active layer 64 is larger than that of the active layer 64, the infrared light generated in the active layer 64 is not absorbed by the current diffusion layer 66 but is extracted from the upper surface.

【0068】このように本実施形態の半導体発光素子に
おいては、格子歪みを改善することができ、発光効率お
よび信頼性を大幅に改善することができた。また、活性
層64で発生した赤外光が電流拡散層66で吸収されな
いため、発光効率が低下せず、光吸収による素子特性の
劣化も生じなかった。素子特性については、波長950
nmの赤外発光ダイオードにおいて発光効率が従来より
30%向上し、信頼性についても、20mA駆動時60
℃条件下において光度が半分になるまでの時間が1.8
倍に増加した。
As described above, in the semiconductor light emitting device of this embodiment, lattice distortion can be improved, and luminous efficiency and reliability can be greatly improved. Further, since the infrared light generated in the active layer 64 was not absorbed by the current diffusion layer 66, the luminous efficiency did not decrease, and the device characteristics did not deteriorate due to the light absorption. For the element characteristics, the wavelength 950
The luminous efficiency of the infrared light emitting diode of 30 nm is improved by 30% compared with the conventional one, and the reliability is 60% when driven at 20 mA.
The time required for the luminous intensity to be reduced to half under the condition of ° C. is 1.8.
Increased by a factor of two.

【0069】なお、本実施形態において、活性層を構成
するInqGa1-qAsの組成比qは適宜変更してもよ
い。また、n型クラッド層およびp型クラッド層として
InqGa1-qAs(0≦q≦1)層を用いても良い。
In the present embodiment, the composition ratio q of In q Ga 1 -q As forming the active layer may be changed as appropriate. Further, an In q Ga 1-q As (0 ≦ q ≦ 1) layer may be used as the n-type cladding layer and the p-type cladding layer.

【0070】(実施形態5)この実施形態5では、Ga
1-xInxP電流拡散層のIn組成比xを層厚方向に徐々
に変化させたAlGaAs系半導体発光素子について説
明する。
(Embodiment 5) In this embodiment 5, Ga
An AlGaAs-based semiconductor light emitting device in which the In composition ratio x of the 1-x In x P current diffusion layer is gradually changed in the thickness direction will be described.

【0071】図7に、実施形態5の半導体発光素子の断
面図を示す。
FIG. 7 is a sectional view of the semiconductor light emitting device of the fifth embodiment.

【0072】この半導体発光素子は発光ダイオードであ
り、n型GaAs基板71上にn型GaAs(例えばS
i濃度5×1017cm-3、厚み0.5μm)バッファ層
72が設けられ、その上にn型AlpGa1-pAs(0≦
p≦1、例えばp=0.7、Si濃度5×1017
-3、厚み1.0μm)クラッド層73、AlpGa1-p
As(0≦p≦1、例えばp=0、厚み0.5μm)活
性層74およびp型AlpGa1-pAs(0≦p≦1、例
えばp=0.7、Zn濃度5×1017cm-3、厚み1.
0μm)クラッド層75からなる半導体積層構造712
が設けられている。その上にp型Ga1-xInxP(0<
x<1、例えばx=0.2→0.01、Zn濃度5×1
18cm-3、厚み5.0μm)電流拡散層76が設けら
れ、さらにその上にp型Ga1-xInxP(0<x<1、
例えばx=0.01、Zn濃度5×1018cm-3、厚み
2μm)電流拡散層77が設けられている。電流拡散層
77の中央部上にはp型電極711が設けられ、n型基
板71側には全面にn型電極710が設けられている。
This semiconductor light emitting device is a light emitting diode, and n type GaAs (for example, S
A buffer layer 72 having an i concentration of 5 × 10 17 cm −3 and a thickness of 0.5 μm) is provided, and an n-type Al p Ga 1 -p As (0 ≦
p ≦ 1, for example, p = 0.7, Si concentration 5 × 10 17 c
m -3 , thickness 1.0 μm) cladding layer 73, Al p Ga 1-p
As (0 ≦ p ≦ 1, for example, p = 0, thickness 0.5 μm) active layer 74 and p-type Al p Ga 1-p As (0 ≦ p ≦ 1, for example p = 0.7, Zn concentration 5 × 10) 17 cm -3 , thickness 1.
0 μm) Semiconductor laminated structure 712 including cladding layer 75
Is provided. A p-type Ga 1-x In x P (0 <
x <1, for example, x = 0.2 → 0.01, Zn concentration 5 × 1
0 18 cm −3 , thickness 5.0 μm) current diffusion layer 76 is further provided thereon, and a p-type Ga 1-x In x P (0 <x <1,
(For example, x = 0.01, Zn concentration 5 × 10 18 cm −3 , thickness 2 μm) The current diffusion layer 77 is provided. A p-type electrode 711 is provided on the center of the current diffusion layer 77, and an n-type electrode 710 is provided on the entire surface of the n-type substrate 71.

【0073】本実施形態においては、Ga1-xInxP電
流拡散層76のIn組成比xを層厚方向に0.2から
0.01まで徐々に変化させて成長させている。これに
より格子歪みを徐々に低減させることができ、発光部に
格子歪みが生じるのを改善することができた。
In the present embodiment, the Ga 1 -x In x P current diffusion layer 76 is grown by gradually changing the In composition ratio x from 0.2 to 0.01 in the layer thickness direction. As a result, the lattice distortion could be gradually reduced, and the occurrence of lattice distortion in the light emitting portion could be improved.

【0074】また、本実施形態の半導体発光素子におい
ては、Ga1-xInxP(x=0.2→0.01)電流拡
散層76のバンドギャップEgがAlpGa1-pAs(p
=0)活性層74のバンドギャップに比べて大きいた
め、活性層74で発生した赤外光が電流拡散層76で吸
収されることはなく、上面から取り出される。
In the semiconductor light emitting device of this embodiment, the band gap Eg of the Ga 1 -x In x P (x = 0.2 → 0.01) current diffusion layer 76 is Al p Ga 1 -p As ( p
= 0) Since it is larger than the band gap of the active layer 74, the infrared light generated in the active layer 74 is not absorbed by the current diffusion layer 76 but is extracted from the upper surface.

【0075】このように本実施形態の半導体発光素子に
おいては、格子歪みを改善することができ、発光効率お
よび信頼性を大幅に改善することができた。また、活性
層74で発生した赤外光が電流拡散層76で吸収されな
いため、発光効率が低下せず、光吸収による素子特性の
劣化も生じなかった。素子特性については、波長850
nmの赤外発光ダイオードにおいて発光効率が従来より
10%向上し、信頼性についても、20mA駆動時60
℃条件下において光度が半分になるまでの時間が1.3
倍に増加した。
As described above, in the semiconductor light emitting device of this embodiment, lattice distortion can be improved, and luminous efficiency and reliability can be greatly improved. Further, since the infrared light generated in the active layer 74 was not absorbed by the current diffusion layer 76, the luminous efficiency did not decrease, and the device characteristics did not deteriorate due to the light absorption. Regarding element characteristics, wavelength 850
The luminous efficiency of the infrared light emitting diode of 10 nm is improved by 10% compared with the conventional one, and the reliability is 60% at 20 mA driving.
Under the condition of ° C., the time required for the luminous intensity to be reduced to half is 1.3.
Increased by a factor of two.

【0076】なお、本実施形態において、n型クラッド
層、活性層およびp型クラッド層を構成するAlpGa
1-pAsの組成比pは適宜変更してもよい。
In this embodiment, Al p Ga constituting the n-type cladding layer, the active layer and the p-type cladding layer is used.
The composition ratio p of 1-p As may be changed as appropriate.

【0077】(実施形態6)この実施形態6では、半導
体積層構造の中央部上に電流阻止層を設け、その上にG
1-xInxP(0<x<1)電流拡散層を設けたAlG
aInP系半導体発光素子について説明する。
(Embodiment 6) In this embodiment 6, a current blocking layer is provided on a central portion of a semiconductor multilayer structure, and a G layer is formed thereon.
AlG provided with a 1-x In x P (0 <x <1) current diffusion layer
The aInP-based semiconductor light emitting device will be described.

【0078】図8に、実施形態6の半導体発光素子の断
面図を示す。
FIG. 8 is a sectional view of a semiconductor light emitting device according to the sixth embodiment.

【0079】この半導体発光素子は発光ダイオードであ
り、n型GaAs基板81上にn型GaAs(例えばS
i濃度5×1017cm-3、厚み0.5μm)バッファ層
82が設けられ、その上にn型(AlyGa1-yzIn
1-zP(0≦y≦1、0≦z≦1、例えばy=1.0、
z=0.5、Si濃度5×1017cm-3、厚み1.0μ
m)クラッド層83、(AlyGa1-yzIn1-zP(0
≦y≦1、0≦z≦1、例えばy=0.15、z=0.
5、厚み0.5μm)活性層84およびp型(Aly
1-yzIn1-zP(0≦y≦1、0≦z≦1、例えば
y=1.0、z=0.5、Zn濃度5×1017cm-3
厚み1.0μm)クラッド層85からなる半導体積層構
造812が設けられている。その半導体積層構造812
の中央部上にn型Ga1-aInaP(0<a<1、例えば
a=0.2、Si濃度5×1017cm-3、厚み0.5μ
m)電流阻止層88が設けられ、その上に電流阻止層8
8の形成部および非形成部にわたってp型Ga1-xInx
P(0<x<1、例えばx=0.2、Zn濃度5×10
18cm-3、厚み5.0μm)電流拡散層86が設けられ
ている。p型電流拡散層86の中央部上には電流阻止層
88と対向するようにp型電極811が設けられ、n型
基板81側には全面にn型電極810が設けられてい
る。
This semiconductor light emitting device is a light emitting diode, and n type GaAs (for example, S
A buffer layer 82 having an i concentration of 5 × 10 17 cm −3 and a thickness of 0.5 μm is provided, and an n-type (Al y Ga 1-y ) z In
1-z P (0 ≦ y ≦ 1, 0 ≦ z ≦ 1, for example, y = 1.0,
z = 0.5, Si concentration 5 × 10 17 cm −3 , thickness 1.0 μ
m) cladding layer 83, (Al y Ga 1- y) z In 1-z P (0
≦ y ≦ 1, 0 ≦ z ≦ 1, for example, y = 0.15, z = 0.
5, 0.5 μm thick active layer 84 and p-type (Al y G
a 1-y ) z In 1-z P (0 ≦ y ≦ 1, 0 ≦ z ≦ 1, for example, y = 1.0, z = 0.5, Zn concentration 5 × 10 17 cm −3 ,
A semiconductor multilayer structure 812 including a cladding layer 85 (thickness: 1.0 μm) is provided. The semiconductor laminated structure 812
N-type Ga 1-a In a P (0 <a <1, for example, a = 0.2, Si concentration 5 × 10 17 cm −3 , thickness 0.5 μm)
m) A current blocking layer 88 is provided, on which the current blocking layer 8 is formed.
8 over the formed portion and the non-formed portion of p-type Ga 1-x In x
P (0 <x <1, for example, x = 0.2, Zn concentration 5 × 10
A current spreading layer 86 is provided ( 18 cm -3 , thickness 5.0 μm). A p-type electrode 811 is provided on the center of the p-type current diffusion layer 86 so as to face the current blocking layer 88, and an n-type electrode 810 is provided on the entire surface of the n-type substrate 81.

【0080】本実施形態の半導体発光素子においては、
半導体積層構造812の中央部上に電流阻止層88を設
けてその上に電流拡散層86を設けているため、p型電
極811から注入された電流が電流拡散層86で周縁部
にさらに広げられ、p型電極811が形成されていない
周縁部からの光の取り出し効率がさらに向上した。ま
た、電流阻止層88としてp型Ga1-aInaP(0<a
<1)を用いているため、電流拡散層86と同様に、格
子歪みを低減して発光効率および信頼性を改善すること
ができた。素子特性については、波長610nmの燈色
発光ダイオードにおいて発光効率が従来より30%向上
し、信頼性についても、20mA駆動時60℃条件下に
おいて光度が半分になるまでの時間が2.5倍に増加し
た。
In the semiconductor light emitting device of this embodiment,
Since the current blocking layer 88 is provided on the central portion of the semiconductor multilayer structure 812 and the current spreading layer 86 is provided thereon, the current injected from the p-type electrode 811 is further spread to the peripheral portion by the current spreading layer 86. In addition, the light extraction efficiency from the periphery where the p-type electrode 811 is not formed is further improved. Further, p-type Ga 1-a In a P (0 <a
Since <1) was used, the lattice distortion was reduced and the luminous efficiency and the reliability were improved as in the case of the current diffusion layer 86. Regarding the device characteristics, the luminous efficiency of the light-emitting diode having a wavelength of 610 nm is improved by 30% compared with the conventional device, and the reliability is reduced by a factor of 2.5 when the luminous intensity is reduced to half at 60 ° C. at 20 mA. Increased.

【0081】なお、本実施形態では発光部の中央部に注
入される電流を阻止するために半導体積層構造の中央部
上に電流阻止層を設けたが、半導体積層構造を基板の中
央部に設けてその周囲を埋め込むように電流阻止層を設
けてもよい。また、電流阻止層は基板と同じ導電型にし
たが、絶縁性材料であってもよい。これらのことは後述
する実施形態8でも同様である。
In this embodiment, the current blocking layer is provided on the central portion of the semiconductor laminated structure in order to block the current injected into the central portion of the light emitting portion. However, the semiconductor laminated structure is provided on the central portion of the substrate. A current blocking layer may be provided so as to bury the surrounding area. The current blocking layer has the same conductivity type as the substrate, but may be an insulating material. These are the same in an embodiment 8 described later.

【0082】(実施形態7)この実施形態7では、半導
体積層構造の中央部上を取り囲むように電流阻止層を設
け、その上にGa1-xInxP(0<x<1)電流拡散層
を設けたAlGaInP系半導体発光素子について説明
する。
(Embodiment 7) In this embodiment 7, a current blocking layer is provided so as to surround the central portion of the semiconductor multilayer structure, and Ga 1-x In x P (0 <x <1) current diffusion is provided thereon. An AlGaInP-based semiconductor light emitting device provided with a layer will be described.

【0083】図9に、実施形態7の半導体発光素子の断
面図を示す。
FIG. 9 is a sectional view of a semiconductor light emitting device according to the seventh embodiment.

【0084】この半導体発光素子は発光ダイオードであ
り、n型GaAs基板91上にn型GaAs(例えばS
i濃度5×1017cm-3、厚み0.5μm)バッファ層
92が設けられ、その上にn型(AlyGa1-yzIn
1-zP(0≦y≦1、0≦z≦1、例えばy=1.0、
z=0.5、Si濃度5×1017cm-3、厚み1.0μ
m)クラッド層93、(AlyGa1-yzIn1-zP(0
≦y≦1、0≦z≦1、例えばy=0.4、z=0.
5、厚み0.5μm)活性層94およびp型(Aly
1-yzIn1-zP(0≦y≦1、0≦z≦1、例えば
y=1.0、z=0.5、Zn濃度5×1017cm-3
厚み1.0μm)クラッド層95からなる半導体積層構
造912が設けられている。その半導体積層構造912
の中央部上を取り囲むようにn型Ga1-aInaP(0<
a<1、例えばa=0.2、Si濃度5×1017
-3、厚み0.5μm)電流阻止層98が設けられ、そ
の上に電流阻止層98の形成部および非形成部にわたっ
てp型Ga1-xInxP(0<x<1、例えばx=0.
2、Zn濃度5×1018cm-3、厚み5.0μm)電流
拡散層96が設けられている。その上に、p型電流拡散
層96の中央部上を取り囲むように、かつ、電流阻止層
98と対向するようにp型電極911が設けられ、n型
基板91側には全面にn型電極910が設けられてい
る。
This semiconductor light emitting device is a light emitting diode, and n type GaAs (for example, S
A buffer layer 92 having an i concentration of 5 × 10 17 cm −3 and a thickness of 0.5 μm is provided, and an n-type (Al y Ga 1-y ) z In
1-z P (0 ≦ y ≦ 1, 0 ≦ z ≦ 1, for example, y = 1.0,
z = 0.5, Si concentration 5 × 10 17 cm −3 , thickness 1.0 μ
m) cladding layer 93, (Al y Ga 1- y) z In 1-z P (0
≦ y ≦ 1, 0 ≦ z ≦ 1, for example, y = 0.4, z = 0.
5, 0.5 μm thick active layer 94 and p-type (Al y G
a 1-y ) z In 1-z P (0 ≦ y ≦ 1, 0 ≦ z ≦ 1, for example, y = 1.0, z = 0.5, Zn concentration 5 × 10 17 cm −3 ,
A semiconductor multilayer structure 912 including a 1.0 μm thick cladding layer 95 is provided. The semiconductor laminated structure 912
N-type Ga 1-a In a P (0 <
a <1, for example, a = 0.2, Si concentration 5 × 10 17 c
m −3 , 0.5 μm in thickness. A current blocking layer 98 is provided, and p-type Ga 1-x In x P (0 <x <1, for example, x) = 0.
2, Zn concentration 5 × 10 18 cm −3 , thickness 5.0 μm) A current diffusion layer 96 is provided. A p-type electrode 911 is provided thereon so as to surround the center of the p-type current diffusion layer 96 and face the current blocking layer 98, and the n-type substrate 91 has an n-type electrode 910 are provided.

【0085】本実施形態の半導体発光素子においては、
半導体積層構造912の中央部上を取り囲むように電流
阻止層98を設けてその上に電流拡散層96を設けてい
るため、p型電極911から注入された電流が電流拡散
層96で中央部に集中し、p型電極911が形成されて
いない中央部からの光の取り出し効率がさらに向上し
た。また、電流阻止層98としてp型Ga1-aIna
(0<a<1)を用いているため、電流拡散層96と同
様に、格子歪みを低減して発光効率および信頼性を改善
することができた。素子特性については、波長550n
mの緑色発光ダイオードにおいて発光効率が従来より3
5%向上し、信頼性についても、20mA駆動時60℃
条件下において光度が半分になるまでの時間が2.7倍
に増加した。
In the semiconductor light emitting device of this embodiment,
Since the current blocking layer 98 is provided so as to surround the central portion of the semiconductor laminated structure 912 and the current diffusion layer 96 is provided thereon, the current injected from the p-type electrode 911 is applied to the central portion by the current diffusion layer 96. The light is efficiently concentrated from the central portion where the p-type electrode 911 is not formed. Further, as the current blocking layer 98, p-type Ga 1-a In a P
Since (0 <a <1) was used, the lattice distortion was reduced and the luminous efficiency and the reliability were improved as in the case of the current diffusion layer 96. Regarding element characteristics, wavelength 550n
luminous efficiency of the green light emitting diode of m
5% improvement, and reliability is 60 ° C at 20 mA drive.
Under the conditions, the time required for the luminous intensity to decrease by half increased 2.7 times.

【0086】なお、本実施形態では発光部の周縁部に注
入される電流を阻止するために半導体積層構造の中央部
上を取り囲むように電流阻止層を設けたが、半導体積層
構造を基板の中央部上を取り囲むように設けてその中を
埋め込むように電流阻止層を設けてもよい。また、電流
阻止層は基板と同じ導電型にしたが、絶縁性材料であっ
てもよい。これらのことは後述する実施形態9でも同様
である。
In this embodiment, the current blocking layer is provided so as to surround the central portion of the semiconductor laminated structure in order to block the current injected into the peripheral portion of the light emitting portion. A current blocking layer may be provided so as to surround the part and bury the part therein. The current blocking layer has the same conductivity type as the substrate, but may be an insulating material. The same applies to the ninth embodiment described later.

【0087】(実施形態8)この実施形態8では、半導
体積層構造の中央部上にAlを含む化合物半導体、例え
ば(AlcGa1-cdIn1-dP(0≦c≦1、0≦d≦
1)からなる電流阻止層を設け、その上にGa1-xInx
P(0<x<1)電流拡散層を設けたAlGaInP系
半導体発光素子について説明する。
(Embodiment 8) In this embodiment 8, a compound semiconductor containing Al, for example, (Al c Ga 1 -c ) d In 1 -d P (0 ≦ c ≦ 1, 0 ≦ d ≦
1) A current blocking layer comprising 1) Ga 1-x In x
An AlGaInP-based semiconductor light emitting device provided with a P (0 <x <1) current diffusion layer will be described.

【0088】図10(c)に、実施形態8の半導体発光
素子の断面図を示す。
FIG. 10C is a sectional view of a semiconductor light emitting device according to the eighth embodiment.

【0089】この半導体発光素子は発光ダイオードであ
り、n型GaAs基板101上にn型GaAs(例えば
Si濃度5×1017cm-3、厚み0.5μm)バッファ
層102が設けられ、その上にn型(AlyGa1-yz
In1-zP(0≦y≦1、0≦z≦1、例えばy=1.
0、z=0.5、Si濃度5×1017cm-3、厚み1.
0μm)クラッド層103、(AlyGa1-yzIn1-z
P(0≦y≦1、0≦z≦1、例えばy=0.45、z
=0.5、厚み0.5μm)活性層104およびp型
(AlyGa1-yzIn1-zP(0≦y≦1、0≦z≦
1、例えばy=1.0、z=0.5、Zn濃度5×10
17cm-3、厚み1.0μm)クラッド層105からなる
半導体積層構造1012が設けられている。その半導体
積層構造1012の上にp型Ga1-rInrP(0<r<
1、例えばr=0.2、Zn濃度5×1018cm-3、厚
み0.5μm)保護層109が設けられ、その中央部上
にn型(AlcGa1-cdIn1-dP(0≦c≦1、0≦
d≦1、例えばc=0.2、d=0.5、Si濃度5×
1017cm-3、厚み0.5μm)電流阻止層108が設
けられている。さらにその上に電流阻止層108の形成
部および非形成部にわたってp型Ga1-xInxP(0<
x<1、例えばx=0.2、Zn濃度5×1018
-3、厚み5.0μm)電流拡散層106が設けられて
いる。p型電流拡散層106の中央部上には電流阻止層
108と対向するようにp型電極1011が設けられ、
n型基板101側には全面にn型電極1010が設けら
れている。
This semiconductor light emitting device is a light emitting diode. An n type GaAs (for example, Si concentration 5 × 10 17 cm −3 , 0.5 μm thick) buffer layer 102 is provided on an n type GaAs substrate 101, n-type (Al y Ga 1-y ) z
In 1-z P (0 ≦ y ≦ 1, 0 ≦ z ≦ 1, for example, y = 1.
0, z = 0.5, Si concentration 5 × 10 17 cm −3 , thickness 1.
0 .mu.m) cladding layer 103, (Al y Ga 1- y) z In 1-z
P (0 ≦ y ≦ 1, 0 ≦ z ≦ 1, for example, y = 0.45, z
= 0.5, thickness 0.5 [mu] m) active layer 104 and the p-type (Al y Ga 1-y) z In 1-z P (0 ≦ y ≦ 1,0 ≦ z ≦
1, for example, y = 1.0, z = 0.5, Zn concentration 5 × 10
A semiconductor laminated structure 1012 including a 17 cm −3 , 1.0 μm thick cladding layer 105 is provided. P - type Ga 1-r In r P (0 <r <
1, for example, r = 0.2, Zn concentration 5 × 10 18 cm −3 , thickness 0.5 μm). A protective layer 109 is provided, and an n-type (Al c Ga 1-c ) d In 1- d P (0 ≦ c ≦ 1, 0 ≦
d ≦ 1, for example, c = 0.2, d = 0.5, Si concentration 5 ×
(10 17 cm −3 , thickness 0.5 μm) A current blocking layer 108 is provided. Furthermore, the p-type Ga 1-x In x P (0 <
x <1, for example, x = 0.2, Zn concentration 5 × 10 18 c
m −3 , thickness 5.0 μm). A p-type electrode 1011 is provided on a central portion of the p-type current diffusion layer 106 so as to face the current blocking layer 108,
An n-type electrode 1010 is provided on the entire surface of the n-type substrate 101.

【0090】この半導体発光素子は、例えば以下のよう
にして作製することができる。
This semiconductor light emitting device can be manufactured, for example, as follows.

【0091】まず、図10(a)に示すように、n型G
aAs基板101上にn型GaAsバッファ層102、
n型(AlyGa1-yzIn1-zPクラッド層103、
(AlyGa1-yzIn1-zP活性層104、p型(Al
yGa1-yzIn1-zPクラッド層105、p型Ga1-r
InrP保護層109およびn型(AlcGa1-cdIn
1-dPからなる電流阻止層形成用の層108aを順次積
層成長させる。
First, as shown in FIG.
an n-type GaAs buffer layer 102 on an aAs substrate 101;
n-type (Al y Ga 1-y) z In 1-z P cladding layer 103,
(Al y Ga 1 -y ) z In 1 -z P active layer 104, p-type (Al
y Ga 1-y ) z In 1 -z P cladding layer 105, p-type Ga 1-r
In r P protective layer 109 and n-type (Al c Ga 1 -c ) d In
A layer 108a of 1- dP for forming a current blocking layer is sequentially grown.

【0092】次に、図10(b)に示すように、電流阻
止層形成用の層を保護層109の中央部上のみを残して
エッチングすることにより電流阻止層108を形成す
る。このとき、エッチング速度にAl依存性を有するエ
ッチャント、例えばリン酸(H3PO4)系エッチャント
等を使用することにより、Alを含む化合物半導体から
なる電流阻止層形成用の層108aとAlを含まない材
料からなる保護層109との選択エッチングが可能とな
り、保護層109でエッチングを停止させることができ
る。
Next, as shown in FIG. 10B, a current blocking layer 108 is formed by etching a layer for forming a current blocking layer while leaving only the central portion of the protective layer 109. At this time, by using an etchant having an etching rate dependent on Al, for example, a phosphoric acid (H 3 PO 4 ) -based etchant, the layer 108a for forming the current blocking layer made of a compound semiconductor containing Al and Al is included. Selective etching with the protective layer 109 made of a non-existing material becomes possible, and the etching can be stopped at the protective layer 109.

【0093】その後、図10(c)に示すように、p型
Ga1-xInxP電流拡散層106を成長させ、n型電極
1010およびp型電極1011を形成することにより
半導体発光素子が完成する。
Thereafter, as shown in FIG. 10C, a p-type Ga 1-x In x P current diffusion layer 106 is grown, and an n-type electrode 1010 and a p-type electrode 1011 are formed. Complete.

【0094】本実施形態の半導体発光素子においては、
電流阻止層108がAlを含む(AlcGa1-cdIn
1-dP(c=0.2、d=0.5)からなるため、Al
を含まないGa1-rInrP(r=0.2)保護層109
との選択エッチングを行って、製造ブロセスにおける歩
留りを大幅に向上させると共に、コストを大幅に低減さ
せることができた。
In the semiconductor light emitting device of this embodiment,
The current blocking layer 108 contains Al (Al c Ga 1 -c ) d In
1-d P (c = 0.2, d = 0.5)
-Free Ga 1 -r In r P (r = 0.2) protective layer 109
By performing the selective etching described above, the yield in the manufacturing process was significantly improved, and the cost was significantly reduced.

【0095】(実施形態9)この実施形態9では、半導
体積層構造の中央部上を取り囲むようにAlを含む化合
物半導体、例えばAlbGa1-bAs(0≦b≦1)から
なる電流阻止層を設け、その上にGa1-xInxP(0<
x<1)電流拡散層を設けたAlGaInP系半導体発
光素子について説明する。
(Embodiment 9) In this embodiment 9, a current blocking made of a compound semiconductor containing Al, for example, Al b Ga 1 -b As (0 ≦ b ≦ 1) surrounds the central portion of the semiconductor multilayer structure. Layer, and Ga 1-x In x P (0 <
x <1) An AlGaInP-based semiconductor light emitting device provided with a current diffusion layer will be described.

【0096】図11(c)に、実施形態9の半導体発光
素子の断面図を示す。
FIG. 11C is a sectional view of the semiconductor light emitting device of the ninth embodiment.

【0097】この半導体発光素子は発光ダイオードであ
り、n型GaAs基板111上にn型GaAs(例えば
Si濃度5×1017cm-3、厚み0.5μm)バッファ
層112が設けられ、その上にn型(AlyGa1-yz
In1-zP(0≦y≦1、0≦z≦1、例えばy=1.
0、z=0.5、Si濃度5×1017cm-3、厚み1.
0μm)クラッド層113、(AlyGa1-yzIn1-z
P(0≦y≦1、0≦z≦1、例えばy=0.4、z=
0.5、厚み0.5μm)活性層114およびp型(A
yGa1-yzIn1-zP(0≦y≦1、0≦z≦1、例
えばy=1.0、z=0.5、Zn濃度5×1017cm
-3、厚み1.0μm)クラッド層115からなる半導体
積層構造1112が設けられている。その半導体積層構
造1112の上にp型Ga1-rInrP(0<r<1、例
えばr=0.2、Zn濃度5×1018cm-3、厚み0.
5μm)保護層119が設けられ、その中央部上を取り
囲むようにn型AlbGa1-bAs(0≦b≦1、例えば
b=0.2、Si濃度5×1017cm-3、厚み0.5μ
m)電流阻止層118が設けられている。さらにその上
に電流阻止層118の形成部および非形成部にわたって
p型Ga1-xInxP(0<x<1、例えばx=0.2、
Zn濃度5×1018cm-3、厚み5.0μm)電流拡散
層116が設けられている。その上にp型電流拡散層1
16の中央部上を取り囲むように、かつ、電流阻止層1
18と対向するようにp型電極1111が設けられ、n
型基板111側には全面にn型電極1110が設けられ
ている。
This semiconductor light-emitting device is a light-emitting diode, and an n-type GaAs (for example, 5 × 10 17 cm −3 , 0.5 μm thick) buffer layer 112 is provided on an n-type GaAs substrate 111. n-type (Al y Ga 1-y ) z
In 1-z P (0 ≦ y ≦ 1, 0 ≦ z ≦ 1, for example, y = 1.
0, z = 0.5, Si concentration 5 × 10 17 cm −3 , thickness 1.
0 μm) cladding layer 113, (Al y Ga 1-y ) z In 1-z
P (0 ≦ y ≦ 1, 0 ≦ z ≦ 1, for example, y = 0.4, z =
0.5, thickness 0.5 μm) active layer 114 and p-type (A
l y Ga 1-y) z In 1-z P (0 ≦ y ≦ 1,0 ≦ z ≦ 1, for example y = 1.0, z = 0.5, Zn concentration 5 × 10 17 cm
-3 , thickness 1.0 μm). A semiconductor laminated structure 1112 comprising a cladding layer 115 is provided. On the semiconductor laminated structure 1112, p-type Ga 1-r In r P (0 <r <1, for example, r = 0.2, Zn concentration 5 × 10 18 cm −3 , thickness 0.
5 μm) protective layer 119 is provided, and n-type Al b Ga 1 -b As (0 ≦ b ≦ 1, for example, b = 0.2, Si concentration 5 × 10 17 cm −3 , 0.5μ thickness
m) A current blocking layer 118 is provided. Further, a p-type Ga 1-x In x P (0 <x <1, for example, x = 0.2,
A current diffusion layer 116 having a Zn concentration of 5 × 10 18 cm −3 and a thickness of 5.0 μm is provided. A p-type current spreading layer 1
16 so as to surround the central portion thereof and the current blocking layer 1
A p-type electrode 1111 is provided so as to face
An n-type electrode 1110 is provided on the entire surface of the mold substrate 111.

【0098】この半導体発光素子は、例えば以下のよう
にして作製することができる。
The semiconductor light emitting device can be manufactured, for example, as follows.

【0099】まず、図11(a)に示すように、n型G
aAs基板111上にn型GaAsバッファ層112、
n型(AlyGa1-yzIn1-zPクラッド層113、
(AlyGa1-yzIn1-zP活性層114、p型(Al
yGa1-yzIn1-zPクラッド層115、p型Ga1-r
InrP保護層119およびn型AlbGa1-bAsから
なる電流阻止層形成用の層118aを順次積層成長させ
る。
First, as shown in FIG.
an n-type GaAs buffer layer 112 on an aAs substrate 111,
n-type (Al y Ga 1-y) z In 1-z P cladding layer 113,
(Al y Ga 1 -y ) z In 1 -z P active layer 114, p-type (Al
y Ga 1-y ) z In 1 -z P cladding layer 115, p-type Ga 1-r
A layer 118a for forming a current blocking layer made of an In r P protective layer 119 and n-type Al b Ga 1 -b As is sequentially grown.

【0100】次に、図11(b)に示すように、電流阻
止層形成用の層を保護層119の中央部上を取り囲むよ
うに残してエッチングすることにより電流阻止層118
を形成する。このとき、エッチング速度にAl依存性を
有するエッチャント、例えばリン酸(H3PO4)系エッ
チャント等を使用することにより、実施形態8と同様
に、Alを含む化合物半導体からなる電流阻止層形成用
の層118aとAlを含まない材料からなる保護層11
9との選択エッチングが可能となり、保護層119でエ
ッチングを停止させることができる。
Next, as shown in FIG. 11B, the current blocking layer 118 is etched by leaving a layer for forming a current blocking layer so as to surround the central portion of the protective layer 119.
To form At this time, by using an etchant having an Al dependency on the etching rate, for example, a phosphoric acid (H 3 PO 4 ) -based etchant, a current blocking layer formed of a compound semiconductor containing Al is formed in the same manner as in the eighth embodiment. Layer 118a and protective layer 11 made of a material not containing Al
9 can be selectively etched, and the etching can be stopped at the protective layer 119.

【0101】その後、図11(c)に示すように、p型
Ga1-xInxP電流拡散層116を成長させ、n型電極
1110およびp型電極1111を形成することにより
半導体発光素子が完成する。
Thereafter, as shown in FIG. 11C, a p-type Ga 1-x In x P current diffusion layer 116 is grown, and an n-type electrode 1110 and a p-type electrode 1111 are formed. Complete.

【0102】本実施形態の半導体発光素子においては、
電流阻止層118がAlを含むAlbGa1-bAs(b=
0.2)からなるため、Alを含まないGa1-rInr
(r=0.2)保護層119との選択エッチングを行っ
て、製造ブロセスにおける歩留りを大幅に向上させると
共に、コストを大幅に低減させることができた。
In the semiconductor light emitting device of this embodiment,
Current blocking layer 118 includes Al Al b Ga 1-b As (b =
0.2), Ga 1-r In r P not containing Al
(R = 0.2) By performing selective etching with the protective layer 119, the yield in the manufacturing process was significantly improved, and the cost was significantly reduced.

【0103】[0103]

【発明の効果】以上詳述したように、本発明によれば、
電流拡散層の格子歪みを改善することができるので、電
流拡散層自体の結晶欠陥を低減すると共に活性層等の発
光部における結晶欠陥の発生を防ぐことができ、発光効
率および信頼性を大幅に改善させることができる。
As described in detail above, according to the present invention,
Since the lattice distortion of the current diffusion layer can be improved, the crystal defects of the current diffusion layer itself can be reduced, and the generation of crystal defects in the light emitting portion such as the active layer can be prevented. Can be improved.

【0104】この電流拡散層のIn組成比xを0<x<
0.49とすることにより、GaInP層またはAlG
aInP層から発光した光を吸収せずに透過させること
ができ、しかも電流拡散層の結晶欠陥を低減することが
できるので、さらに発光効率および信頼性を向上させる
ことができる。
When the In composition ratio x of the current diffusion layer is set to 0 <x <
0.49, the GaInP layer or the AlG
The light emitted from the aInP layer can be transmitted without being absorbed, and the crystal defects of the current diffusion layer can be reduced, so that the luminous efficiency and the reliability can be further improved.

【0105】また、電流拡散層のIn組成比xを0<x
<0.27とすることにより、電流拡散層での光吸収が
生じず、しかも電流拡散層の結晶性が改善されるため、
さらに発光効率および信頼性を向上させることができ
る。
The In composition ratio x of the current diffusion layer is set to 0 <x
By setting the value to <0.27, light absorption in the current spreading layer does not occur, and the crystallinity of the current spreading layer is improved.
Further, luminous efficiency and reliability can be improved.

【0106】電流拡散層のIn組成比xを層厚方向に向
かって徐々に変化させることにより、格子歪みが徐々に
緩和されるので、さらに格子歪みを低減させて発光効率
および信頼性を向上させることができる。
By gradually changing the In composition ratio x of the current diffusion layer in the layer thickness direction, the lattice distortion is gradually relaxed. Therefore, the lattice distortion is further reduced to improve the luminous efficiency and the reliability. be able to.

【0107】この電流拡散層の変化させたIn組成比x
を0<x<0.49とすることにより、GaInP層ま
たはAlGaInP層から発光した光を吸収せずに透過
させることができ、しかも電流拡散層の結晶欠陥を低減
することができるので、さらに発光効率および信頼性を
向上させることができる。
The changed In composition ratio x of the current diffusion layer
Is set to 0 <x <0.49, light emitted from the GaInP layer or the AlGaInP layer can be transmitted without absorption, and crystal defects in the current diffusion layer can be reduced. Efficiency and reliability can be improved.

【0108】また、電流拡散層の変化させたIn組成比
xを0<x<0.27とすることにより、電流拡散層で
の光吸収が生じず、しかも電流拡散層の結晶性が改善さ
れるため、さらに発光効率および信頼性を向上させるこ
とができる。
By setting the changed In composition ratio x of the current diffusion layer to 0 <x <0.27, light absorption in the current diffusion layer does not occur, and the crystallinity of the current diffusion layer is improved. Therefore, luminous efficiency and reliability can be further improved.

【0109】この電流拡散層は、(AlyGa1-yz
1-zP(0≦y≦1、0≦z≦1)、AlpGa1-p
s(0≦p≦1)、InqGa1-qAs(0≦q≦1)等
の発光部を備えた半導体発光素子に用いれば、結晶欠陥
が無い発光部が得られ、発光効率を向上させることがで
きる。
This current diffusion layer is made of (Al y Ga 1 -y ) z I
n 1-z P (0 ≦ y ≦ 1, 0 ≦ z ≦ 1), Al p Ga 1-p A
When used in a semiconductor light emitting device having a light emitting portion such as s (0 ≦ p ≦ 1) or In q Ga 1-q As (0 ≦ q ≦ 1), a light emitting portion free of crystal defects can be obtained, and the luminous efficiency can be improved. Can be improved.

【0110】電流拡散層側の電極と対向するように、電
流拡散層を間に挟んで電流阻止層を設ければ、電流拡散
層により電流阻止層の非形成部に効率良く電流を導いて
発光効率を高めると共に、電極非形成部からの光の取り
出し効率を高めることができる。
If a current blocking layer is provided with the current spreading layer interposed therebetween so as to face the electrode on the side of the current spreading layer, the current spreading layer efficiently conducts a current to a portion where the current blocking layer is not formed to emit light. The efficiency of light extraction from the non-electrode-formed portion can be increased, as well as the efficiency.

【0111】例えば、電流拡散層側の電極を電流拡散層
の中央部上に設けて、その電極に対向するように電流阻
止層を設けると、電極の非形成部である周縁部からの光
の取り出し効率が向上する。
For example, if an electrode on the side of the current diffusion layer is provided on the center of the current diffusion layer and a current blocking layer is provided so as to face the electrode, light from the peripheral portion where no electrode is formed can be obtained. The extraction efficiency is improved.

【0112】また、電流拡散層側の電極を電流拡散層の
中央部上を取り囲むように設けて、その電極に対向する
ように電流阻止層を設けると、電極の非形成部である中
央部からの光の取り出し効率が向上する。
Further, when the electrode on the side of the current diffusion layer is provided so as to surround the central portion of the current diffusion layer, and the current blocking layer is provided so as to face the electrode, the central portion where the electrode is not formed is provided. Light extraction efficiency is improved.

【0113】電流阻止層としてGa1-aInaP(0<a
<1)層を用いることにより、電流阻止層の格子歪みも
改善されるので、発光効率および信頼性を向上させるこ
とができる。
Ga 1-a In a P (0 <a
<1) By using the layer, the lattice distortion of the current blocking layer is also improved, so that the luminous efficiency and the reliability can be improved.

【0114】また、電流阻止層としてAlbGa1-bAs
(0≦b≦1)や(AlcGa1-cdIn1-dP(0≦c
≦1、0≦d≦1)等のAlを含む化合物半導体を用い
ることにより、選択エッチングを行って所望の領域に電
流阻止層を形成することができるので、製造プロセスの
歩留りを大幅に向上させると共にコストを大幅に低減さ
せることができる。
The current blocking layer is made of Al b Ga 1 -b As.
(0 ≦ b ≦ 1) or (Al c Ga 1-c ) d In 1-d P (0 ≦ c
By using a compound semiconductor containing Al such as ≦ 1, 0 ≦ d ≦ 1) or the like, a current blocking layer can be formed in a desired region by performing selective etching, so that the yield of the manufacturing process is greatly improved. In addition, the cost can be significantly reduced.

【図面の簡単な説明】[Brief description of the drawings]

【図1】実施形態1の半導体発光素子の断面図である。FIG. 1 is a sectional view of a semiconductor light emitting device according to a first embodiment.

【図2】Ga1-xInxP中のIn組成xとGaAsに対
する格子不整合率との関係を示すグラフである。
FIG. 2 is a graph showing a relationship between an In composition x in Ga 1-x In x P and a lattice mismatch ratio with respect to GaAs.

【図3】Ga1-xInxP中のIn組成xとバンドギャッ
プEgとの関係を示すグラフである。
FIG. 3 is a graph showing a relationship between an In composition x in Ga 1-x In x P and a band gap Eg.

【図4】実施形態2の半導体発光素子の断面図である。FIG. 4 is a sectional view of a semiconductor light emitting device according to a second embodiment.

【図5】実施形態3の半導体発光素子の断面図である。FIG. 5 is a sectional view of a semiconductor light emitting device according to a third embodiment.

【図6】実施形態4の半導体発光素子の断面図である。FIG. 6 is a sectional view of a semiconductor light emitting device according to a fourth embodiment.

【図7】実施形態5の半導体発光素子の断面図である。FIG. 7 is a sectional view of a semiconductor light emitting device according to a fifth embodiment.

【図8】実施形態6の半導体発光素子の断面図である。FIG. 8 is a sectional view of a semiconductor light emitting device according to a sixth embodiment.

【図9】実施形態7の半導体発光素子の断面図である。FIG. 9 is a sectional view of a semiconductor light emitting device according to a seventh embodiment.

【図10】実施形態8の半導体発光素子の製造工程を示
す断面図である。
FIG. 10 is a cross-sectional view showing a manufacturing step of the semiconductor light emitting device of the eighth embodiment.

【図11】実施形態9の半導体発光素子の製造工程を示
す断面図である。
FIG. 11 is a cross-sectional view showing a manufacturing step of the semiconductor light emitting device of the ninth embodiment.

【図12】従来の半導体発光素子の断面図である。FIG. 12 is a sectional view of a conventional semiconductor light emitting device.

【図13】従来の半導体発光素子の断面図である。FIG. 13 is a sectional view of a conventional semiconductor light emitting device.

【符号の説明】 1、21、31、61、71、81、91、101、1
11 基板 2、22、32、62、72、82、92、102、1
12 バッファ層 3、23、33、63、73、83、93、103、1
13 n型クラッド層 4、24、34、64、74、84、94、104、1
14 活性層 5、25、35、65、75、85、95、105、1
15 p型クラッド層 6、26、36、66、76、86、96、106、1
16 電流拡散層 10、210、310、610、710、810、91
0、1010、1110 n型電極 11、211、311、611、711、811、91
1、1011、1111 p型電極 12、212、312、612、712、812、91
2、1012、1112 半導体積層構造 77 電流拡散層 88、98、108、118 電流阻止層 109、119 保護層
[Description of Signs] 1, 21, 31, 61, 71, 81, 91, 101, 1
11 Substrate 2, 22, 32, 62, 72, 82, 92, 102, 1
12 buffer layer 3, 23, 33, 63, 73, 83, 93, 103, 1
13 n-type cladding layer 4, 24, 34, 64, 74, 84, 94, 104, 1
14 Active layer 5, 25, 35, 65, 75, 85, 95, 105, 1
15 p-type cladding layer 6, 26, 36, 66, 76, 86, 96, 106, 1
16 Current spreading layer 10, 210, 310, 610, 710, 810, 91
0, 1010, 1110 n-type electrode 11, 211, 311, 611, 711, 811, 91
1, 1011, 1111 p-type electrode 12, 212, 312, 612, 712, 812, 91
2, 1012, 1112 Semiconductor multilayer structure 77 Current diffusion layer 88, 98, 108, 118 Current blocking layer 109, 119 Protective layer

Claims (17)

【特許請求の範囲】[Claims] 【請求項1】 基板上に、第1導電型の第1クラッド層
と活性層と第2導電型の第2クラッド層とを少なくとも
含む半導体積層構造が設けられ、該半導体積層構造上に
第2導電型のGa1-xInxP(0<x<1)からなる電
流拡散層が設けられている半導体発光素子。
A semiconductor laminated structure including at least a first cladding layer of a first conductivity type, an active layer, and a second cladding layer of a second conductivity type is provided on a substrate, and a second clad layer is formed on the semiconductor laminated structure. A semiconductor light emitting device provided with a current diffusion layer made of conductive Ga 1-x In x P (0 <x <1).
【請求項2】 前記電流拡散層のIn組成比xが0<x
<0.49にしてある請求項1に記載の半導体発光素
子。
2. The current diffusion layer according to claim 1, wherein an In composition ratio x is 0 <x.
The semiconductor light emitting device according to claim 1, wherein <0.49 is satisfied.
【請求項3】 前記電流拡散層のIn組成比xが0<x
<0.27にしてある請求項1に記載の半導体発光素
子。
3. The current diffusion layer according to claim 1, wherein an In composition ratio x is 0 <x.
The semiconductor light emitting device according to claim 1, wherein <0.27 is satisfied.
【請求項4】 基板上に、第1導電型の第1クラッド層
と活性層と第2導電型の第2クラッド層とを少なくとも
含む半導体積層構造が設けられ、該半導体積層構造上
に、そのIn組成比xを層厚方向に向かって変化させた
第2導電型のGa1-xInxP(0<x<1)からなる電
流拡散層が設けられている半導体発光素子。
4. A semiconductor laminated structure including at least a first conductive type first clad layer, an active layer, and a second conductive type second clad layer is provided on a substrate, and the semiconductor laminated structure is provided on the semiconductor laminated structure. A semiconductor light emitting device provided with a current diffusion layer made of Ga 1-x In x P (0 <x <1) of a second conductivity type in which an In composition ratio x is changed in a layer thickness direction.
【請求項5】 前記電流拡散層の変化させたIn組成比
xが0<x<0.49にしてある請求項4に記載の半導
体発光素子。
5. The semiconductor light emitting device according to claim 4, wherein the changed In composition ratio x of the current diffusion layer is set to 0 <x <0.49.
【請求項6】 前記電流拡散層の変化させたIn組成比
xが0<x<0.27にしてある請求項4に記載の半導
体発光素子。
6. The semiconductor light emitting device according to claim 4, wherein the changed In composition ratio x of the current diffusion layer is set to 0 <x <0.27.
【請求項7】 前記活性層が(AlyGa1-yzIn1-z
P(0≦y≦1、0≦z≦1)、AlpGa1-pAs(0
≦p≦1)またはInqGa1-qAs(0≦q≦1)から
なる請求項1乃至6のいずれかに記載の半導体発光素
子。
7. The method according to claim 1, wherein the active layer is (Al y Ga 1 -y ) z In 1 -z
P (0 ≦ y ≦ 1, 0 ≦ z ≦ 1), Al p Ga 1-p As (0
7. The semiconductor light emitting device according to claim 1, wherein the semiconductor light emitting device is made of ≦ p ≦ 1) or In q Ga 1-q As (0 ≦ q ≦ 1).
【請求項8】 前記基板、前記半導体積層構造および前
記電流拡散層を挟んで一対の電極が設けられ、該電流拡
散層を間に挟んで該電流拡散層側の電極と対向するよう
に、電流阻止層が設けられている請求項1乃至7のいず
れかに記載の半導体発光素子。
8. A pair of electrodes are provided with the substrate, the semiconductor laminated structure, and the current diffusion layer interposed therebetween, and a current is supplied so as to face an electrode on the current diffusion layer side with the current diffusion layer interposed therebetween. The semiconductor light emitting device according to claim 1, further comprising a blocking layer.
【請求項9】 前記電流拡散層側の電極が該電流拡散層
の中央部上に設けられ、該電極の非形成部から光を取り
出すようになっている請求項8に記載の半導体発光素
子。
9. The semiconductor light emitting device according to claim 8, wherein the electrode on the side of the current diffusion layer is provided on a central portion of the current diffusion layer, and light is extracted from a portion where the electrode is not formed.
【請求項10】 前記電流拡散層側の電極が該電流拡散
層の中央部上を取り囲むように設けられ、該電極の非形
成部から光を取り出すようになっている請求項8に記載
の半導体発光素子。
10. The semiconductor according to claim 8, wherein an electrode on the side of the current diffusion layer is provided so as to surround a central portion of the current diffusion layer, and light is extracted from a portion where the electrode is not formed. Light emitting element.
【請求項11】 前記電流阻止層がGa1-aInaP(0
<a<1)からなる請求項9または10に記載の半導体
発光素子。
11. The method according to claim 1, wherein the current blocking layer is Ga 1-a In a P (0
The semiconductor light emitting device according to claim 9, wherein <a <1).
【請求項12】 前記電流阻止層がAlを含む化合物半
導体からなる請求項9または10に記載の半導体発光素
子。
12. The semiconductor light emitting device according to claim 9, wherein said current blocking layer is made of a compound semiconductor containing Al.
【請求項13】 前記電流阻止層がAlbGa1-bAs
(0≦b≦1)または(AlcGa1-cdIn1-dP(0
≦c≦1、0≦d≦1)からなる請求項12に記載の半
導体発光素子。
13. The current blocking layer according to claim 1, wherein said current blocking layer is Al b Ga 1 -b As.
(0 ≦ b ≦ 1) or (Al c Ga 1-c ) d In 1-d P (0
13. The semiconductor light emitting device according to claim 12, wherein ≤c≤1, 0≤d≤1).
【請求項14】 基板上に、第1導電型の第1クラッド
層と活性層と第2導電型の第2クラッド層とを少なくと
も含む半導体積層構造が設けられ、該半導体積層構造の
上に一部重畳して第1導電型の電流阻止層が設けられ、
該電流阻止層の形成部および非形成部にわたって第2導
電型のGa1-xInxP(0<x<1)からなる電流拡散
層が設けられ、該電流拡散層を間に介し、かつ、該電流
阻止層と対向するように一方の電極が設けられ、該基板
側に他方の電極が設けられている半導体発光素子を製造
する方法であって、 該基板上に該半導体積層構造を形成し、該半導体積層構
造上にAlを含まない材料からなる保護層を間に介して
Alを含む化合物半導体からなる電流阻止層形成用の層
を形成する工程と、 該電流阻止層形成用の層と該保護層とを選択的にエッチ
ングして該半導体積層構造の上に一部重畳するように電
流阻止層を残す工程とを含む半導体発光素子の製造方
法。
14. A semiconductor laminated structure including at least a first conductive type first clad layer, an active layer, and a second conductive type second clad layer is provided on a substrate, and a semiconductor laminated structure is formed on the semiconductor laminated structure. A current blocking layer of the first conductivity type is provided so as to partially overlap;
A current diffusion layer made of Ga 1-x In x P (0 <x <1) of the second conductivity type is provided over the portion where the current blocking layer is formed and the portion where the current blocking layer is not formed. A method for manufacturing a semiconductor light-emitting device in which one electrode is provided so as to face the current blocking layer and the other electrode is provided on the substrate side, wherein the semiconductor laminated structure is formed on the substrate. Forming a layer for forming a current blocking layer made of a compound semiconductor containing Al on the semiconductor laminated structure with a protective layer made of a material containing no Al interposed therebetween; and a layer for forming the current blocking layer. And selectively etching the protective layer to leave a current blocking layer so as to partially overlap the semiconductor laminated structure.
【請求項15】 前記エッチングの際に、前記電流阻止
層が前記半導体積層構造の中央部上に残るようにエッチ
ングを行う請求項14に記載の半導体発光素子の製造方
法。
15. The method according to claim 14, wherein the etching is performed such that the current blocking layer remains on a central portion of the semiconductor multilayer structure during the etching.
【請求項16】 前記エッチングの際に、前記電流阻止
層が前記半導体積層構造の中央部上を取り囲んで残るよ
うにエッチングを行う請求項14に記載の半導体発光素
子の製造方法。
16. The method for manufacturing a semiconductor light emitting device according to claim 14, wherein the etching is performed such that the current blocking layer surrounds a central portion of the semiconductor multilayer structure and remains.
【請求項17】 前記電流阻止層としてAlbGa1-b
s(0≦b≦1)層または(AlcGa1-cdIn1-d
(0≦c≦1、0≦d≦1)層を形成する請求項14乃
至16のいずれか一つに記載の半導体発光素子の製造方
法。
17. The method according to claim 17, wherein the current blocking layer is formed of Al b Ga 1-b A.
s (0 ≦ b ≦ 1) layer or (Al c Ga 1-c ) d In 1-d P
The method for manufacturing a semiconductor light emitting device according to claim 14, wherein (0 ≦ c ≦ 1, 0 ≦ d ≦ 1) layers are formed.
JP4633797A 1997-02-28 1997-02-28 Semiconductor light emitting device and method of manufacturing the same Expired - Lifetime JP3332785B2 (en)

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TW087102739A TW472399B (en) 1997-02-28 1998-02-25 Semiconductor light emitting element and method for fabricating the same
DE19808446A DE19808446C2 (en) 1997-02-28 1998-02-27 Semiconductor light emitting element with current diffusion layer and method for producing the same
KR1019980006570A KR100329054B1 (en) 1997-02-28 1998-02-28 Semiconductor light emitting element and method for fabricating the same
CNB981062644A CN1151562C (en) 1997-02-28 1998-02-28 Semiconductor light emitting element and method for fabricating the same

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US6468818B2 (en) * 1999-01-25 2002-10-22 Sharp Kabushiki Kaisha Method for producing a high-luminance semiconductor light-emitting device capable of operating at a low voltage
US6936858B1 (en) 1998-08-21 2005-08-30 Sharp Kabushiki Kaisha Semiconductor light-emitting diode
JP2010141197A (en) * 2008-12-12 2010-06-24 Shin Etsu Handotai Co Ltd Compound semiconductor substrate, light emitting element, method of manufacturing compound semiconductor substrate, and method of manufacturing light emitting element

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DE10306309A1 (en) * 2003-02-14 2004-09-09 Osram Opto Semiconductors Gmbh Simple and cost effective process for preparation of a radiation emitting semiconductor chip based on AlGaInP useful in production of light emitting diodes (LED)
KR101633814B1 (en) * 2010-09-03 2016-06-27 엘지이노텍 주식회사 light emitting device
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JP2831667B2 (en) * 1988-12-14 1998-12-02 株式会社東芝 Semiconductor laser device and method of manufacturing the same
US5008718A (en) * 1989-12-18 1991-04-16 Fletcher Robert M Light-emitting diode with an electrically conductive window
JPH0715038A (en) * 1993-06-21 1995-01-17 Toshiba Corp Semiconductor light emitting device
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US6936858B1 (en) 1998-08-21 2005-08-30 Sharp Kabushiki Kaisha Semiconductor light-emitting diode
US6984850B2 (en) 1998-08-21 2006-01-10 Sharp Kabushiki Kaisha Semiconductor light-emitting diode
US6468818B2 (en) * 1999-01-25 2002-10-22 Sharp Kabushiki Kaisha Method for producing a high-luminance semiconductor light-emitting device capable of operating at a low voltage
JP2010141197A (en) * 2008-12-12 2010-06-24 Shin Etsu Handotai Co Ltd Compound semiconductor substrate, light emitting element, method of manufacturing compound semiconductor substrate, and method of manufacturing light emitting element

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JP3332785B2 (en) 2002-10-07
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TW472399B (en) 2002-01-11
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KR100329054B1 (en) 2002-08-17
CN1151562C (en) 2004-05-26
KR19980071848A (en) 1998-10-26

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