JPH10232484A - Device for designing photomask pattern and method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To easily obtain a photomask pattern having improved precision by sampling a pattern cell satisfying prescribed conditions, calculating light intensity distribution and carrying out optimization for fine patterning. SOLUTION: A pattern sampling part 7 samples a part of a photomask pattern not fit for a pattern design rule in a design rule checking part 6, that is, a pattern cell to be optimized. A simulation data transforming part 8 transforms the sampled pattern cell into data fit to perform light intensity simulation. A light intensity simulation-calculation part 9 performs light intensity simulation to the data and calculates light intensity distribution on the surface of a semiconductor wafer in a photolithography process. The resolved state of the pattern is evaluated on the basis of the result of the simulation.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a photomask pattern designing apparatus and a photomask pattern designing method used for designing a photomask pattern.

[0002]

2. Description of the Related Art Conventionally, in the research and development or development prototype stage of a semiconductor process, computer simulation has been used as a technique for grasping the characteristics of a process and a product and simulating prediction and evaluation of device characteristics with respect to manufacturing conditions. Technology is being used, and that technology is currently being actively used. In particular, among many computer simulation technologies, the simulation technology used in the photolithography process in the core microfabrication technology of semiconductor manufacturing technology has been theoretically established and is an indispensable technology in research and development. is there.

[0003] The simulation technology of the exposure process in the photolithography process is particularly called a light intensity simulation technology, which is used when a photomask pattern is exposed and transferred to the surface of a semiconductor wafer using a projection exposure apparatus (stepper). The light intensity distribution of the projection optical image is obtained by calculation. In practice, the light intensity simulation is executed by a computer using software called a light intensity simulator.

[0004] As a physical theory underlying the light intensity simulation technique described above, H. H. Hopkins
The imaging optics theory established by them is known. For more information on this imaging optics theory, see Born, Wolf
Written by "Principles of Optics II and III", 1975, or Hop
Kins; Opt. Soc. Am. Vol. 47,
No. 6 ('57) p508. further,
Lin or Ye as the computer calculation model
See also the model by ung.

In addition, the above-described light intensity simulation technique has an advantage that the exposure distribution on the surface of the semiconductor wafer can be estimated by calculation without actually performing photolithography on the semiconductor wafer. Therefore, it is frequently used in research and development of photolithography processes and device prototypes. Particularly, in recent years, the fact that firstly the processing accuracy required for the fine processing technology is about to reach the limit of processing by light, and secondly, considering the technical and cost aspects, experiments have been actually repeated. In view of the background that device development is difficult to perform, light intensity simulation technology has become increasingly important. This is because light intensity simulation technology
The advantage is that the result (light intensity distribution) can be obtained quickly and at low cost by using a computer.

In a semiconductor wafer pattern design process, a technique called design simulation has been conventionally used. Although this design simulation is a technique different from the light intensity simulation described above, it is a technique for obtaining desired electronic characteristics and circuit characteristics in logic design, circuit design, and the like, and is currently indispensable in mass production processes. is there. The above-described pattern design process is roughly divided into four processes, that is, a functional design process, a logic design process, a circuit design process, and a mask pattern design process, taking a general full custom design LSI process as an example.

FIG. 3 is a flowchart for explaining the conventional pattern design process described above, and is a flowchart for explaining a general LSI pattern design process as an example. In FIG. 3, in step SA1, a functional design having required performance is performed, and then in step SA2, a logical design is performed, and a logic circuit satisfying the functional design is designed.

In step SA3, in order to realize the characteristics required by the embedded circuit designed in step SA2,
A specific circuit including components such as a transistor and a wiring is designed. At Step SA4, Step SA
The mask pattern is designed to determine the shape and arrangement of the individual transistors in the circuit designed in 3 based on the design rules.

Here, the above-mentioned design rule is an LSI
The geometric design rules defined based on the microfabrication accuracy of the manufacturing process and the electronic characteristics of the device, for example,
It refers to the minimum line width of each line, the minimum distance between the line and a line adjacent thereto, the diameter of a contact hole, and the tolerance of alignment between layers. That is, the design rule is a rule for optimizing two-dimensional wiring.

More specifically, in step SA4, using a CAD (Computed Aided Design) tool for design,
By appropriately combining a plurality of symbol diagrams in which elements and wirings are represented by symbols, a photomask pattern satisfying the above-described design rule is designed.

In step SA5, a design rule check (DRC) for verifying whether all the photomask patterns designed in step SA4 satisfy the design rule is performed. Specifically, in step SA5, a design tool check for a photomask pattern is performed by a verification tool called a DRC system, pattern correction is performed for a problematic part, and then photomask pattern data is generated. .

At step SA6, the photomask pattern data generated at step SA5 is output. Then, in step SA7, after a photomask is actually created based on the photomask pattern data, a photolithography process is performed using the photomask.

[0013]

By the way, in the above-described photomask pattern designing method, a series of designing operations described with reference to FIG. 3 are mainly performed to satisfy the logical characteristics of the circuit. Therefore, a photolithography process (step S
In A7), fine processing is not considered, and the device characteristics actually obtained cannot be optimized. In the above-described photomask pattern designing method, the photomask created in step SA7 (hereinafter, referred to as a normal photomask) is replaced with an optical proximity effect correction technology as an extreme technology of microfabrication in a photolithography process, or an ultra-fine technology. It cannot be directly applied to resolution technology. That is, in order to apply the ordinary photomask to the optical proximity correction technology or the like, a photolithography process, at least a photomask pattern design in consideration of an exposure process is necessary, and specifically, the light intensity simulation described above is used. Then, it is necessary to optimize the photomask pattern based on the exposure condition in the optical proximity correction technology or the like. Therefore, in order to apply the photomask pattern (data) generated in step SA6 to the optical proximity correction technique, the photomask pattern must be reorganized based on a special processing rule (hereinafter, referred to as a pattern design rule). I just need. The pattern design rule is a rule dedicated to super-resolution technology or the like, and is completely different from the design rule described above, and is determined by exposure conditions and process conditions in a photolithography process.

However, as is well known, the photomask pattern of an actual LSI circuit is very complicated and enormous, and is composed of hundreds of thousands to millions of closed figures. Performing the above-described light intensity simulation to optimize the fine processing accuracy for the entire photomask pattern having such an enormous data amount is not practical in consideration of the computer processing speed and the time required for the simulation calculation. Impossible. It is also conceivable to manually extract a part to be optimized (hereinafter referred to as a pattern cell) from all the photomask patterns and then perform light intensity simulation on the pattern cell. It is not realistic considering a great deal of labor and human error. In summary, the photomask pattern design method described above cannot easily obtain a photomask pattern that satisfies the recent fine processing accuracy, and furthermore, the data amount of the photomask pattern is enormous, so that light intensity simulation is performed. It is practically difficult to optimize the pattern.

The present invention has been made in view of such a background, and provides a photomask pattern designing apparatus and a photomask pattern designing method capable of easily obtaining a photomask pattern with improved fine processing accuracy. With the goal.

[0016]

According to a first aspect of the present invention, there is provided a photomask pattern designing apparatus, comprising: a photomask pattern data generating unit configured to generate photomask pattern data of a photomask pattern; A pattern cell extracting means for extracting a pattern cell satisfying a predetermined condition in the photomask pattern; and a light intensity simulation is performed on the pattern cell extracted by the pattern cell extracting means, and a light intensity distribution in the pattern cell is calculated. An optimizing means for optimizing the pattern cell for fine processing based on a result obtained by the calculation and outputting the same as an optimized pattern cell. According to a second aspect of the present invention, in the photomask pattern designing apparatus according to the first aspect, the optimization unit performs the light intensity simulation a plurality of times while changing the conditions of the light intensity simulation. Outputting the optimized pattern cell based on the simulation result most suitable for the fine processing among a plurality of simulation results. According to a third aspect of the present invention, in the photomask pattern designing apparatus according to the first or second aspect, an output unit for outputting data of the photomask pattern in which the optimal pattern cell is incorporated is provided. Features. Further, according to the photomask pattern designing method of the present invention, a first step of generating photomask pattern data of a photomask pattern and a predetermined condition in the photomask pattern based on the photomask pattern data are performed. A second step of extracting pattern cells to be filled, and a light intensity simulation performed on the pattern cells extracted in the second step to calculate a light intensity distribution in the pattern cells based on a result obtained by calculation. A third step of optimizing the pattern cell for fine processing and outputting the same as the optimized pattern cell. According to a fifth aspect of the present invention, in the method for designing a photomask pattern according to the fourth aspect, the third aspect is provided.
In the process of, after performing the light intensity simulation a plurality of times by changing the conditions of the light intensity simulation, based on the simulation result most suitable for the fine processing among a plurality of simulation results,
An optimized pattern cell is output. According to a sixth aspect of the present invention, in the photomask pattern designing method according to the fifth aspect, a fifth step of outputting data of the photomask pattern in which the optimal pattern cell is incorporated is provided. And

[0017]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a photomask pattern designing apparatus according to one embodiment of the present invention. In this figure, reference numeral 1 denotes a mask pattern data input unit, which is used for inputting photomask pattern data generated using the CAD tool described above. That is, the photomask pattern data is as shown in FIG.
Is normal photomask pattern data output in step SA6 shown in FIG.

Reference numeral 2 denotes a pattern feature input unit, which should be optimized in a normal photomask pattern for the purpose of improving the precision of fine processing when a photomask pattern is created by using the above-described optical proximity correction technique or the like. It is used for inputting a pattern design rule which is a condition for extracting a photomask pattern portion. The pattern feature input unit 2 outputs the input pattern design rule as pattern design rule data.

The above-mentioned pattern design rule is determined in consideration of the exposure conditions and the like in a photolithography process of a semiconductor wafer performed as a subsequent process. The reason is as follows. As described above, in the photolithography process of the recent VLSI manufacturing process, it is necessary to improve the resolution and the depth of focus by using an optical proximity effect correction technology, a phase shift mask technology, a modified illumination technology, or the like.

That is, the photomask pattern in the optical proximity effect correction technique or the like not only serves as an original for a simple LSI pattern, but also as an original for realizing desired fine processing accuracy when forming a photomask pattern on a semiconductor wafer. Because it also fulfills the role of
Therefore, the photomask pattern applied to the optical proximity effect correction technology or the like must be optimized so that the fine processing accuracy is considered for the pattern cell to be optimized for the normal photomask pattern. It is.

Here, the pattern cell to be optimized is
This refers to a portion where the desired fine processing accuracy cannot be maintained in the optical proximity effect correction technique or the like. That is, a pattern design rule is applied to a normal pattern portion to be optimized. The specific limit value of the pattern design rule differs depending on which of a plurality of process technologies is used in the photolithography process of the semiconductor wafer. Specifically, the pattern cells to be optimized to which the above-mentioned pattern design rule is applied are, for example, a wiring portion having a dense pattern, a portion where contact holes are arranged in parallel, a portion where memory cell patterns are arranged, and the like. .

For example, when the Levenson type phase shift mask technology is used as the process technology, the pattern design rule is determined in consideration of the light shielding layer pattern and the phase shift layer. Specifically, the pattern design rule is a rule that mainly determines whether the dimension width and the pattern interval are predetermined values. However, since the photomask pattern to be applied is a two-dimensional plane, the pattern design rule is naturally determined in consideration of both the X direction and the Y direction in two dimensions. That is, when the pattern design rule is applied to a normal photomask pattern, a pattern cell to be optimized having the dimension width and the pattern interval equal to or smaller than predetermined values is extracted.

When a technology other than the above-mentioned Reverson type phase shift mask technology is used as a process technology, conditions specific to the technology, such as a dimension width such as a phase shift mask, are used as a pattern design rule.

When the above-described pattern design rule is applied, a conventional design rule check method for checking a logic circuit is used. That is, in this case, in the conventional design rule check method, basic design rules such as pattern dimension width, pattern interval, overlap width, minimum width, minimum interval, and minimum area are represented by numerical values for pattern design rules. You can specify it. Therefore, in the photomask pattern designing apparatus according to the present embodiment, a conventional logic circuit verification tool is applied as it is as a design rule check system.

Reference numeral 3 denotes a display unit for displaying various information necessary for designing a photomask pattern.
Keyboard, mouse, etc. are connected. The operator performs various operations by operating a keyboard or the like while checking the display screen of the display unit 3. In the mask pattern data creation unit 4, reference numeral 5 denotes a storage unit which stores the above-described photomask pattern data and pattern design rule data.

Reference numeral 6 denotes a design rule check unit for checking whether or not the above-described ordinary photomask pattern conforms to the pattern design rule. In particular,
The design rule check unit 6 reads out the photomask pattern data and the pattern design rule data stored in the storage unit 5, and applies the pattern design rule to the photomask pattern obtained from both data.

Reference numeral 7 denotes a pattern extraction unit which extracts a portion of the photomask pattern which does not conform to the pattern design rule, that is, a pattern cell to be optimized (hereinafter referred to as a pre-optimization pattern cell) in the design rule check unit 6. I do. The pre-optimization pattern cell extracted by the pattern extraction unit 7 is a cell composed of a single or a plurality of figures arranged within a certain area in a normal photomask pattern, and is set as a transfer range on a semiconductor wafer. Generally, 2 μm square to 100
The size is about μm square. The size of the pre-optimization pattern cell to be extracted is determined so that a light intensity simulation to be described later is performed on the pre-optimization pattern cell in a short time.

Reference numeral 8 denotes a simulation data conversion unit which converts the pre-optimized pattern cells extracted by the pattern extraction unit 7 into data suitable for executing a light intensity simulation, and converts the data into light intensity simulation data. Output as Further, the simulation data conversion unit 8 specifies the values of the transmittance and the phase difference of the finally completed photomask pattern at the time of the data conversion.

Here, the data of the pre-optimization pattern cell extracted by the pattern extraction section 7 is generally CAD data.
Is the source data of which the graphic information is encoded in a unique format. On the other hand, the converted data (simulation data) suitable for the light intensity simulation is the transmission of the photomask pattern described above for each mesh when the two-dimensional pattern cell before optimization is divided into appropriate meshes. Information on the rate and the phase difference is added. That is, since there is an essential difference that the CAD source data is in the continuous coordinate system and the simulation data is in the discrete coordinate system, the simulation data conversion unit 8 performs data conversion.

Reference numeral 9 denotes a light intensity simulation calculation unit for executing a light intensity simulation on the above-described simulation data. The light intensity simulation calculation unit 9 includes an exposure condition required for the light intensity simulation, that is, The numerical aperture, coherence degree, exposure wavelength and the like of the exposure apparatus are set as parameters.

That is, the light intensity simulation calculation section 9 executes a light intensity simulation on the simulation data to obtain a light intensity distribution on the surface of the semiconductor wafer in the photolithography process. The resolution state of the pattern is evaluated based on the simulation result of the light intensity simulation calculator 9.

The light intensity simulation calculator 9
While automatically changing the parameters for optimization such as pattern dimensions or pattern intervals of simulation data (pattern cells before optimization) little by little,
A light intensity simulation is repeatedly performed a plurality of times, and a pattern cell in which parameters relating to fine processing accuracy, such as resolution and depth of focus, are optimized is selected from the obtained simulation results as a pattern cell after optimization. That is, the light intensity simulation calculator 9 calculates
After automatically changing the parameters for optimization, the parameter with the optimum parameter for the fine processing accuracy is automatically selected. The light intensity simulation calculator 9
In the above, the above selection can also be performed manually, and is appropriately set to automatic selection or manual selection according to the design purpose. Further, the light intensity simulation calculation section 9 has a basic graphic calculation function of changing the pattern dimension width and the like, such as dimension resizing and coordinate offset.

Numeral 10 denotes a simulation result output unit, which outputs the optimized pattern cell obtained by the light intensity simulation calculating unit 9 as optimized pattern cell data. An output unit 11 includes a disk drive, a tape drive, a CRT (cathoderay tube), a printer, and the like, and outputs the optimized pattern cell data as digital information or a hard copy.

Next, the operation of the photomask pattern designing apparatus according to the embodiment will be described with reference to FIG. FIG. 2 is a flowchart illustrating the operation of the photomask pattern designing apparatus according to one embodiment.
In FIG. 2, in step SB1, after a functional design having required performance is performed, step SB2 is performed.
Then, a logic design is performed, and a logic circuit satisfying the above function design is designed.

In step SB3, in order to realize the characteristics required by the embedded circuit designed in step SB2,
A specific circuit including components such as a transistor and a wiring is designed. In step SB4, step SB
The mask pattern is designed to determine the shape and arrangement of the individual transistors in the circuit designed in 3 based on the above-described design rules.

Further, in step SB4, the keyboard (not shown) of the display unit 3 is operated by the operator, so that C is input via the mask pattern data input unit 1.
Mask pattern data as AD data is input. Thus, the mask pattern data is stored in the storage unit 5.

Next, at step SB5, the data of the pattern design rule, which is the extraction condition of the pattern cell before optimization for improving the fine processing accuracy, is input from the data input device (not shown) such as a keyboard input to the operator. Is entered. Thus, the data of the pattern design rule is stored in the storage unit 5.

Next, in step SB6, the design rule check section 6 checks whether or not the photomask pattern obtained from the photomask pattern data stored in the storage section 5 conforms to the pattern design rule. I do. That is, the design rule check unit 6 checks whether there is a pre-optimization pattern cell in the photomask pattern.

Next, in step SB7, the pattern extraction unit 7 extracts the pre-optimization pattern cell checked by the design rule check unit 6 from the photomask pattern, and sends it to the simulation data conversion unit 8. Output.

Next, in step SB8, the simulation data conversion unit 8 converts the pre-optimization pattern cell extracted by the pattern extraction unit 7 into data suitable for executing a light intensity simulation, and converts the data. The data is output to the light intensity simulation calculation unit 9 as light intensity simulation data.

Next, in step SB9, the light intensity simulation calculation section 9 changes the pattern size or pattern interval of the input light simulation data (pattern cell before optimization) a plurality of times while changing the pattern little by little. After running the light intensity simulation repeatedly,
Proceed to step SB10. In step SB10, the light intensity simulation calculation unit 9 selects, from the plurality of obtained simulation results, one in which parameters relating to fine processing accuracy, such as resolution and depth of focus, are optimal as optimized pattern cells.

Next, in step SB11, the simulation result output unit 10 incorporates the optimized pattern cell data into the photomask pattern data stored in the storage unit 5, and optimizes the data. The data is output to the output unit 11 as photomask pattern data. Thus, the output unit 11 outputs the optimized photomask pattern data as digital information or a hard copy.

Next, at step SB12, the output unit 11
After a photomask is created based on the output optimized photomask pattern data, the semiconductor wafer is exposed using the photomask. Thus, a photomask pattern is formed on the surface of the semiconductor wafer. Since the photomask pattern formed at this time is optimized so as to be compatible with the fine processing, the fine processing accuracy such as the resolution and the depth of focus is significantly improved as compared with the conventional one. .

As described above, according to the photomask pattern designing apparatus and the photomask pattern designing method according to the embodiment of the present invention, only the pre-optimized pattern cells to be optimized for the normal photomask pattern are extracted. Later, only the pattern cell before optimization is individually optimized by light simulation,
A photomask pattern with improved fine processing accuracy can be easily created.

Further, according to the photomask pattern designing apparatus and the photomask pattern designing method according to the above-described embodiment, a method of extracting a pre-optimization pattern cell to be optimized from a photomask pattern is used. In addition, even when optimizing a photomask pattern having an enormous data amount, the optimization can be performed automatically in a short time.

[0046]

As described above, according to the present invention,
The light intensity simulation is performed on the pattern cells extracted by the pattern cell extracting means, and based on the result, the pattern cells are optimized for fine processing, so that a photomask pattern with improved fine processing accuracy can be easily obtained. Even when optimization is performed on a photomask pattern that can be created and has a large data amount, optimization can be performed automatically in a short time.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a photomask pattern designing apparatus according to an embodiment of the present invention.

FIG. 2 is a flowchart illustrating an operation of the photomask pattern designing apparatus according to the same embodiment.

FIG. 3 is a flowchart illustrating a conventional photomask design method.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Mask pattern data input part 2 Pattern feature input part 3 Display part 4 Mask pattern data creation part 5 Storage part 6 Design rule check part 7 Pattern extraction part 8 Simulation data conversion part 9 Light intensity simulation calculation part 10 Simulation result output part 11 Output Department

Claims (6)

[Claims] 1. A photomask pattern data generating means for generating photomask pattern data of a photomask pattern, and a pattern cell for extracting a pattern cell satisfying a predetermined condition in the photomask pattern based on the photomask pattern data. Extraction means, based on the result obtained by performing a light intensity simulation on the pattern cells extracted by the pattern cell extraction means and calculating the light intensity distribution in the pattern cells, the pattern cells for fine processing Optimizing means for optimizing and outputting this as an optimized pattern cell. A photomask pattern designing apparatus, comprising: 2. The optimizing means performs the light intensity simulation a plurality of times while changing the conditions of the light intensity simulation, and then, optimizes the simulation result among the plurality of simulation results that is most suitable for the fine processing. The photomask pattern designing apparatus according to claim 1, wherein the optimized pattern cell is output based on the information. 3. The photomask pattern designing apparatus according to claim 1, further comprising an output unit that outputs data of the photomask pattern in which the optimal pattern cell is incorporated. 4. A first step of generating photomask pattern data of a photomask pattern, and a second step of extracting a pattern cell satisfying a predetermined condition in the photomask pattern based on the photomask pattern data. Optimizing the pattern cell for fine processing based on a result obtained by performing a light intensity simulation on the pattern cell extracted in the second process and calculating a light intensity distribution in the pattern cell by calculation. And a third step of outputting the optimized pattern cell as the optimized pattern cell. 5. In the third step, after performing the light intensity simulation a plurality of times while changing the conditions of the light intensity simulation, the simulation that is most suitable for the fine processing among a plurality of simulation results. The method according to claim 4, wherein an optimized pattern cell is output based on the result. 6. The method according to claim 5, further comprising a fifth step of outputting data of the photomask pattern in which the optimal pattern cell is incorporated.