CN112685980A - Layout DRC violation comparison and positioning method - Google Patents
Layout DRC violation comparison and positioning method Download PDFInfo
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Abstract
The invention provides a layout DRC violation comparison and positioning method, which comprises the steps of generating an original edition violation coordinate file containing original edition violation coordinates and a new edition violation coordinate file containing new edition violation coordinates; judging whether the violation types are consistent; if the original edition default coordinate file and the new edition default coordinate file are consistent and are all polygons, respectively converting the original edition default coordinate file and the new edition default coordinate file into an original edition layout file and a new edition layout file, comparing the original edition layout file and the new edition layout file, and highlighting and positioning different polygons after comparison; if the types of the illegal coordinates are consistent and are all edges, highlighting and positioning different edges after comparison; if the types of the violation coordinates are not consistent, the violation coordinates are converted into consistent types. The method for comparing and positioning the layout DRC violation can efficiently realize the comparison and positioning of the layout violation, and avoids the defects of time consumption, labor consumption and error proneness of manual comparison when the number of the violation is excessive, thereby improving the efficiency and accuracy of DRC development, shortening the project cycle and reducing the research and development cost.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a layout DRC violation comparison and positioning method.
Background
The layout design rule is a key factor for ensuring the success of circuit design, the smooth mass production of products and the yield of chips. As process nodes are gradually reduced, layout design rules become more and more complex, and the accuracy of Design Rule Check (DRC) is also important. In the development process of DRC, in order to ensure the accuracy of new version DRC, a typical method is to evaluate the same layout with original version DRC and compare the number and position of layout violations of two versions DRC checks. When the number of the violations is too large, the manual comparison method is time-consuming, labor-consuming and prone to errors, and the efficiency and accuracy of DRC development cannot be guaranteed.
The coordinate data comparison method of DRC file disclosed in the prior art discloses a rule of data coordinate comparison, but does not provide a specific implementation step of coordinate comparison. And the coordinates of the error graph are all rectangular coordinates, and the comparison between other types of coordinates (such as other polygonal coordinates and side coordinates) and the comparison method between different types of coordinates (such as polygonal coordinates and side coordinates) are not solved.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, the present invention aims to provide a method for comparing and locating layout DRC violations, which is used to solve the problem that in the prior art, in the rule for comparing data coordinates, comparison between different types of graphic coordinates is lacking to meet the requirements of DRC development.
To achieve the above and other related objects, the present invention provides a method for comparing and locating layout DRC violations, which at least includes:
firstly, providing a layout for DRC evaluation, and respectively evaluating the layout by using an original edition DRC method and a new edition DRC method to respectively generate an original edition violation coordinate file containing original edition violation coordinates and a new edition violation coordinate file containing new edition violation coordinates;
judging whether the violation types of the original edition violation coordinates and the new edition violation coordinates are consistent or not;
if the violation types are consistent and are polygons, respectively converting the original edition violation coordinate file and the new edition violation coordinate file into an original edition layout file and a new edition layout file, then comparing the original edition layout file and the new edition layout file, and highlighting and positioning different polygons after comparison; or comparing the original edition violation coordinate file with the new edition violation coordinate file by using a coordinate comparison and filtering method, and highlighting and positioning different polygons after comparison;
if the types of the violation coordinates are consistent and are all edges, comparing the original edition violation coordinate file with the new edition violation coordinate file by using a coordinate comparison and filtering method, and highlighting and positioning different edges after comparison;
if the types of the violation coordinates are not consistent, firstly converting the violation coordinates into consistent types to obtain an original edition violation coordinate file and a new edition violation coordinate file which are consistent in type after conversion, then respectively storing the original edition violation coordinate file and the new edition violation coordinate file which are consistent in type after conversion into an original edition layout file and a new edition layout file, then comparing the original edition layout file and the new edition layout file, and highlighting and positioning different polygons after comparison; or comparing the original edition violation coordinate file with the new edition violation coordinate file by using a coordinate comparison and filtering method, and highlighting and positioning different polygons after comparison.
Preferably, in the second step, whether the violation type is a polygon or an edge is determined according to the expression form of the violation coordinates, so as to determine whether the violation types are consistent.
Preferably, in the second step, the layout editing software is used for converting the original edition violation coordinate file and the new edition violation coordinate file into an original edition layout file and a new edition layout file respectively.
Preferably, in the second step, the original layout file and the new layout file are compared in the layout editing software, the same graphs are filtered, only different polygon graphs are left, and different polygons after comparison are positioned in a highlighted mode.
Preferably, in the second step, the polygons different after comparison are highlighted in the layout.
Preferably, in the second step, different polygon graphics are stored as a new coordinate file.
Preferably, the method for comparing and filtering coordinates in step two includes: and automatically screening the original edition violation coordinate file and the new edition violation coordinate file, filtering out the same coordinate in the same inspection rule, and leaving different coordinates.
Preferably, in the second step, when the types of the violation coordinates are not consistent, the violation coordinates are converted into consistent types through automatic script conversion.
Preferably, the automated script conversion comprises a conversion of polygon coordinates to edge coordinates or a conversion of edge coordinates to polygon coordinates.
As mentioned above, the method for comparing and positioning layout DRC violations has the following beneficial effects: the method for comparing and positioning the layout DRC violation can efficiently realize the comparison and positioning of the layout violation, and avoids the defects of time consumption, labor consumption and error proneness of manual comparison when the number of the violation is excessive, thereby improving the efficiency and accuracy of DRC development, shortening the project cycle and reducing the research and development cost.
Drawings
FIG. 1 is a flow chart of a method for comparing and locating layout DRC violations in accordance with the present invention;
FIG. 2 is a schematic diagram of a portion of a master violation coordinate file of the present invention;
FIG. 3 is a partial schematic view of a new version violation coordinate file according to the present invention;
FIG. 4 is a diagram illustrating a portion of an original layout file when the violation type in the present invention is polygonal;
FIG. 5 is a partial schematic diagram of a layout file of a new version when the violation type is polygonal in the present invention;
FIG. 6 is a schematic diagram showing different polygonal patterns left after the original layout file and the new layout file are compared in the present invention;
FIG. 7 is a schematic diagram of the present invention after highlighting different polygons to be compared in an evaluated layout;
FIG. 8 is a schematic view of a portion of an original violation coordinate file of the present invention having a violation coordinate type of edge;
FIG. 9 is a partial view of a new version violation coordinate file having a violation coordinate type of edge according to the present invention;
FIG. 10 is a partially schematic illustration of a coordinate file containing different coordinates after the automatic filtering of the edge coordinate type of the present invention;
FIG. 11 is a schematic diagram of the invention showing the automatic filtering of edges after highlighting in the layout being evaluated.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Please refer to fig. 1 to 11. It should be noted that the drawings provided in the embodiments are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed arbitrarily, and the layout of the components may be more complicated.
The invention provides a method for comparing and positioning layout DRC violations, as shown in FIG. 1, FIG. 1 is a flow chart of the method for comparing and positioning the layout DRC violations, and the method at least comprises the following steps:
firstly, providing a layout for DRC evaluation, and respectively evaluating the layout by using an original edition DRC method and a new edition DRC method to respectively generate an original edition violation coordinate file containing original edition violation coordinates and a new edition violation coordinate file containing new edition violation coordinates; as shown in fig. 2 and 3, wherein fig. 2 is a schematic diagram of a portion of a master violation coordinate file of the present invention; FIG. 3 is a partial schematic view of a new version violation coordinate file according to the present invention;
judging whether the violation types of the original edition violation coordinates and the new edition violation coordinates are consistent or not; further, in the second step of this embodiment, whether the violation type is a polygon or an edge is determined according to the expression form of the violation coordinate, so as to determine whether the violation types are consistent.
If the violation types are consistent and are all polygons, the original edition violation coordinate file and the new edition violation coordinate file are respectively converted into an original edition layout file and a new edition layout file. As shown in fig. 4 and 5, fig. 4 is a schematic diagram of a portion of an original layout file when the violation type in the present invention is polygonal; FIG. 5 is a partial schematic diagram of a layout file of a new version when the violation type is polygonal in the present invention;
then, comparing the original layout file with the new layout file, and highlighting and positioning different polygons after comparison; further, in the second step of this embodiment, the original layout file and the new layout file are compared in the layout editing software, the same pattern is filtered, only different polygon patterns are left, and different polygons after comparison are positioned in a highlighted manner. And further, positioning the different polygons in the layout after comparison in a step two in a highlighting manner.
As shown in fig. 6, fig. 6 is a schematic diagram of different polygonal patterns left after comparing the original layout file and the new layout file in the present invention; FIG. 7 is a schematic diagram showing different polygons after being compared and highlighted in the estimated layout according to the present invention.
Or comparing the original edition violation coordinate file with the new edition violation coordinate file by using a coordinate comparison and filtering method, and highlighting and positioning different polygons after comparison; and carrying out highlight positioning on the different polygons after comparison in the layout. In the second step of this embodiment, different polygon graphics are stored as a new coordinate file.
If the types of the violation coordinates are consistent and are all edges, comparing the original edition violation coordinate file with the new edition violation coordinate file by using a coordinate comparison and filtering method, and highlighting and positioning different edges after comparison; as shown in fig. 8 and 9, fig. 8 is a partial schematic diagram of an original violation coordinate file in which the violation coordinate type is an edge according to the present invention; FIG. 9 is a partial schematic view of a new version violation coordinate file with a violation coordinate type of edge according to the present invention.
Further, the method for comparing and filtering coordinates in step two of this embodiment includes: and automatically screening the original edition violation coordinate file and the new edition violation coordinate file, filtering out the same coordinate in the same inspection rule, and leaving different coordinates. A coordinate file is formed containing the different coordinates. And then highlighting in the layout being evaluated. As shown in FIG. 10, FIG. 10 is a schematic diagram of a portion of a coordinate file containing different coordinates after the automatic filtering of the invention in which the coordinate type is edge. As shown in FIG. 11, FIG. 11 is a schematic diagram of the invention showing the automatically filtered edges highlighted in the layout being evaluated.
If the types of the violation coordinates are not consistent, the violation coordinates are converted into consistent types, and an original edition violation coordinate file and the new edition violation coordinate file which are consistent in type after conversion are obtained.
Further, in the second step of this embodiment, when the types of the violation coordinates are not consistent, the violation coordinates are converted into a consistent type through automatic script conversion. Still further, the automated script conversion includes a conversion of polygon coordinates to edge coordinates or a conversion of edge coordinates to polygon coordinates.
For original edition violation coordinate files and new edition violation coordinate files which are consistent in types and are all polygons after conversion, respectively storing the original edition violation coordinate files and the new edition violation coordinate files which are consistent in types after conversion into original edition layout files and new edition layout files, then comparing the original edition layout files and the new edition layout files, and highlighting and positioning different polygons after comparison; or comparing the original edition violation coordinate file with the new edition violation coordinate file by using a coordinate comparison and filtering method, and highlighting and positioning different polygons after comparison.
That is, if the converted type is a polygon, the original edition violation coordinate file and the new edition violation coordinate file with the same converted type are respectively saved as an original edition layout file and a new edition layout file.
Then, comparing the original layout file with the new layout file, and highlighting and positioning different polygons after comparison; the invention further compares the original layout file and the new layout file in the layout editing software, filters out the same graphs, only leaves different polygon graphs, and highlights different polygons in the layout after comparison.
Or comparing the original edition violation coordinate file with the new edition violation coordinate file by using a coordinate comparison and filtering method, storing different polygon graphs as new coordinate files, and highlighting and positioning the different polygons in the layout after comparison.
And comparing the original edition violation coordinate file with the new edition violation coordinate file by using a coordinate comparison and filtering method, and highlighting and positioning different edges after comparison.
If the converted type is an edge, comparing the original edition violation coordinate file with the new edition violation coordinate file by using a coordinate comparison and filtering method, and highlighting and positioning different edges after comparison; further, the method for comparing and filtering coordinates comprises: and automatically screening the original edition violation coordinate file and the new edition violation coordinate file, filtering out the same coordinate in the same inspection rule, and leaving different coordinates.
In conclusion, the method for comparing and positioning the layout DRC violation can efficiently realize the comparison and positioning of the layout violation, and avoids the defects of time consumption, labor consumption and error proneness of manual comparison when the number of the violation is too large, so that the efficiency and the accuracy of DRC development are improved, the project cycle is shortened, and the research and development cost is reduced. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (9)
1. A layout DRC violation comparison and positioning method is characterized by at least comprising the following steps:
firstly, providing a layout for DRC evaluation, and respectively evaluating the layout by using an original edition DRC method and a new edition DRC method to respectively generate an original edition violation coordinate file containing original edition violation coordinates and a new edition violation coordinate file containing new edition violation coordinates;
judging whether the violation types of the original edition violation coordinates and the new edition violation coordinates are consistent or not;
if the violation types are consistent and are polygons, respectively converting the original edition violation coordinate file and the new edition violation coordinate file into an original edition layout file and a new edition layout file, then comparing the original edition layout file and the new edition layout file, and highlighting and positioning different polygons after comparison; or comparing the original edition violation coordinate file with the new edition violation coordinate file by using a coordinate comparison and filtering method, and highlighting and positioning different polygons after comparison;
if the types of the violation coordinates are consistent and are all edges, comparing the original edition violation coordinate file with the new edition violation coordinate file by using a coordinate comparison and filtering method, and highlighting and positioning different edges after comparison;
if the types of the violation coordinates are not consistent, the violation coordinates are converted into consistent types to obtain an original edition violation coordinate file and the new edition violation coordinate file which are consistent in type after conversion;
for original edition violation coordinate files and new edition violation coordinate files which are consistent in types and are all polygons after conversion, respectively storing the original edition violation coordinate files and the new edition violation coordinate files which are consistent in types after conversion into original edition layout files and new edition layout files, then comparing the original edition layout files and the new edition layout files, and highlighting and positioning different polygons after comparison; or comparing the original edition violation coordinate file with the new edition violation coordinate file by using a coordinate comparison and filtering method, and highlighting and positioning different polygons after comparison;
and comparing the original edition violation coordinate file with the new edition violation coordinate file by using a coordinate comparison and filtering method, and highlighting and positioning different edges after comparison.
2. The layout DRC violation comparing and locating method according to claim 1, characterized in that: and in the second step, whether the violation type is a polygon or an edge is judged according to the expression form of the violation coordinates, so that whether the violation types are consistent or not is judged.
3. The layout DRC violation comparing and locating method according to claim 1, characterized in that: and in the second step, the original edition violation coordinate file and the new edition violation coordinate file are respectively converted into an original edition layout file and a new edition layout file by using layout editing software.
4. The layout DRC violation comparing and locating method according to claim 3, characterized in that: and step two, comparing the original layout file with the new layout file in the layout editing software, filtering out the same graphs, only leaving different polygon graphs, and highlighting and positioning the different polygons after comparison.
5. The layout DRC violation comparing and locating method according to claim 4, characterized in that: and step two, highlighting and positioning the different polygons after comparison in the layout.
6. The layout DRC violation comparing and locating method according to claim 5, characterized in that: and step two, storing different polygon graphs as a new coordinate file.
7. The layout DRC violation comparing and locating method according to claim 1, characterized in that: the coordinate comparison and filtering method in the second step comprises the following steps: and automatically screening the original edition violation coordinate file and the new edition violation coordinate file, filtering out the same coordinate in the same inspection rule, and leaving different coordinates.
8. The layout DRC violation comparing and locating method according to claim 1, characterized in that: and in the second step, when the types of the violation coordinates are not consistent, converting the violation coordinates into consistent types through automatic script conversion.
9. The layout DRC violation comparing and locating method according to claim 8, characterized in that: automated script conversion includes conversion of polygon coordinates to edge coordinates or edge coordinates to polygon coordinates.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4571072A (en) * | 1983-09-30 | 1986-02-18 | Honeywell Information Systems Inc. | System and method for making changes to printed wiring boards |
| JPH08185437A (en) * | 1994-12-29 | 1996-07-16 | Dainippon Printing Co Ltd | Cad system provided with actual article collating function |
| JPH10232484A (en) * | 1997-02-21 | 1998-09-02 | Toppan Printing Co Ltd | Device for designing photomask pattern and method therefor |
| JP2002197134A (en) * | 2000-12-27 | 2002-07-12 | Nec Microsystems Ltd | Design rule checking method of hierarchical layout pattern |
| CN103646031A (en) * | 2013-11-08 | 2014-03-19 | 上海华力微电子有限公司 | Method for contrasting coordinate data of DRC files |
| US20190086340A1 (en) * | 2017-09-18 | 2019-03-21 | Elite Semiconductor Inc. | Smart defect calibration system and the method thereof |
-
2020
- 2020-12-25 CN CN202011563235.3A patent/CN112685980B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4571072A (en) * | 1983-09-30 | 1986-02-18 | Honeywell Information Systems Inc. | System and method for making changes to printed wiring boards |
| JPH08185437A (en) * | 1994-12-29 | 1996-07-16 | Dainippon Printing Co Ltd | Cad system provided with actual article collating function |
| JPH10232484A (en) * | 1997-02-21 | 1998-09-02 | Toppan Printing Co Ltd | Device for designing photomask pattern and method therefor |
| JP2002197134A (en) * | 2000-12-27 | 2002-07-12 | Nec Microsystems Ltd | Design rule checking method of hierarchical layout pattern |
| CN103646031A (en) * | 2013-11-08 | 2014-03-19 | 上海华力微电子有限公司 | Method for contrasting coordinate data of DRC files |
| US20190086340A1 (en) * | 2017-09-18 | 2019-03-21 | Elite Semiconductor Inc. | Smart defect calibration system and the method thereof |
Non-Patent Citations (1)
| Title |
|---|
| 王仁平;施隆照;: "电子产品面板控制芯片的物理验证", 电子工艺技术, no. 03, 18 May 2010 (2010-05-18) * |
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