JPH10223613A - Formation of narrow through hole of silicon electrode plate for plasma etching - Google Patents

Formation of narrow through hole of silicon electrode plate for plasma etching

Info

Publication number
JPH10223613A
JPH10223613A JP9026499A JP2649997A JPH10223613A JP H10223613 A JPH10223613 A JP H10223613A JP 9026499 A JP9026499 A JP 9026499A JP 2649997 A JP2649997 A JP 2649997A JP H10223613 A JPH10223613 A JP H10223613A
Authority
JP
Japan
Prior art keywords
electrode plate
silicon electrode
holes
wire
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP9026499A
Other languages
Japanese (ja)
Inventor
Hisao Ifukuro
久生 衣袋
Takashi Yonehisa
孝志 米久
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Materials Corp
Original Assignee
Mitsubishi Materials Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Materials Corp filed Critical Mitsubishi Materials Corp
Priority to JP9026499A priority Critical patent/JPH10223613A/en
Publication of JPH10223613A publication Critical patent/JPH10223613A/en
Withdrawn legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To form narrow through holes having no work modified layer through a silicon electrode plate by passing a wire through the holes and sliding the wire in the holes while paste containing abrasive grains is applied to the wire. SOLUTION: A silicon electrode plate 12 with narrow through holes 5 respectively having finished inside diameters of 0.2mm, 0.3mm, 0.4mm, 0.5mm, 0.6mm, and 0.8mm is manufactured by removing work damage layers 9 on the internal surfaces of the holes 5 by passing a wire 11 having a small diameter of 0.01mm through the holes 5 after the front end of the wire 11 is made thinner by etching and sliding the wire 11 in the holes 5 while paste 13 containing abrasive grains is applied to the wire 11, and then, completely removing the work modified layers 9 from the surface of the electrode plate 2 by removing the surface of the plate 2 to a depth of 2mm and smoothening the internal surfaces of the holes 5 by etching. Therefore, a silicon electrode plate for plasma etching having narrow through holes 5 containing no work modified layer can be manufactured.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は、プラズマエッチ
ング装置に使用するシリコン電極板に貫通細孔を形成す
る方法、特に、直径:0.08〜0.9mmの内面に加
工変質層のない貫通細孔を形成する方法に関するもので
ある。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming through-holes in a silicon electrode plate used in a plasma etching apparatus, and more particularly to a method for forming through-holes having a diameter of 0.08 to 0.9 mm without an affected layer. The present invention relates to a method for forming a hole.

【0002】[0002]

【従来の技術】一般に、半導体集積回路を製造する際
に、ウエハをエッチングする必要があるが、このウエハ
をエッチングするための装置として、近年、プラズマエ
ッチング装置が用いられている。このプラズマエッチン
グ装置は、例えば図7に示されるように、真空容器1内
に電極板2および架台3が間隔をおいて設けられてお
り、架台3の上にウエハ4を載置し、エッチングガス7
を電極板2に設けられた貫通細孔5を通してウエハ4に
向って流しながら高周波電源6により電極板2と架台3
の間に高周波電圧を印加することができるようになって
いる。
2. Description of the Related Art Generally, when manufacturing a semiconductor integrated circuit, it is necessary to etch a wafer. A plasma etching apparatus has recently been used as an apparatus for etching the wafer. In this plasma etching apparatus, for example, as shown in FIG. 7, an electrode plate 2 and a gantry 3 are provided at an interval in a vacuum vessel 1, and a wafer 4 is placed on the gantry 3, and an etching gas is 7
While flowing toward the wafer 4 through the through holes 5 provided in the electrode plate 2,
During which a high-frequency voltage can be applied.

【0003】この高周波電圧の印加により供給されたエ
ッチングガス7は電極板2と架台3の間の空間でプラズ
マ10となり、このプラズマ10がウエハ4に当ってウ
エハ4の表面がエッチングされる。このプラズマエッチ
ング装置で使用する電極板2として、図8の断面図に示
されるような複数の貫通細孔5が形成されているシリコ
ン電極板12が使用されている。この貫通細孔5は通常
は細い超硬ドリルまたはダイヤモンドコーティングドリ
ルなどを用いて機械的に成形していた。
The etching gas 7 supplied by the application of the high-frequency voltage turns into a plasma 10 in a space between the electrode plate 2 and the gantry 3, and the plasma 10 hits the wafer 4 to etch the surface of the wafer 4. As the electrode plate 2 used in this plasma etching apparatus, a silicon electrode plate 12 in which a plurality of through-holes 5 are formed as shown in a sectional view of FIG. 8 is used. The through-holes 5 were usually formed mechanically using a thin carbide drill or a diamond-coated drill.

【0004】[0004]

【発明が解決しようとする課題】近年、シリコン電極板
に形成される貫通細孔5は微細で数が多いほどエッチン
グガスの流れが定常流となって好ましいところから、シ
リコン電極板に形成される貫通細孔5は、従来よりも一
層微細で数多く明けるように求められている。かかる従
来よりも微細な貫通細孔(直径:0.08〜0.9mm
を有する貫通細孔)を多数明けるには細い超硬ドリルま
たはダイヤモンドコーティングドリルなどの機械的方法
では限界があり、そのためレーザー加工法または放電加
工法が使用されている。
In recent years, the through-holes 5 formed in the silicon electrode plate are formed in the silicon electrode plate because the finer and larger the number of the through holes, the more preferable the flow of the etching gas becomes the steady flow. The through-pores 5 are required to be finer and more numerous than before. Such through-holes finer than before (diameter: 0.08 to 0.9 mm)
There is a limit in drilling a large number of through-pores having mechanical properties such as a thin carbide drill or a diamond-coated drill, and therefore, a laser machining method or an electric discharge machining method is used.

【0005】ところが、レーザー加工法または放電加工
法を使用して明けた微細な貫通細孔は、図1に示される
ごとく、貫通細孔5の内面に加工変質層9が形成され、
この加工変質層9を有する貫通細孔を設けたシリコン電
極板を用いてウエハをプラズマエッチング処理すると、
パーティクルが多く発生し、従って、シリコン電極板に
微細な貫通細孔を形成する方法としては前記レーザー加
工法または放電加工法は好ましくなく、加工変質層のな
い微細な貫通細孔をシリコン電極板に形成する新たな孔
明け方法が求められている。
However, as shown in FIG. 1, the fine through-holes formed by using the laser machining method or the electric discharge machining method have a deteriorated machining layer 9 formed on the inner surface of the through-holes 5.
When a wafer is plasma-etched using a silicon electrode plate provided with through-holes having the processing-altered layer 9,
Many particles are generated, and therefore, as a method of forming fine through-pores in the silicon electrode plate, the laser machining method or the electric discharge machining method is not preferable. There is a need for a new method of forming holes.

【0006】[0006]

【課題を解決するための手段】そこで、本発明者等は、
かかる観点から、内面に加工変質層のない直径:0.0
8〜0.9mmの貫通細孔を形成する方法を開発すべく
研究を行った結果、レーザー加工法または放電加工法を
使用して明けた微細な貫通細孔5に、図2に示されるよ
うに、ワイヤ11を通し、このワイヤに砥粒を含むペー
ストを塗布しながらワイヤを摺動させると、レーザー加
工または放電加工で形成された加工変質層9は除去され
る、という知見を得たのである。
Means for Solving the Problems Accordingly, the present inventors have
From this point of view, the diameter of the inner surface without the affected layer: 0.0
As a result of researching to develop a method of forming through holes of 8 to 0.9 mm, fine through holes 5 formed by using a laser machining method or an electric discharge machining method as shown in FIG. Then, when the wire was slid while passing the wire 11 and applying paste containing abrasive grains to the wire, the damaged layer 9 formed by laser machining or electric discharge machining was removed. is there.

【0007】この発明は、かかる知見に基づいてなされ
たものであって、(1)シリコン電極板にレーザー加工
または放電加工により貫通細孔を形成した後、形成され
た貫通細孔にワイヤを通し、このワイヤに砥粒を含むペ
ーストを塗布しながらワイヤを摺動させるシリコン電極
板の貫通細孔形成方法、に特徴を有するものである。
The present invention has been made based on this finding. (1) After forming through holes in a silicon electrode plate by laser machining or electric discharge machining, a wire is passed through the formed through holes. And a method for forming through-pores in a silicon electrode plate in which the wire is slid while applying a paste containing abrasive grains to the wire.

【0008】前記レーザー加工または放電加工によりシ
リコン電極板に形成された貫通細孔の始端部は一般にす
り鉢状になって太径となる。ワイヤを貫通細孔の始端部
よりも太径のものを使用すれば加工変質層は完全に除去
されるが、通常はレーザー加工または放電加工により形
成された貫通細孔の始端部の径よりも細い径のワイヤを
使用するところから、図3に示されるごとく貫通細孔の
始端部に形成されている加工変質層9は残留する。その
ため、シリコン電極板にレーザー加工または放電加工に
より形成された貫通細孔にワイヤを通し、このワイヤに
砥粒を含むペーストを塗布しながらワイヤを前後に摺動
させるて貫通細孔を形成した後、図4に示されるシリコ
ン電極板の表面層14を削除することにより加工変質層
は完全に除去することができる。
The starting end of the through-hole formed in the silicon electrode plate by the laser processing or the electric discharge processing generally has a mortar shape and a large diameter. If a wire having a diameter larger than the starting end of the through-hole is used, the damaged layer is completely removed.However, usually, the diameter of the through-hole formed by laser processing or electric discharge machining is larger than the diameter of the starting end of the through-hole. Since the wire having a small diameter is used, the deteriorated layer 9 formed at the beginning of the through-hole remains as shown in FIG. Therefore, after passing a wire through the through hole formed by laser machining or electric discharge machining on the silicon electrode plate, and sliding the wire back and forth while applying paste containing abrasive grains to this wire, after forming the through hole By removing the surface layer 14 of the silicon electrode plate shown in FIG. 4, the affected layer can be completely removed.

【0009】従って、この発明は、(2)前記(1)記
載の方法で貫通細孔を形成したシリコン電極板のレーザ
ー加工開始側または放電加工開始側のシリコン電極板の
表面層を研削除去するシリコン電極板の貫通細孔形成方
法、に特徴を有するものである。
Accordingly, the present invention provides (2) grinding and removing the surface layer of the silicon electrode plate on the laser processing start side or the electric discharge machining start side of the silicon electrode plate having the through-holes formed by the method described in the above (1). A method for forming through-pores in a silicon electrode plate.

【0010】前記(1)または(2)記載の方法で貫通
細孔を形成したシリコン電極板をエッチングして貫通細
孔内面の粗さを滑らかにすることが一層好ましい、従っ
て、この発明は、(3)前記(1)または(2)記載の
方法で貫通細孔を形成したシリコン電極板をエッチング
して貫通細孔の内面の粗さを滑らかにするシリコン電極
板の貫通細孔形成方法、に特徴を有するものである。
[0010] It is more preferable that the silicon electrode plate in which the through pores are formed by the method described in the above (1) or (2) is etched to smooth the roughness of the inner surface of the through pores. (3) A method of forming through-pores in a silicon electrode plate in which the silicon electrode plate in which through-pores are formed by the method described in (1) or (2) above is etched to smooth the inner surface of the through-holes. It is characterized by the following.

【0011】[0011]

【発明の実施の形態】BEST MODE FOR CARRYING OUT THE INVENTION

実施例 直胴部の直径:400mm、全長:1000mmの無欠陥単
結晶シリコンインゴットを用意し、このインゴットをダ
イヤモンドハンドソーにより厚さ:10mmに輪切り切断
し、輪切り切断した単結晶シリコン板を研削加工して、
直径:350mm、板厚:8mmの寸法を有するシリコン電
極板を作製し、このシリコン電極板にレーザビームを照
射することにより仕上げ貫通細孔よりも小さい内径を有
する貫通細孔を2.0mm間隔で4000個明けた。一
方、仕上げ貫通細孔の内径より0.01mm細い直径を
有するワイヤを用意し、このワイヤの先端をエッチング
により細くした後、貫通細孔にワイヤの先端を挿入し、
ワイヤに砥粒を含むペーストを塗布しながらワイヤを摺
動させることにより貫通細孔内面の加工変質層を除去
し、さらに貫通細孔を形成したシリコン電極板の表面を
厚さ:2mmに亘って削除して加工変質層を完全に除去し
た後、エッチング処理して貫通細孔内面の粗さを滑らか
にすることにより、内径がそれぞれ0.2mm,0.3
mm,0.4mm,0.5mm,0.6mmおよび0.
8mmの仕上げ貫通細孔を有するシリコン電極板を作製
した。
Example A defect-free single crystal silicon ingot having a diameter of a straight body of 400 mm and a total length of 1000 mm was prepared. hand,
A silicon electrode plate having a diameter of 350 mm and a plate thickness of 8 mm is prepared, and the silicon electrode plate is irradiated with a laser beam to form through holes having an inner diameter smaller than the finished through holes at 2.0 mm intervals. 4000 pieces have opened. On the other hand, a wire having a diameter 0.01 mm smaller than the inner diameter of the finished through-hole is prepared, and after the tip of this wire is thinned by etching, the tip of the wire is inserted into the through-pore,
By sliding the wire while applying a paste containing abrasive grains to the wire, the affected layer on the inner surface of the through-hole is removed, and the surface of the silicon electrode plate having the through-hole formed thereon has a thickness of 2 mm. After removal to completely remove the work-affected layer, the inner surface of the through-hole is smoothed by etching to make the inner diameters 0.2 mm and 0.3 mm, respectively.
mm, 0.4 mm, 0.5 mm, 0.6 mm and 0.
A silicon electrode plate having a finished through hole of 8 mm was produced.

【0012】このシリコン電極板をプラズマエッチング
装置にセットし、 チャンバー内圧力:10-1Torr、 ガス流量比:90sccmCHF3 +4sccmO2 +150sc
cmHe、 高周波電力:300W、 エッチング時間:1.0min.、 の条件で、CVDによりSiO2 層を施した直径:15
2mmのウエハをプラズマエッチングを行ない、エッチン
グしたウエハ表面に付着した直径:1μm以上のパーテ
ィクルの数を測定し、さらにウエハのエッチング均一性
を測定し、その結果を表1に示すとともにこの表1の値
を図5および図6のグラフに示した。なお、ウエハのエ
ッチング均一性は、ウエハの最も深くエッチングされた
所の深さ:Aを測定し、さらに最も浅くエッチングされ
た所の深さ:Bを測定し、このAおよびBの測定値を
(A−B)/B×100(%)の式に代入し求めた値で
ある。
The silicon electrode plate was set in a plasma etching apparatus, and the pressure in the chamber was 10 -1 Torr and the gas flow ratio was 90 sccm CHF 3 +4 sccm O 2 +150 sc
cmHe, high-frequency power: 300 W, etching time: 1.0 min., diameter of SiO 2 layer formed by CVD under the following conditions: 15
A 2 mm wafer was subjected to plasma etching, the number of particles having a diameter of 1 μm or more attached to the etched wafer surface was measured, and the etching uniformity of the wafer was measured. The results are shown in Table 1 and Table 1. The values are shown in the graphs of FIGS. In addition, the etching uniformity of the wafer is measured by measuring the depth: A of the deepest etched portion of the wafer, measuring the depth of the shallowest etched portion: B, and measuring the measured values of A and B. It is a value obtained by substituting into the equation of (AB) / B × 100 (%).

【0013】従来例 実施例で作製したシリコン電極板にレーザビームを照射
し、ワイヤを通すことなく内径がそれぞれ0.2mm,
0.3mm,0.4mm,0.5mm,0.6mmおよ
び0.8mmを有する仕上げ貫通細孔を2mm間隔で40
00個明けたシリコン電極板を作製した。この従来例に
より得られたシリコン電極板の貫通細孔の内面には加工
変質層が残っており、この加工変質層が残っているシリ
コン電極板を用いて実施例と同じ条件でプラズマエッチ
ングを行ない、エッチングしたウエハ表面に付着した直
径:1μm以上のパーティクルの数を測定し、さらにウ
エハのエッチング均一性を測定し、その結果を表1に示
すとともにこの表1の値を図5および図6のグラフに示
した。
Conventional Example A laser beam was applied to the silicon electrode plate manufactured in the embodiment, and the inner diameter was 0.2 mm and the inner diameter was 0.2 mm without passing through a wire.
Finished through pores having 0.3 mm, 0.4 mm, 0.5 mm, 0.6 mm and 0.8 mm are formed at intervals of 2 mm.
00 silicon electrode plates were prepared. A deteriorated layer remains on the inner surface of the through-hole of the silicon electrode plate obtained by the conventional example, and plasma etching is performed using the silicon electrode plate having the deteriorated layer under the same conditions as in the embodiment. The number of particles having a diameter of 1 μm or more attached to the etched wafer surface was measured, and the etching uniformity of the wafer was measured. The results are shown in Table 1, and the values in Table 1 are shown in FIGS. Shown in the graph.

【0014】[0014]

【表1】 [Table 1]

【0015】表1並びに図5および図6に示される結果
から、この発明の実施例で得られたシリコン電極板を使
用してウエハをプラズマエッチングすると、従来例で得
られたシリコン電極板を使用してウエハをプラズマエッ
チングするよりも、付着するパーティクルの数が格段に
少なく、さらにウエハのエッチングが均一になることが
分かる。なお、この実施例ではシリコン電極板を単結晶
シリコンインゴットから作製したが、多結晶シリコンイ
ンゴットから作製したシリコン電極板についても同じ結
果が得られた。
From the results shown in Table 1 and FIGS. 5 and 6, when the wafer is plasma-etched using the silicon electrode plate obtained in the embodiment of the present invention, the silicon electrode plate obtained in the conventional example is used. It can be seen that the number of particles adhering is much smaller than that of performing plasma etching on the wafer, and that the etching of the wafer becomes more uniform. In this example, the silicon electrode plate was manufactured from a single crystal silicon ingot, but the same result was obtained for a silicon electrode plate manufactured from a polycrystalline silicon ingot.

【0016】[0016]

【発明の効果】上述のように、この発明の方法による
と、加工変質層のない微細な貫通細孔を有するプラズマ
エッチング用シリコン電極板を作製することができ、得
られた加工変質層のないシリコン電極板は、ウエハのプ
ラズマエッチングに際してウエハ表面に付着するパーテ
ィクルが極めて少なく、さらにウエハを均一にむらなく
エッチングできるところから、プラズマエッチングによ
る半導体集積回路の不良品発生を大幅に減らすことがで
き、半導体装置産業の発展に大いに貢献しうるものであ
る。
As described above, according to the method of the present invention, it is possible to manufacture a silicon electrode plate for plasma etching having fine through-holes without a processing-altered layer, and to obtain an obtained processing-altered layer without a processing-altered layer. Since the silicon electrode plate has extremely few particles attached to the wafer surface during the plasma etching of the wafer and can uniformly etch the wafer, the occurrence of defective semiconductor integrated circuits due to plasma etching can be greatly reduced. It can greatly contribute to the development of the semiconductor device industry.

【図面の簡単な説明】[Brief description of the drawings]

【図1】シリコン電極板にレーザー加工または放電加工
により貫通細孔を形成した状態を説明するための断面説
明図である。
FIG. 1 is an explanatory cross-sectional view for explaining a state in which through-pores are formed in a silicon electrode plate by laser processing or electric discharge processing.

【図2】この発明のシリコン電極板に貫通細孔を形成す
る方法を説明するための断面説明図である。
FIG. 2 is an explanatory cross-sectional view for explaining a method of forming through-pores in a silicon electrode plate according to the present invention.

【図3】この発明のシリコン電極板に貫通細孔を形成方
法を説明するための断面説明図である。
FIG. 3 is an explanatory cross-sectional view for explaining a method of forming through-holes in a silicon electrode plate of the present invention.

【図4】この発明のシリコン電極板に貫通細孔を形成す
る方法を説明するための断面説明図である。
FIG. 4 is an explanatory cross-sectional view for explaining a method of forming through-pores in a silicon electrode plate of the present invention.

【図5】シリコン電極板の貫通細孔に対するパーティク
ル数を示すグラフである。
FIG. 5 is a graph showing the number of particles with respect to through pores of a silicon electrode plate.

【図6】シリコン電極板の貫通細孔に対するエッチング
均一性を示すグラフである。
FIG. 6 is a graph showing etching uniformity with respect to through pores of a silicon electrode plate.

【図7】プラズマエッチング装置の断面説明図である。FIG. 7 is an explanatory sectional view of a plasma etching apparatus.

【図8】従来のプラズマエッチング用シリコン電極板の
断面図である。
FIG. 8 is a sectional view of a conventional silicon electrode plate for plasma etching.

【符号の説明】[Explanation of symbols]

1 真空容器 2 電極板 3 架台 4 ウエハ 5 貫通細孔 6 高周波電源 7 プラズマエッチングガス 9 加工変質層 10 ブラズマ 11 ワイヤ 12 シリコン電極板 13 砥粒を含むペースト 14 表面層 DESCRIPTION OF SYMBOLS 1 Vacuum container 2 Electrode plate 3 Mount 4 Wafer 5 Penetration pore 6 High frequency power supply 7 Plasma etching gas 9 Deterioration layer 10 Plasma 11 Wire 12 Silicon electrode plate 13 Paste containing abrasives 14 Surface layer

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 シリコン電極板にレーザー加工または放
電加工により貫通細孔を形成した後、形成された貫通細
孔にワイヤを通し、このワイヤに砥粒を含むペーストを
塗布しながらワイヤをに摺動させることを特徴とするシ
リコン電極板の貫通細孔形成方法。
After a through hole is formed in a silicon electrode plate by laser machining or electric discharge machining, a wire is passed through the formed through hole, and the wire is slid while applying a paste containing abrasive grains to the wire. A method for forming through-pores in a silicon electrode plate, characterized in that the method comprises:
【請求項2】 請求項1記載の方法で貫通細孔を形成し
たシリコン電極板のレーザー照射側または放電加工開始
側のシリコン電極板の表面層を研削除去することを特徴
とするシリコン電極板の貫通細孔形成方法。
2. A silicon electrode plate having a through-hole formed by the method according to claim 1, wherein a surface layer of the silicon electrode plate on the laser irradiation side or the electric discharge machining start side is ground and removed. Method for forming through pores.
【請求項3】 請求項1または2記載の方法で貫通細孔
を形成したシリコン電極板をエッチングして貫通細孔内
面の粗さを滑らかにすることを特徴とするシリコン電極
板の貫通細孔形成方法。
3. A through-hole of a silicon electrode plate, wherein the silicon electrode plate having the through-hole formed by the method according to claim 1 or 2 is etched to smooth the inner surface of the through-hole. Forming method.
JP9026499A 1997-02-10 1997-02-10 Formation of narrow through hole of silicon electrode plate for plasma etching Withdrawn JPH10223613A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9026499A JPH10223613A (en) 1997-02-10 1997-02-10 Formation of narrow through hole of silicon electrode plate for plasma etching

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9026499A JPH10223613A (en) 1997-02-10 1997-02-10 Formation of narrow through hole of silicon electrode plate for plasma etching

Publications (1)

Publication Number Publication Date
JPH10223613A true JPH10223613A (en) 1998-08-21

Family

ID=12195191

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9026499A Withdrawn JPH10223613A (en) 1997-02-10 1997-02-10 Formation of narrow through hole of silicon electrode plate for plasma etching

Country Status (1)

Country Link
JP (1) JPH10223613A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100463629B1 (en) * 2001-12-28 2004-12-29 윈텍 이엔지(주) An apparatus for polishing inner wall of through hole of silicon cathode using the plural of wires
JP2007012740A (en) * 2005-06-29 2007-01-18 Sumitomo Electric Ind Ltd Method of processing compound semiconductor substrate
JP2010131806A (en) * 2008-12-03 2010-06-17 Disco Abrasive Syst Ltd METHOD FOR DIVIDING AlTiC SUBSTRATE
CN103182659A (en) * 2011-12-30 2013-07-03 财团法人金属工业研究发展中心 Grinding tool and manufacturing method thereof
TWI476074B (en) * 2011-12-30 2015-03-11
JP2017050118A (en) * 2015-09-01 2017-03-09 三菱マテリアル株式会社 Electrode plate for plasma processing apparatus and method of manufacturing the same
CN114888461A (en) * 2022-05-30 2022-08-12 常州英诺激光科技有限公司 Device and method for processing through hole in thick sapphire by using composite laser

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100463629B1 (en) * 2001-12-28 2004-12-29 윈텍 이엔지(주) An apparatus for polishing inner wall of through hole of silicon cathode using the plural of wires
JP2007012740A (en) * 2005-06-29 2007-01-18 Sumitomo Electric Ind Ltd Method of processing compound semiconductor substrate
JP2010131806A (en) * 2008-12-03 2010-06-17 Disco Abrasive Syst Ltd METHOD FOR DIVIDING AlTiC SUBSTRATE
CN103182659A (en) * 2011-12-30 2013-07-03 财团法人金属工业研究发展中心 Grinding tool and manufacturing method thereof
TWI476074B (en) * 2011-12-30 2015-03-11
JP2017050118A (en) * 2015-09-01 2017-03-09 三菱マテリアル株式会社 Electrode plate for plasma processing apparatus and method of manufacturing the same
CN114888461A (en) * 2022-05-30 2022-08-12 常州英诺激光科技有限公司 Device and method for processing through hole in thick sapphire by using composite laser
CN114888461B (en) * 2022-05-30 2023-05-16 常州英诺激光科技有限公司 Device and method for processing through holes in thick sapphire by composite laser

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