JPH10214935A - Semiconductor ic package and its mounting board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To secure a degree of freedom of a circuit design and cope with any mistakes in a mounting direction by a method wherein a pin array is set asymmetrically in a set of sides and such a connection structure is provided that a pin connection part on a mounting board side coincides with each pin only when mounted from a prescribed direction. SOLUTION: An interval W1 from an upper end part 101 of a package 1 to a pin 102 and an interval W2 from a lower end part 103 to a pin 104 are set as different values with each pin being at equal intervals. Namely, about at least one pin of pins 105 to 108, another pin is not provided at locations 115 to 118 on a line passing through a center point 120. When the package 1 is mounted to a board 10 toward a prescribed direction, a location of each pin provided in the package 1 coincides completely with a location of each of connection parts 11 to 22 provided on a board 10 (a). However, when the board 10 is mounted upside down, those respective location relationships are inconsistent completely to disable mounting (b).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a pin arrangement of a semiconductor IC package.

[0002]

2. Description of the Related Art A semiconductor IC package in which pins are arranged on one or all of a pair of opposing sides of a quadrangle has directionality so that the semiconductor IC package does not operate normally unless it is mounted on a substrate in a prescribed direction. It is configured. The pins of these conventional semiconductor IC packages are symmetrically arranged with respect to the center point of the outer shape of the package.

[0003]

As described above, the pins of the conventional semiconductor IC package are arranged symmetrically with respect to the center point of the package outer shape, and may be erroneously mounted upside down. If the semiconductor IC package is mounted on the board in a wrong direction (for example, upside down), a power supply voltage is supplied to terminals other than the power supply terminal, for example, a signal control terminal and a ground terminal, and in some cases, heat is generated. Or the internal circuit was destroyed.
Therefore, in order to cope with the wrong mounting direction of the semiconductor IC package as described above, pins provided at symmetric positions with respect to the center point of the package outer shape are connected to the same node, for example, a power supply terminal, a signal control terminal, and a ground terminal. (Japanese Patent Application Laid-Open No. 57-543) has been proposed to prevent generation of heat and destruction of an internal circuit when the package is mounted upside down on a substrate.
No. 54, etc.). However, as in the semiconductor IC package proposed above, the order in which terminals such as a power supply terminal, a signal control terminal, and a ground terminal are allocated to each pin is predetermined, which limits the degree of freedom in internal circuit design. Other problems arise.

An object of the present invention is to provide a semiconductor IC package capable of coping with the above-described mounting direction error while securing a degree of freedom in circuit design, and a mounting board thereof.

[0005]

SUMMARY OF THE INVENTION A first semiconductor I of the present invention
The C package and its mounting substrate are square
In a semiconductor IC package in which pins are arranged on a set side or all sides and a mounting board thereof, a pin arrangement is set asymmetrically with respect to one set of sides, and a pin connecting portion on the mounting board side is such that the semiconductor IC package has It is characterized in that it has a connection structure that matches each pin only when mounted from a prescribed direction.

According to the second semiconductor IC package and the mounting board thereof of the present invention, in the first semiconductor IC package and the mounting board thereof, the pin arrangement is related to one set of sides.
It is characterized in that it is set at an asymmetrical position with respect to the center point of the outer shape of the package.

A third semiconductor IC package and a mounting board thereof according to the present invention are characterized in that, in the first semiconductor IC package and the mounting board thereof, a pin arrangement is related to one set of sides.
It is characterized in that it is set at an asymmetric position with respect to the center line of the outer shape of the package.

According to a fourth semiconductor IC package and a mounting board thereof of the present invention, in the first semiconductor IC package and the mounting board thereof, the pin arrangement is related to one set of sides.
It is characterized in that it is set at an asymmetrical position with respect to the center point and center line of the outer shape of the package.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION A semiconductor IC package and a mounting board thereof according to the present invention are provided in a semiconductor IC package and a mounting board thereof having pins arranged on a pair of opposing sides or all sides of a square. When the pins are arranged asymmetrically and the package is oriented in a prescribed direction, the connection portions of the pins provided on the substrate side on which the semiconductor IC package is mounted and all the pins of the package are completely connected. However, when the package is oriented in one or more directions other than the specified direction, the connection between the pins provided on the mounting board and the pins of the package do not match. It is characterized by perfect matching. By adopting such a configuration, it is possible to prevent the package from being mounted on the substrate in a direction other than the prescribed direction. Also,
Since the semiconductor IC package of the present invention does not limit the arrangement order of pins such as a power supply terminal, a signal control terminal, and a ground terminal, the degree of freedom in circuit design can be ensured. Hereinafter, the first to third embodiments of the semiconductor IC package having the above features will be described in order.

(1) First Embodiment FIGS. 1A and 1B show a semiconductor IC according to a first embodiment.
FIG. 1 is a diagram illustrating a configuration of a package (hereinafter, referred to as a package) 1 and a substrate 10 on which the package 1 is mounted. In this package 1, pins are arranged on a pair of sides facing each other in a rectangular shape, and the pins are asymmetric with respect to the center point of the package outer shape, that is, other pins are arranged on a line passing through the pin and the center point 120 of the package outer shape. Not characterized. In the package 1, the pins are provided at equal intervals, and the pins 102 are arranged from the upper end 101 of the package 1.
The distance W1 from the lower end of the package 103 to the pin 1
The interval W2 up to 04 is set to a different value. By arranging the pins in this manner, the pins 105, 106, 1
07, 108, the position (115, 116, 117,
118) is not provided with another pin. FIG. 1A is a diagram illustrating a state where the package 1 is mounted on the substrate 10 in a prescribed direction. In this case, the positions of the pins provided on the package 1 completely match the positions of the connection portions 11 to 22 provided on the substrate 10. FIG. 1B is a diagram illustrating a state in which the package 1 having the above configuration is to be mounted on the substrate 10 in an upside down direction. In this case, the positions of the pins provided on the package 1 and the positions of the connecting portions 11 to 22 provided on the substrate 10 completely disagree, and cannot be mounted. As described above, the pins of the package 1 are
By preventing the semiconductor IC inside the package 1 from being heated or destroyed by applying the power supply voltage to the terminals other than the power supply terminal, it is possible to prevent the semiconductor IC from being heated. The basic concept is the same even when pins are arranged on all sides of the package 1. in this case,
If the pins provided on at least one pair of opposing sides are arranged as shown in FIG. 1A, the same operation and effect can be obtained. Further, as long as the above-described positional relationship between the pins is satisfied, the arrangement intervals of the pins may be non-uniform.

(2) Second Embodiment FIGS. 2A and 2B show a semiconductor IC according to a second embodiment.
FIG. 2 is a diagram illustrating a configuration of a package (hereinafter, referred to as a package) 2. In this package 2, pins are arranged on one set of opposing sides in a rectangular shape, and the pins are arranged asymmetrically with respect to the center line of the package, for example, a dotted line 200 that equally divides the package 2 left and right parallel to the direction in which the pins are arranged. Are asymmetrically arranged with respect to. More specifically,
As shown in FIG. 2A, the pins 201, 203, 20
5, 202, 204, 206, 208, 2
Opposite pins are staggered so that no pins are located at 10,212. By adopting such a configuration, as shown in FIG. 2B, the package 2 cannot be mounted on the substrate upside down. By arranging the pins of the package 2 so that they cannot be mounted on the board in directions other than the prescribed direction, a power supply voltage is applied to terminals other than the power supply terminal, and the semiconductor IC inside the package 2
Can be prevented from generating heat or being destroyed. The basic concept is the same even when pins are arranged on all sides of the package 2. In this case, if the pins provided on at least one pair of opposing sides are alternately arranged as shown in FIG. 2A, the same operation and effect can be obtained. Further, as long as the above-described positional relationship between the pins is satisfied, the arrangement intervals of the pins may be non-uniform.

(3) Third Embodiment FIGS. 3A, 3B, and 3C are diagrams showing a configuration of a semiconductor IC package (hereinafter, referred to as a package) 3 according to a third embodiment. The package 3 is characterized in that pins are arranged on a pair of sides facing each other in a rectangular shape, and the pins are arranged asymmetrically with respect to a center point and a center line. The package 3 employs a pin arrangement in which the pins are not arranged at positions corresponding to the pins on a line passing through the pin and the center point 302 of the package, and equally divides the package left and right parallel to the pin arrangement direction. In the dotted line 300, the pins are arranged asymmetrically. More specifically, with respect to the pins 303, 304, and 305, a dotted line 300
In order not to dispose the pins at the positions 306, 307, and 308 that are line-symmetric with respect to the axis, the opposite pins are alternately arranged, and the positions 309, 3 on a line passing through the center point 302 are arranged.
Pins are arranged so that no pins are arranged at 10 and 311. By employing such a pin arrangement, the package cannot be mounted upside down on the board as shown in FIG. 3B. Further, as shown in FIG. 3C, the package cannot be mounted on the substrate upside down. By arranging the pins of the package 3 so that they cannot be mounted on the board in directions other than the prescribed direction, a power supply voltage is applied to terminals other than the power supply terminal, and the semiconductor IC inside the package 3 generates heat or is broken. Can be prevented. The basic concept is the same even when pins are arranged on all sides of the package 3. In this case, if the pins provided on at least one pair of opposing sides are arranged as shown in FIG. 3A, the same operation and effect can be obtained.
Further, as long as the above-described positional relationship between the pins is satisfied, the arrangement intervals of the pins may be non-uniform.

[0013]

According to the first semiconductor IC package of the present invention and its mounting substrate, the package cannot be mounted on the substrate in a direction other than the prescribed direction, so that the power supply voltage is applied to the terminals other than the power supply terminal. Further, it is possible to prevent the semiconductor IC inside the package from being heated or broken.

In the second semiconductor IC package and its mounting substrate according to the present invention, since the package cannot be mounted on the substrate in a direction opposite to the specified direction, the power supply voltage is applied to terminals other than the power supply terminal. Thus, it is possible to prevent the semiconductor IC inside the package from being heated or broken.

In the third semiconductor IC package and the mounting board according to the present invention, the package cannot be mounted on the board upside down with respect to the prescribed direction, so that the power supply voltage is applied to terminals other than the power supply terminal. This can prevent the semiconductor IC inside the package from being heated or destroyed.

In the fourth semiconductor IC package and the mounting board according to the present invention, since the package cannot be mounted on the board in a specified upside down direction or upside down, terminals other than the power supply terminal are connected to terminals. It is possible to prevent the semiconductor IC inside the package from being heated or destroyed when the power supply voltage is applied.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a configuration of a semiconductor IC package 1 according to a first embodiment;

FIG. 2 is a diagram illustrating a configuration of a semiconductor IC package 2 according to a second embodiment;

FIG. 3 is a diagram illustrating a configuration of a semiconductor IC package 3 according to a third embodiment;

[Explanation of symbols]

1,2,3 IC package, 10 substrate, 11,1
2,13,14,15,16,17,18,19,2
0,21,22 connection part, 102,104,105,1
06,107,108,201,203,205,20
7, 209, 211, 303, 304, 305 pins,
100, 200, 300, 301 dotted line, 302 midpoint,

Claims (4)

[Claims] 1. A semiconductor IC package having pins arranged on a pair of sides or all sides opposed to each other in a square and a mounting substrate thereof, wherein a pin arrangement is set asymmetrically with respect to the set of sides,
A semiconductor IC package and a mounting board thereof, wherein the pin connection portion on the mounting board side has a connection structure that matches each pin only when the semiconductor IC package is mounted from a prescribed direction. 2. The semiconductor IC package according to claim 1, wherein the pin arrangement is set at an asymmetrical position with respect to a set of sides with respect to a center point of an outer shape of the package. 3. A semiconductor IC package and a mounting board thereof, wherein a pin arrangement is set at a position asymmetrical with respect to a center line of an outer shape of the package with respect to one set of sides. 4. A semiconductor IC package and a mounting board thereof, wherein a pin arrangement is set at a position asymmetrical with respect to a center point and a center line of an outer shape of the package with respect to one set of sides.