JPH10209595A - Board device - Google Patents

Board device

Info

Publication number
JPH10209595A
JPH10209595A JP9009344A JP934497A JPH10209595A JP H10209595 A JPH10209595 A JP H10209595A JP 9009344 A JP9009344 A JP 9009344A JP 934497 A JP934497 A JP 934497A JP H10209595 A JPH10209595 A JP H10209595A
Authority
JP
Japan
Prior art keywords
board
connection terminals
terminals
connection terminal
connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9009344A
Other languages
Japanese (ja)
Inventor
Hiroyuki Yamada
宏之 山田
Mitsuo Haneda
光生 羽根田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP9009344A priority Critical patent/JPH10209595A/en
Publication of JPH10209595A publication Critical patent/JPH10209595A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/366Assembling printed circuits with other printed circuits substantially perpendicularly to each other

Landscapes

  • Multi-Conductor Connections (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

PROBLEM TO BE SOLVED: To prevent short circuits between connection terminals by forming, in a major board, large and small connection terminals alternately in correspondence to those of a sub board. SOLUTION: A sub board 12 is installed upright on a major board 11. In other words, a slot 13 is formed in the major board 11, and a connection terminal section 14 formed in the sub board 12 is inserted into the slot 13. A plurality of connection terminals 15 formed in the connection terminal section 14 are formed closely to each other at intervals of about 2mm. Connection terminals 16 of the major board 11 are formed in the positions corresponding to the connection terminals 15 of the sub board 12. The connection terminals 16 are alternately large and small in size. The connection terminals 15 or 16 are connected to electronic components mounted on the major board 11 or sub board 12. Due to this structure, solder gathers in the large connection terminals, absorbing solder of the small connection terminals, thereby preventing short circuits between the connection terminals.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、電子機器等に使用
される基板装置に関するものである。
The present invention relates to a substrate device used for electronic equipment and the like.

【0002】[0002]

【従来の技術】以下従来の基板装置について説明する。2. Description of the Related Art A conventional substrate device will be described below.

【0003】従来の基板装置は、図3に示すように親基
板1に孔2が設けられ、この孔2に子基板3の端子部4
が挿入されていた。そして、この端子部4には各々隣接
して接続端子5が複数個設けられていた。そしてこれに
対応する親基板1にも接続端子6が複数個設けられてい
た。ここで、子基板3の接続端子5と親基板1の接続端
子6の半田付け部分は同一形状をしていた。
In a conventional board device, a hole 2 is provided in a parent board 1 as shown in FIG.
Was inserted. A plurality of connection terminals 5 were provided adjacent to each of the terminal portions 4. A plurality of connection terminals 6 were also provided on the corresponding parent substrate 1. Here, the soldered portions of the connection terminals 5 of the daughter board 3 and the connection terminals 6 of the parent board 1 had the same shape.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、このよ
うな従来の構成では、接続端子5あるいは接続端子6
が、近接して設けられているので、ディップ半田をする
時に、どうしても、半田が接続端子間でショートしてし
まうという問題があった。
However, in such a conventional configuration, the connection terminal 5 or the connection terminal 6 is not provided.
However, since they are provided close to each other, there is a problem that the solder is short-circuited between the connection terminals when dip soldering is performed.

【0005】本発明は、このような問題を解決するもの
で、接続端子間でのショートを防止する基板装置を提供
することを目的としたものである。
An object of the present invention is to solve such a problem, and an object of the present invention is to provide a substrate device for preventing a short circuit between connection terminals.

【0006】[0006]

【課題を解決するための手段】この目的を達成するため
に本発明の基板装置は、親基板には子基板の接続端子に
対応して大小の親基板の接続端子を交互に設けたもので
ある。
In order to achieve this object, a board device according to the present invention is provided with alternately large and small connection terminals of a parent board corresponding to the connection terminals of a child board. is there.

【0007】この構成により、接続端子間のショートを
防止することができる。
With this configuration, it is possible to prevent a short circuit between the connection terminals.

【0008】[0008]

【発明の実施の形態】本発明の請求項1に記載の発明
は、電子部品が装着されるとともに長孔が設けられた親
基板と、この長孔に挿入されて立設される子基板とを有
し、前記子基板は、前記長孔に挿入される接続端子部
と、この接続端子部に、お互いが近接して設けられた複
数個の子基板の接続端子と、この接続端子間に設けられ
た孔を有するとともに、前記親基板には前記子基板の接
続端子に対応して大小の親基板の接続端子を交互に設
け、前記子基板の接続端子と前記親基板の接続端子と
が、ディップ半田で接続される基板装置であり、このよ
うに、親基板の接続端子は大小の接続端子が交互に設け
られているので、大きい接続端子に半田が集まり、小さ
い接続端子部の半田が吸い取られることになり端子間の
ショートを防止することができる。また、子基板の接続
端子間には孔が設けてあるので、ディップ半田時に発生
するガスをそこから放出して端子間のショートの防止効
果を更に高めている。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention according to a first aspect of the present invention is directed to a mother board on which electronic components are mounted and provided with a long hole, and a child board which is inserted into the long hole and stands upright. Having a connection terminal portion inserted into the elongated hole, a plurality of connection terminals of the plurality of child substrates provided close to each other in the connection terminal portion, and between the connection terminals. With the holes provided, the connection terminals of the parent substrate are alternately provided on the parent substrate corresponding to the connection terminals of the child substrate, and the connection terminals of the child substrate and the connection terminals of the parent substrate are provided. This is a board device that is connected by dip soldering. In this way, the connection terminals of the parent board are provided with large and small connection terminals alternately, so that the solder gathers on the large connection terminals and the solder on the small connection terminal portion is removed. It will be absorbed and prevent short circuit between terminals Kill. Further, since the holes are provided between the connection terminals of the daughter board, the gas generated during the dip soldering is discharged therefrom to further enhance the effect of preventing the short circuit between the terminals.

【0009】請求項2に記載の発明の基板装置は、子基
板の接続端子間に設けられた孔は、長孔とした請求項1
に記載の基板装置であり、孔の形状は長孔となっている
ので、ガスが抜ける面積が大きくなり、よりショート防
止の効果が大きくなる。
According to a second aspect of the present invention, the hole provided between the connection terminals of the daughter board is a long hole.
In the substrate device described in (1), since the shape of the hole is a long hole, the area through which gas escapes is increased, and the effect of preventing short circuit is further increased.

【0010】請求項3に記載の発明は、親基板の接続端
子の両端に近接して各々空きパターンを設けた請求項2
に記載の基板装置であり、ディップ半田付けをしたとき
に一番溜まりやすい外側のパターンの半田が、この空き
パターンに吸い取られるので、端子間のショートは少な
くなる。
According to a third aspect of the present invention, an empty pattern is provided near each end of the connection terminal of the parent substrate.
In the substrate device described in (1), the outer pattern solder that is most likely to accumulate when the dip soldering is performed is sucked by the empty pattern, and thus the short circuit between the terminals is reduced.

【0011】請求項4に記載の発明は、親基板の接続端
子の両端と子基板の接続端子の両端とは、それぞれ捨て
端子とした請求項2に記載の基板装置であり、端子間の
ショートが最も生じやすい両端の端子を捨て端子として
いるので、たとえこの端子がショートしたとしても安全
である。
According to a fourth aspect of the present invention, there is provided the board apparatus according to the second aspect, wherein both ends of the connection terminal of the parent board and both ends of the connection terminal of the child board are discarded terminals. Since the terminals at both ends where the occurrence of the error occurs most are discarded, it is safe even if the terminals are short-circuited.

【0012】請求項5に記載の発明は、親基板の接続端
子の両端と子基板の接続端子の両端とは、それぞれアー
ス端子とした請求項2に記載の基板装置であり、このよ
うに両端をアース端子としているので、外部からの妨害
電波の影響を受けないとともに、たとえ手が触れたとし
てもこの端子はアース電位であるため安全である。
According to a fifth aspect of the present invention, there is provided the board apparatus according to the second aspect, wherein both ends of the connection terminal of the parent board and both ends of the connection terminal of the child board are ground terminals. Is grounded, so that it is not affected by external jamming radio waves, and even if touched, this terminal is at the ground potential and is safe.

【0013】以下本発明の実施の形態について図面を用
いて説明する。図1は本発明の基板装置の要部斜視図で
ある。図1において11は親基板であり、この親基板1
1には子基板12が植立されている。すなわちこの親基
板11には長孔13が設けられており、この長孔13に
子基板12に設けられた接続端子部14が挿入される。
また、15は接続端子部14に設けられた複数個の接続
端子であり、この接続端子15は約2mm間隔で近接し
て設けられている。また16は親基板11に設けられた
接続端子であり、子基板12に設けられた接続端子15
と対応した位置に設けられている。そしてこの接続端子
16は、それぞれ交互には大小の形状となっている。接
続端子15あるいは接続端子16からは、親基板11あ
るいは子基板12に装着された電子部品に接続されてい
る。また接続端子部14の接続端子15間には孔17が
設けられている。この詳細を図2を用いて説明する。
An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a perspective view of a main part of the substrate device of the present invention. In FIG. 1, reference numeral 11 denotes a master board,
In 1, a child substrate 12 is planted. That is, the mother board 11 is provided with the elongated holes 13, and the connection terminal portions 14 provided on the daughter board 12 are inserted into the elongated holes 13.
Reference numeral 15 denotes a plurality of connection terminals provided on the connection terminal portion 14, and the connection terminals 15 are provided close to each other at intervals of about 2 mm. Reference numeral 16 denotes a connection terminal provided on the parent substrate 11, and a connection terminal 15 provided on the child substrate 12.
Is provided at a position corresponding to. The connection terminals 16 are alternately large and small. The connection terminal 15 or the connection terminal 16 is connected to an electronic component mounted on the parent board 11 or the child board 12. A hole 17 is provided between the connection terminals 15 of the connection terminal portion 14. This will be described in detail with reference to FIG.

【0014】図2において、接続端子15と、この接続
端子15に隣接した接続端子15(仮に接続端子15a
という)との間Cは、約2mm間隔で非常に近接してい
る。従って、その間に孔17を設けてディップ半田付け
時に発生するガスの通過量を多くなるよう配慮してい
る。さらにこの孔17は長い方の直径を接続端子15と
平行に設けた長孔とすると共にこの長孔17の長い方の
直径は約2mmとしている。親基板11の接続端子16
は大きな形状の接続端子16aと小さい形状の接続端子
16bとが交互に設けられている。そしてこの両端の端
子16aと16cの外側に捨てパターン18と捨てパタ
ーン19を設けている。これは、A方向にディップ半田
付けしたときの接続端子16aの半田が流れてショート
しないためである。一番端の接続端子16aの半田は半
田の行き場がないので、この捨てパターン18に流れて
良好なディップ半田付けができる。又逆方向に設けられ
た捨てパターン19もB方向にディップ半田付けしたと
きに、これがあるために同様に半田ショートがおこらな
い。
In FIG. 2, a connection terminal 15 and a connection terminal 15 adjacent to this connection terminal 15 (temporarily connection terminal 15a
C) are very close at an interval of about 2 mm. Therefore, a hole 17 is provided therebetween to increase the amount of passing gas generated during dip soldering. Further, the long hole 17 is a long hole having a longer diameter provided in parallel with the connection terminal 15, and the longer diameter of the long hole 17 is about 2 mm. Connection terminal 16 of parent board 11
Are provided with connection terminals 16a having a large shape and connection terminals 16b having a small shape alternately. A discard pattern 18 and a discard pattern 19 are provided outside the terminals 16a and 16c at both ends. This is because the solder of the connection terminal 16a when the dip soldering is performed in the direction A flows to prevent a short circuit. Since the solder of the endmost connection terminal 16a has no place for soldering, it flows into the discard pattern 18 and good dip soldering can be performed. Further, when the discard pattern 19 provided in the opposite direction is also subjected to dip soldering in the B direction, the presence of the dip solder causes no short circuit of the solder.

【0015】また、これらの両端の接続端子16aある
いは16cと、これに対応する子基板の接続端子15も
空きパターンとしておけば、たとえショートしたとして
も安全である。また、この両端の接続端子16a,16
cをアースに接続しておけば、たとえ外から触れたとし
てもアースのため安全である。また、外からの妨害信号
入力の防止にもなる。
If the connection terminals 16a or 16c at both ends and the connection terminals 15 of the daughter board corresponding thereto are also provided with empty patterns, it is safe even if a short circuit occurs. Also, the connection terminals 16a, 16
If c is connected to ground, it is safe even if touched from outside. In addition, it also prevents external interference signal input.

【0016】[0016]

【発明の効果】以上のように本発明によれば、親基板に
は子基板の接続端子に対応して、親基板の接続端子を設
け、この親基板の接続端子は交互に大小の形状を有して
いるので、大の接続端子に半田が集まり、小の接続端子
の半田が吸い取られることになり、端子間のショートを
防止することができる。また、接続端子間には孔が設け
てあるので、ディップ半田時に発生するガスをそこから
放出して端子間のショートの防止効果を更に高めてい
る。
As described above, according to the present invention, the connection terminals of the parent substrate are provided on the parent substrate in correspondence with the connection terminals of the child substrate, and the connection terminals of the parent substrate alternately have large and small shapes. Therefore, the solder collects on the large connection terminals, and the solder of the small connection terminals is sucked, so that a short circuit between the terminals can be prevented. Further, since the holes are provided between the connection terminals, the gas generated during the dip soldering is released therefrom to further enhance the effect of preventing short-circuit between the terminals.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施の形態による基板装置のディッ
プ半田面の要部斜視図
FIG. 1 is a perspective view of a main part of a dip solder surface of a board device according to an embodiment of the present invention.

【図2】同、要部の拡大斜視図FIG. 2 is an enlarged perspective view of a main part of the same.

【図3】従来の基板装置の要部斜視図FIG. 3 is a perspective view of a main part of a conventional substrate device.

【符号の説明】[Explanation of symbols]

11 親基板 12 子基板 13 長孔 14 接続端子部 15 子基板の接続端子 16 親基板の接続端子 17 孔 DESCRIPTION OF SYMBOLS 11 Parent board 12 Child board 13 Long hole 14 Connection terminal part 15 Connection terminal of child board 16 Connection terminal of parent board 17 hole

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 電子部品が装着されるとともに長孔が設
けられた親基板と、この長孔に挿入されて立設される子
基板とを有し、前記子基板は、前記長孔に挿入される接
続端子部と、この接続端子部に、お互いが近接して設け
られた複数個の子基板の接続端子と、この接続端子間に
設けられた孔を有するとともに、前記親基板には前記子
基板の接続端子に対応して大小の親基板の接続端子を交
互に設け、前記子基板の接続端子と前記親基板の接続端
子とが、ディップ半田で接続される基板装置。
An electronic component is mounted on a mother board provided with a long hole, and a child board is inserted into the long hole and stands upright. The child board is inserted into the long hole. The connection terminal portion, the connection terminal portion, the connection terminals of a plurality of daughter boards provided in close proximity to each other, and has a hole provided between the connection terminals, and the parent substrate has the A board device in which connection terminals of a large and small parent board are alternately provided corresponding to connection terminals of a child board, and the connection terminals of the child board and the connection terminals of the parent board are connected by dip soldering.
【請求項2】 子基板の接続端子間に設けられた孔は長
孔とした請求項1に記載の基板装置。
2. The substrate device according to claim 1, wherein the holes provided between the connection terminals of the daughter board are elongated holes.
【請求項3】 親基板の接続端子の両端に近接して各々
空きパターンを設けた請求項2に記載の基板装置。
3. The substrate device according to claim 2, wherein empty patterns are respectively provided near both ends of the connection terminals of the parent substrate.
【請求項4】 親基板の接続端子の両端と子基板の接続
端子の両端とは、それぞれ捨て端子とした請求項2に記
載の基板装置。
4. The board device according to claim 2, wherein both ends of the connection terminal of the parent board and both ends of the connection terminal of the child board are discarded terminals.
【請求項5】 親基板の接続端子の両端と子基板の接続
端子の両端とは、それぞれアース端子とした請求項2に
記載の基板装置。
5. The board device according to claim 2, wherein both ends of the connection terminal of the parent board and both ends of the connection terminal of the child board are ground terminals.
JP9009344A 1997-01-22 1997-01-22 Board device Pending JPH10209595A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9009344A JPH10209595A (en) 1997-01-22 1997-01-22 Board device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9009344A JPH10209595A (en) 1997-01-22 1997-01-22 Board device

Publications (1)

Publication Number Publication Date
JPH10209595A true JPH10209595A (en) 1998-08-07

Family

ID=11717864

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9009344A Pending JPH10209595A (en) 1997-01-22 1997-01-22 Board device

Country Status (1)

Country Link
JP (1) JPH10209595A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2855363A1 (en) * 2003-05-19 2004-11-26 Cedom Printed circuit structure for connecting e.g. siren, has master part and slave parts with reception unit and fixing unit, respectively, where units cooperate with each other to form mechanical and electrical connection
JP2006269550A (en) * 2005-03-22 2006-10-05 Sharp Corp Printed wiring board and its installation structure
JPWO2017212964A1 (en) * 2016-06-08 2019-01-17 三菱電機株式会社 PCB connection structure

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5974759U (en) * 1982-11-09 1984-05-21 日本ビクター株式会社 3D printed wiring board structure
JPH0396072U (en) * 1990-01-23 1991-10-01
JPH05251616A (en) * 1992-03-05 1993-09-28 Rohm Co Ltd Surface mounting type semiconductor device
JPH0883975A (en) * 1994-09-14 1996-03-26 Ricoh Co Ltd Printed-wiring board

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5974759U (en) * 1982-11-09 1984-05-21 日本ビクター株式会社 3D printed wiring board structure
JPH0396072U (en) * 1990-01-23 1991-10-01
JPH05251616A (en) * 1992-03-05 1993-09-28 Rohm Co Ltd Surface mounting type semiconductor device
JPH0883975A (en) * 1994-09-14 1996-03-26 Ricoh Co Ltd Printed-wiring board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2855363A1 (en) * 2003-05-19 2004-11-26 Cedom Printed circuit structure for connecting e.g. siren, has master part and slave parts with reception unit and fixing unit, respectively, where units cooperate with each other to form mechanical and electrical connection
JP2006269550A (en) * 2005-03-22 2006-10-05 Sharp Corp Printed wiring board and its installation structure
JPWO2017212964A1 (en) * 2016-06-08 2019-01-17 三菱電機株式会社 PCB connection structure

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