JPH10200162A - Semiconductor light emitting element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a semiconductor light emitting element in which high luminance can be attained through surface roughening while enhancing the reliability by arranging the peripheral part of a first electrode tightly on a rough surface region. SOLUTION: Since a part of the upper surface 13a of a substrate 13 not covered by an electrode 14, i.e., a light take-out face, is a rough surface region 18, total reflection of a light emitted upward from a PN junction 16 is suppressed and the light can be taken out well to the outside of an element thus realizing high luminance. Since the anode electrode 14 is formed across a mirror surface region 17 and the rough surface region 18 and the peripheral part of the electrode 14 is coupled tightly with a part of the rough surface region 18, side etching can be confined, if any, within the peripheral part extremely close to the electrode 14. Since side etching can be prevented from spreading to the mirror surface region 17 side, the electrode 14 is bonded rigidly to the substrate 13 resulting in the enhancement of reliability of a light emitting element.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device capable of achieving higher luminance and higher reliability.

[0002]

2. Description of the Related Art A conventional semiconductor light emitting device or light emitting diode shown in FIG.
For example, an AlGaAs semiconductor substrate 3, an anode electrode 4, and a cathode electrode 5. The PN junction 6 at the interface between the P-type semiconductor region 1 and the N-type semiconductor region 2 extends parallel to one and the other main surfaces of the semiconductor substrate 3.
The anode electrode 4 is arranged at the center of one main surface (upper surface) of the semiconductor substrate 3 and is connected to the P-type semiconductor region 1. The cathode electrode 5 is formed so as to be lattice-like or dotted, and is connected to the other main surface (lower surface) of the semiconductor substrate 3, that is, the N-type semiconductor region 2. If the cathode electrode 5 is formed so as to be lattice-shaped or dotted, light emitted from the PN junction 6 and directed to the lower surface can be efficiently reflected in the upper surface direction at a portion where the cathode electrode 5 is not provided. The light extraction direction of the semiconductor light emitting device of FIG. 1 is upward, and light emitted upward from the PN junction 6 is extracted from a region of the upper surface of the semiconductor substrate 3 where the anode electrode 4 is not formed. In the semiconductor light emitting device of FIG. 1, the light extraction region on the upper surface of the semiconductor substrate 3 has a rough surface (a fine uneven surface).
It is 7. The rough surface 7 is provided in order to reduce the probability of total reflection of light emitted from the PN junction 6 and to take out light favorably to the outside to achieve high luminance. When forming the rough surface 7, the anode electrode 4 is selectively formed substantially at the center of the upper surface of the semiconductor substrate 3, and then the upper surface of the semiconductor substrate 3 is roughened by etching.

[0003]

When the semiconductor device of FIG. 1 is formed as described above, the etching proceeds to the lower portion of the periphery of the anode electrode 4 during the etching for forming the rough surface 7. So-called side etching may occur. When such side etching occurs, cracks may occur in the semiconductor region 1 below the electrode 4 due to stress or the like when wire bonding is performed on the anode electrode 4. Further, when the wire is bonded to the periphery of the electrode 4 where the side etching has occurred, the pressing force during bonding is not sufficiently applied, so that a bonding failure may occur. Note that it is practically difficult to identify the lower side-etching, that is, the laterally or laterally etched region around the electrode 4 from the state of the upper surface of the electrode 4, and the possibility of wire bonding around the electrode 4 is high. was there.

It is an object of the present invention to provide a semiconductor light emitting device which can achieve high luminance by roughening and can improve reliability.

[0005]

SUMMARY OF THE INVENTION In order to solve the above problems and achieve the above object, the present invention provides a first semiconductor region of a first conductivity type and a second semiconductor region opposite to the first conductivity type. A semiconductor substrate arranged so that a second semiconductor region of a conductivity type forms a PN junction; and a first electrode connected to the first semiconductor region on a part of one main surface of the semiconductor substrate. And a second electrode connected to the second semiconductor region on the other main surface of the semiconductor substrate, wherein the semiconductor light emitting device is configured to extract light to the one main surface. One main surface has a mirror surface region and a rough surface region, the mirror surface region is disposed in a region including a central portion of the one main surface, and the rough surface region is disposed so as to surround the mirror surface region. And from the inside of the semiconductor substrate to the one main surface The first electrode is connected to the specular area and a portion of the roughened area, and the outer edge of the first electrode is formed as an outer edge of the specular area. And a flat portion above the mirror surface region of the first electrode is a connection portion of a wire, the semiconductor light emitting device being related to the present invention. .

[0006]

According to the present invention, the peripheral portion of the first electrode is arranged on the rough surface area and is in close contact with the first electrode. Therefore, the lower portion of the periphery of the first electrode is less likely to be side-etched, and the reliability of connection of the first electrode to the first semiconductor region is improved. In addition, since the flat portion above the mirror region of the first electrode is a connection portion, highly reliable wire connection can be achieved.

[0007]

Next, a semiconductor light emitting device (light emitting diode) according to an embodiment of the present invention and a method of manufacturing the same will be described with reference to FIGS. The light emitting device shown in FIG. 2 includes a P-type semiconductor region 11 as a first semiconductor region and an N-type semiconductor region 12 as a second semiconductor region, for example, AlGaAs.
s or GaAs semiconductor substrate 13. An anode electrode 1 serving as a first electrode is provided at the center of the upper surface (one main surface) 13a of the semiconductor substrate 13, that is, the upper surface of the P-type semiconductor region 11.
4 is formed, and the lower surface (the other main surface) 1 of the semiconductor substrate 13 is formed.
A cathode electrode 15 as a second electrode is formed on the lower surface of the N-type semiconductor region 12 so as to be lattice-shaped or dotted. The cathode electrode 15 is connected to an external wiring conductor by a conductive adhesive. The conductive adhesive also adheres to the portion of the lower surface of the semiconductor substrate 13 where the cathode electrode 15 is not provided, and contributes to reflecting downward light upward. Since the PN junction 16 between the P-type semiconductor region 11 and the N-type semiconductor region 12 is formed parallel to the upper surface 13a and the lower surface 13b of the semiconductor base 13, this end is exposed on the side surface of the base 13. I have.

On the upper surface of the P-type semiconductor region 11 of the light emitting device shown in FIG. 2, a mirror surface region 17 and a rough surface region 18 are formed. The mirror region 17 is a P-type semiconductor region 1 as shown in FIG.
1 is formed substantially at the center of the upper surface, and has a substantially circular plane shape corresponding to the anode electrode 14 shown by a dotted line.
Further, the mirror surface region 17 is arranged inside the anode electrode 14, and its width (diameter) is the width (diameter) of the anode electrode 14.
Less than. The rough surface region 18 is a minute uneven surface for suppressing total reflection of light upward from the PN junction 16 and extracting light well, and surrounds the outer periphery of the mirror surface region 17 in plan view. It is formed annularly.

The anode electrode 14 is formed on the whole of the mirror surface region 17 and the inner portion of the rough surface region 18 adjacent to the mirror surface region 17 in plan view. Therefore, the outer edge of the mirror surface region 17 is located inside the outer edge of the anode electrode 14, and the outer edge of the anode electrode 14 is located between the outer edge of the mirror surface region 17 and the outer edge of the rough surface region 18, that is, the outer edge of the base 13. Since the rough surface region 18 is formed by etching the upper surface 13 a of the base 13 as described later, the rough surface region 18 is not located on the same plane as the mirror surface region 17 and is on the other side of the base 13 than the mirror surface region 17. Are shifted to the main surface 13b side. As a result, the portion of the anode electrode 14 facing above the rough surface region 18 is more deviated toward the other main surface 13 b of the base 13 than the portion facing above the mirror surface region 17. Also, the upper surface of the electrode 14 is a mirror surface above the mirror surface region 17, but the rough surface region 18
Above is roughened.

When the semiconductor substrate 13 shown in FIGS. 2 and 3 is formed, a semiconductor wafer 19 having a P-type semiconductor region 11 and an N-type semiconductor region 12 from which a plurality of light emitting elements can be obtained as shown in FIG. Prepare Next, wafer 1
After a resist film is formed on the entire upper surface of 9, a selective etching is performed to form a mask 21 having an opening 20 corresponding to a portion where the rough surface region 18 of each light emitting element is obtained, as shown in FIG. Note that the mask 21 covers a portion to be the mirror surface region 17.

Next, the upper surface of the wafer 19 exposed from the opening 20 of the mask 21 is etched to
The rough surface region 18 is formed as shown in FIG. Next, mask 2
Remove one. Since the region covered by the mask 21 is not etched, it is a region having less irregularities than the rough surface region 18, that is, a mirror surface region 17. As a result, on the upper surface of the wafer 19, a plurality of mirror regions 17 are scattered in an island shape, and the mirror regions 17 are surrounded by the rough surface region 18.

Next, Au (gold) is formed on the entire upper surface of the wafer 19.
Then, etching is performed so that only a portion of the Au-deposited film covering the upper surface of the mirror surface region 17 and the upper surface of the rough surface region 18 near the periphery thereof is left, and as shown in FIG. An electrode 14 is formed.

Next, the other main surface of the wafer 19
By depositing and etching the u film, a cathode electrode 15 as a back electrode is formed. The cathode electrode 15
May be provided before the formation of the anode electrode 14.

Next, the wafer 19 shown in FIG. 6 is divided by well-known dicing to obtain individual light emitting elements. Finally, the side surface of the base 13 is etched to remove the damage to the base 13 during the dicing. At this time, side etching may occur below the outer periphery of the anode electrode 14.
, The side etching amount is small.

An external wiring conductor is brazed to the cathode electrode 15 of the light emitting device shown in FIG. 2, and a wire 22 is bonded to the central flat portion 14a of the anode electrode 14 as shown by a dotted line.

According to this embodiment, the following effects can be obtained. (A) A portion of the upper surface 13a of the base 13 that is not covered with the electrode 14, that is, a light extraction surface is a rough surface region 18. Accordingly, total reflection of light upward from the PN junction 16 can be suppressed, and this light can be taken out of the device satisfactorily. As a result, high brightness can be realized. (B) The anode electrode 14 has the mirror surface region 17 and the rough surface region 1
8 and the peripheral portion of the electrode 14 is closely bonded to a part of the rough surface region 18. Therefore, even if side etching occurs, it can be kept at the extremely peripheral portion of the electrode 14. It is possible to prevent the side etching from progressing to the mirror surface region 17 side. Therefore, the base 13 and the electrode 14 are firmly adhered to each other, and the reliability of the light emitting element is improved. (C) The flat portion 14 above the mirror region 17 of the electrode 14
a and the rough surface portion 14b above the rough surface region 18 can be optically distinguished for pattern recognition, so that the flat portion 14a can be accurately identified by an automatic wire bonding apparatus, and the wire 22 can be satisfactorily bonded. And a crack is not generated in the semiconductor region 11. In the conventional light emitting device shown in FIG. 1, even if the lower part of the periphery of the electrode 4 is etched, it is impossible to optically recognize the upper part of the electrode 4. It is also conceivable to roughen the entire upper surface of the base 3 before forming the electrode 4 and to provide the electrode 4 on the roughened surface.
The entire upper surface of the electrode 4 is in the same state.
It was not possible to recognize the etching region at the lower part of the periphery. When wire bonding is performed in this way without recognizing a normal portion of the electrode 4, a peripheral region of the electrode 4 (an abnormal portion due to etching) is pressed by a well-known capillary of an automatic wire bonding apparatus, and a crack may occur in the semiconductor region 1. is there. On the other hand, according to the present embodiment, the bonding failure and the crack can be prevented as described above.

[0017]

[Modifications] The present invention is not limited to the above-described embodiment, and for example, the following modifications are possible. (1) P-type and N-type semiconductor regions having higher impurity concentrations than the P-type semiconductor region 11 and the N-type semiconductor region 12 are provided on the upper surface and the lower surface in order to improve ohmic contact with the electrodes 4 and 5. Can be. (2) The side surface of the semiconductor substrate 13 can be formed into an inclined side surface, that is, a mesa shape. (3) The electrode 14 may be formed to be relatively thick so that its entire upper surface is substantially flat, and the rough surface portion 14b is not substantially formed.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a conventional semiconductor light emitting device.

FIG. 2 is a cross-sectional view illustrating a semiconductor light emitting device according to an embodiment of the present invention.

FIG. 3 is a plan view of the semiconductor substrate of FIG. 2;

FIG. 4 is a sectional view showing a semiconductor wafer provided with a mask for manufacturing the light emitting device of FIG. 2;

FIG. 5 is a cross-sectional view showing a wafer provided with a rough surface region in FIG. 4;

FIG. 6 is a cross-sectional view showing the wafer of FIG. 5 provided with electrodes.

[Explanation of symbols]

 Reference Signs List 13 semiconductor substrate 14 electrode 17 mirror surface area 18 rough surface area

Claims (1)

[Claims] 1. A semiconductor in which a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type opposite to the first conductivity type are arranged to form a PN junction. A base, a first electrode connected to the first semiconductor region on a part of one main surface of the semiconductor base, and a first electrode connected to the second semiconductor region on the other main surface of the semiconductor base. A semiconductor light-emitting device comprising a second electrode and configured to extract light to the one main surface side, wherein the one main surface includes a mirror surface region and a rough surface region; The rough surface region is arranged in a region including a central portion of the one main surface, and the rough surface region is arranged so as to surround the mirror surface region, and total reflection of light incident on the one main surface from the inside of the semiconductor substrate. The first electrode is formed so as to reduce the ratio of Is connected to the mirror surface region and a part of the rough surface region; an outer edge of the first electrode is disposed between an outer edge of the mirror surface region and an outer edge of the rough surface region; A semiconductor light emitting device wherein a flat portion above a mirror surface region is a connection portion of a wire.