CN113675311A - LED chip and preparation method thereof - Google Patents
LED chip and preparation method thereof Download PDFInfo
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- CN113675311A CN113675311A CN202110912304.5A CN202110912304A CN113675311A CN 113675311 A CN113675311 A CN 113675311A CN 202110912304 A CN202110912304 A CN 202110912304A CN 113675311 A CN113675311 A CN 113675311A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract description 60
- 239000004065 semiconductor Substances 0.000 claims abstract description 57
- 238000003475 lamination Methods 0.000 claims abstract description 45
- 238000000034 method Methods 0.000 claims abstract description 17
- 238000000151 deposition Methods 0.000 claims description 9
- 238000005530 etching Methods 0.000 claims description 9
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 6
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 6
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 6
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 3
- 229910001128 Sn alloy Inorganic materials 0.000 claims description 3
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 229910052804 chromium Inorganic materials 0.000 claims description 3
- 239000011651 chromium Substances 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 239000010931 gold Substances 0.000 claims description 3
- JVPLOXQKFGYFMN-UHFFFAOYSA-N gold tin Chemical compound [Sn].[Au] JVPLOXQKFGYFMN-UHFFFAOYSA-N 0.000 claims description 3
- 229910052759 nickel Inorganic materials 0.000 claims description 3
- 229910052763 palladium Inorganic materials 0.000 claims description 3
- 229910052697 platinum Inorganic materials 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000004332 silver Substances 0.000 claims description 3
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- 239000010936 titanium Substances 0.000 claims description 3
- 229910000679 solder Inorganic materials 0.000 abstract description 12
- 239000000853 adhesive Substances 0.000 abstract description 5
- 230000001070 adhesive effect Effects 0.000 abstract description 5
- 238000004519 manufacturing process Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 229910002601 GaN Inorganic materials 0.000 description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/385—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending at least partially onto a side surface of the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0016—Processes relating to electrodes
Abstract
The invention provides an LED chip and a preparation method thereof, wherein the edge of an epitaxial lamination is etched to a part of a first type semiconductor layer to form a step, and the periphery of the epitaxial lamination is provided with a substrate exposed surface; and covering the epitaxial lamination layer with the DBR reflection layer and exposing partial surface of the step, wherein the DBR reflection layer is provided with a first through hole exposing a part of the second type semiconductor layer. The first electrode and the second electrode are designed along the side wall of the epitaxial lamination in a concave mode, the distance between the first electrode and the second electrode is maximized, the adhesive force between the first electrode and the epitaxial lamination is increased, the electrodes are prevented from falling off, the problem of short circuit of solder paste of an LED chip in the die bonding process is effectively solved, and the reliability of the LED chip is improved.
Description
Technical Field
The invention relates to the field of light emitting diodes, in particular to an LED chip and a preparation method thereof.
Background
With the continuous development of semiconductor light emitting technology, the application of LEDs is changing day by day, especially the development of LEDs in display technology. Meanwhile, due to the requirement of high resolution of the LED display screen, the pitch of the LED chips and the size of the chips are also getting smaller and smaller, such as Mini-LED, however, the small-sized LED chips face many technical difficulties.
Currently, the mainstream small-size LED chip in the market mostly adopts ITO (i.e. transparent conductive layer) + DBR flip structure, as shown in fig. 1; for the die bonding process of the LED chip structure, as shown in fig. 2, a solder paste 9 is dotted on a die bonding substrate 10, then an LED chip is placed on the solder paste 9 by using a die bonder, die bonding is achieved by reflow soldering, and a finally obtained LED chip package is shown in fig. 3. However, since the electrodes of the LED chip are distributed at two ends of the chip surface and the size of the LED chip is small, the risk of short circuit of solder paste is easily generated during the die bonding process.
In view of the above, the present inventors have specially designed an LED chip and a method for manufacturing the same, and have resulted in the present disclosure.
Disclosure of Invention
The invention aims to provide an LED chip and a preparation method thereof, and aims to solve the technical problem that a small-size LED chip is easy to have solder paste short circuit in the die bonding process.
In order to achieve the purpose, the technical scheme adopted by the invention is as follows:
an LED chip, comprising:
a substrate;
the epitaxial lamination is arranged on the surface of the substrate, and a substrate exposed surface is arranged at the periphery of the epitaxial lamination; the epitaxial lamination comprises a first type semiconductor layer, an active region and a second type semiconductor layer which are sequentially stacked along a first direction, and the edge of the epitaxial lamination is etched to a part of the first type semiconductor layer to form a step; the first direction is perpendicular to the substrate and directed from the substrate to the epitaxial stack;
a DBR reflective layer covering the epitaxial stack and exposing a portion of the surface of the step, the DBR reflective layer having a first via exposing a portion of the second type semiconductor layer;
the second electrode is stacked on the first through hole, is electrically connected with the second type semiconductor layer, and extends to the exposed surface of the substrate along one side wall of the epitaxial stacked layer;
a first electrode stacked on the exposed surface of the step, electrically connected to the first type semiconductor layer, and extending to the exposed surface of the substrate along the other side wall of the epitaxial stack; and the first electrode is disposed away from the second electrode.
Preferably, the first electrode extends up to a horizontal surface of the epitaxial stack and is disposed at the same height as the second electrode.
Preferably, the first electrode and the second electrode are respectively formed in a step shape on the exposed surface of the corresponding substrate.
Preferably, the first through hole and/or the step have/has a sloped sidewall, respectively.
Preferably, the angle of inclination of the inclined side wall of the first through hole and/or the step is 20 ° -80 °, inclusive.
Preferably, a transparent conductive layer is disposed on a horizontal surface of the epitaxial stack, the DBR reflective layer is stacked on a side surface of the transparent conductive layer away from the epitaxial stack, and the first through hole exposes a portion of the transparent conductive layer or a portion of the second-type semiconductor layer.
Preferably, the first and second electrodes each comprise one or more stacks of chromium, nickel, aluminum, titanium, platinum, gold, palladium, silver, gold-tin alloy.
The invention also provides a preparation method of the LED chip, which comprises the following steps:
s01, providing a substrate;
s02, growing an epitaxial lamination, wherein the epitaxial lamination comprises a first type semiconductor layer, an active layer and a second type semiconductor layer which are sequentially stacked on the surface of the substrate;
s03, etching the epitaxial lamination layer to enable the edge of the epitaxial lamination layer to be etched to a part of the first type semiconductor layer to form a step;
s04, deeply etching the epitaxial lamination layer to enable the periphery of the epitaxial lamination layer to have a substrate exposed surface;
s05, depositing a transparent conducting layer on the mesa of each independent epitaxial lamination;
s06, depositing to form a DBR reflecting layer which covers the epitaxial lamination layer and exposes partial surface of the step; and the DBR reflecting layer is provided with a first through hole which exposes part of the second type semiconductor layer through etching;
s07, depositing a first electrode and a second electrode; the second electrode is stacked on the first through hole, is electrically connected with the second type semiconductor layer, and extends to the exposed surface of the substrate along one side wall of the epitaxial stacked layer;
the first electrode is stacked on the exposed surface of the step, is electrically connected with the first type semiconductor layer, and extends to the exposed surface of the substrate along the other side wall of the epitaxial stack; and the first electrode is disposed away from the second electrode.
Preferably, the first electrode extends up to a horizontal surface of the epitaxial stack and is disposed at the same height as the second electrode.
Preferably, the first electrode and the second electrode are respectively formed in a step shape on the exposed surface of the corresponding substrate.
According to the technical scheme, the edge of the epitaxial lamination layer of the LED chip provided by the invention is etched to a part of the first type semiconductor layer to form a step, and the periphery of the epitaxial lamination layer is provided with a substrate exposed surface; covering the epitaxial stack with a DBR reflective layer having a first via exposing a portion of the second type semiconductor layer and exposing a portion of the surface of the step; the second electrode is stacked on the first through hole, is electrically connected with the second type semiconductor layer, and extends to the exposed surface of the substrate along one side wall of the epitaxial stacked layer; and the first electrode is stacked on the exposed surface of the step, is electrically connected with the first type semiconductor layer, and extends to the exposed surface of the substrate along the other side wall of the epitaxial stacked layer. The first electrode and the second electrode are designed along the side wall of the epitaxial lamination in a concave mode, the distance between the first electrode and the second electrode is maximized, the adhesive force between the first electrode and the epitaxial lamination is increased, the electrodes are prevented from falling off, the problem of short circuit of solder paste of an LED chip in the die bonding process is effectively solved, and the reliability of the LED chip is improved.
Furthermore, the first electrode and the second electrode form a ladder shape on the exposed surface of the corresponding substrate respectively, and in the subsequent die bonding process, the adhesive force of the solder paste with the first electrode and the second electrode can be increased, so that the LED packaging structure with higher reliability is realized.
The invention also provides a preparation method of the LED chip, which is simple and convenient in process manufacture and convenient for production while realizing the beneficial effects of the micro light-emitting element.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
FIG. 1 is a schematic diagram of a small-sized LED chip in the prior art;
fig. 2 to 3 are schematic structural diagrams corresponding to the die bonding process steps of the LED chip shown in fig. 1;
fig. 4 is a schematic structural diagram of an LED chip according to an embodiment of the present invention;
fig. 5 to 11 are schematic structural diagrams corresponding to steps of a method for manufacturing an LED chip according to an embodiment of the present invention;
fig. 12 to 13 are schematic structural diagrams corresponding to the die attach process steps of the LED chip shown in fig. 4;
the symbols in the drawings illustrate that: 1. the semiconductor device comprises a substrate, 1.1, a substrate exposed surface, 2, a first type semiconductor layer, 2.1, a step, 3, an active region, 4, a second type semiconductor layer, 5, a transparent conducting layer, 6, a DBR reflecting layer, 6.1, a first through hole, 7, a first electrode, 8, a second electrode, 9, solder paste, 10 and a die bonding substrate.
Detailed Description
In order to make the content of the present invention clearer, the content of the present invention is further explained below with reference to the attached drawings. The invention is not limited to this specific embodiment. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
An LED chip, comprising:
a substrate 1;
the epitaxial lamination is arranged on the surface of the substrate 1, and a substrate exposed surface 1.1 is arranged at the periphery of the epitaxial lamination; the epitaxial lamination layer comprises a first type semiconductor layer 2, an active region 3 and a second type semiconductor layer 4 which are sequentially stacked along a first direction, and the edge of the epitaxial lamination layer is etched until part of the first type semiconductor layer 2 forms a step 2.1; the first direction is perpendicular to the substrate 1 and directed from the substrate 1 to the epitaxial stack;
a DBR reflective layer 6 covering the epitaxial stack and exposing a portion of the surface of the step 2.1, the DBR reflective layer 6 having a first via 6.1 exposing a portion of the second type semiconductor layer 4;
a second electrode 8 which is laminated on the first through hole 6.1 and electrically connected with the second type semiconductor layer 4 and extends to the substrate exposed surface 1.1 along one side wall of the epitaxial lamination;
a first electrode 7 which is laminated on the exposed surface of the step 2.1, is electrically connected with the first type semiconductor layer 2, and extends to the substrate exposed surface 1.1 along the other side wall of the epitaxial lamination; and the first electrode 7 is disposed away from the second electrode 8.
Note that the type of the substrate 1 is not limited in the LED chip of the present embodiment, and for example, the substrate 1 may be, but is not limited to, a sapphire substrate 1, a silicon substrate 1, or the like. In addition, the types of the first type semiconductor layer 2, the active region 3 and the second type semiconductor layer 4 of the epitaxial lamination may also be not limited in the micro light emitting element of the present embodiment, for example, the first type semiconductor layer 2 may be, but is not limited to, a gallium nitride layer, and correspondingly, the second type semiconductor layer 4 may be, but is not limited to, a gallium nitride layer.
It is noted that in the above embodiments, the first electrode 7 extends up to the horizontal surface of the epitaxial stack and is disposed at the same height as the second electrode 8.
It should be noted that, in the above embodiment, the first electrode 7 and the second electrode 8 are respectively formed in a step shape on the exposed surface 1.1 of the corresponding substrate.
It is worth mentioning that in the above embodiments, the first through hole 6.1 and/or the step 2.1 have/has a slanted sidewall, respectively.
It is worth mentioning that in the above embodiments, the inclination angle of the slanted sidewall of the first through hole 6.1 and/or the step 2.1 is 20 ° -80 °, inclusive.
It should be noted that, in the above embodiment, the transparent conductive layer 5 is disposed on the horizontal surface of the epitaxial stack, the DBR reflective layer 6 is stacked on the surface of the transparent conductive layer 5 facing away from the epitaxial stack, and the first via 6.1 exposes a portion of the transparent conductive layer 5 or a portion of the second type semiconductor layer 4.
It should be noted that the material of the transparent conductive layer 5 may be ITO, as the case may be, and the application does not limit this.
It is worth mentioning that in the above embodiments, the first electrode 7 and the second electrode 8 respectively comprise one or more stacks of chromium, nickel, aluminum, titanium, platinum, gold, palladium, silver, gold-tin alloy.
It should be noted that, on the basis of the above embodiments, in an embodiment of the present application, an electrode extension bar is disposed on a surface of the transparent conductive layer 5 on a side away from the epitaxial stack, so that in actual operation of the LED chip, current guidance of the first electrode 7 flows into the epitaxial stack; it should be noted that the number of the electrode extension bars may be one or more, as the case may be, and the application does not limit this.
The embodiment of the invention also provides a preparation method of the LED chip, which comprises the following steps:
s01, as shown in fig. 5, providing a substrate 1;
s02, as shown in fig. 6, growing an epitaxial stack including a first type semiconductor layer 2, an active layer and a second type semiconductor layer 4 stacked in sequence on a surface of a substrate 1;
s03, as shown in fig. 7, etching the epitaxial stack to etch the edge of the epitaxial stack to a part of the first-type semiconductor layer 2 to form a step 2.1;
s04, as shown in fig. 8, deep etching the epitaxial stack to make the periphery of the epitaxial stack have a substrate exposed surface 1.1;
s05, as shown in fig. 9, depositing a transparent conductive layer 5 on the mesa of each independent epitaxial stack;
s06, as shown in fig. 10, depositing to form the DBR reflective layer 6, which covers the epitaxial stack and exposes a part of the surface of the step 2.1; and the DBR reflective layer 6 is provided with a first via 6.1 exposing a portion of the second type semiconductor layer 4 by etching;
s07, as shown in fig. 11, depositing the first electrode 7 and the second electrode 8; the second electrode 8 is stacked on the first through hole 6.1 and electrically connected with the second type semiconductor layer 4, and extends to the substrate exposed surface 1.1 along one side wall of the epitaxial stacked layer;
the first electrode 7 is stacked on the exposed surface of the step 2.1, is electrically connected with the first type semiconductor layer 2, and extends to the substrate exposed surface 1.1 along the other side wall of the epitaxial stack; and the first electrode 7 is disposed away from the second electrode 8.
It is noted that in the above embodiments, the first electrode 7 extends up to the horizontal surface of the epitaxial stack and is disposed at the same height as the second electrode 8.
It should be noted that, in the above embodiment, the first electrode 7 and the second electrode 8 are respectively formed in a step shape on the exposed surface 1.1 of the corresponding substrate.
Aiming at the die bonding process steps of the LED chip, as shown in FIG. 12, a solder paste 9 is dotted on a die bonding substrate 10; then, an LED chip is placed on the solder paste 9 by using a die bonder, and die bonding is achieved by reflow soldering, and the finally obtained LED chip package is shown in fig. 13.
As can be seen from the above technical solutions, in the LED chip provided in the embodiment of the present invention, the edge of the epitaxial lamination is etched to a portion of the first type semiconductor layer 2 to form a step 2.1, and the periphery of the epitaxial lamination has a substrate exposed surface 1.1; by covering the DBR reflective layer 6 with the epitaxial stack and exposing a portion of the surface of the step 2.1, the DBR reflective layer 6 has a first via 6.1 exposing a portion of the second type semiconductor layer 4; a second electrode 8 which is laminated on the first through hole 6.1 and electrically connected with the second type semiconductor layer 4 and extends to the substrate exposed surface 1.1 along one side wall of the epitaxial lamination; and a first electrode 7 which is stacked on the exposed surface of the step 2.1, is electrically connected to the first-type semiconductor layer 2, and extends to the exposed surface 1.1 of the substrate along the other side wall of the epitaxial stack. The first electrode 7 and the second electrode 8 are designed along the side wall of the epitaxial lamination in a concave mode, the distance between the first electrode 7 and the second electrode 8 is maximized, the adhesive force of the first electrode 7, the second electrode 8 and the epitaxial lamination is increased, the electrodes are prevented from falling off, the problem of short circuit of solder paste of an LED chip in the die bonding process is effectively solved, and the reliability of the LED chip is improved.
Furthermore, the first electrode 7 and the second electrode 8 form a ladder shape on the corresponding exposed surface 1.1 of the substrate respectively, and in the subsequent die bonding process, the adhesive force of the solder paste with the first electrode 7 and the second electrode 8 can be increased, so that the LED packaging structure with higher reliability is realized.
The embodiment of the invention also provides a preparation method of the LED chip, which has the advantages of simple and convenient process and manufacture and convenience for production while realizing the beneficial effects of the micro light-emitting element.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such article or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in an article or device that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. An LED chip, comprising:
a substrate;
the epitaxial lamination is arranged on the surface of the substrate, and a substrate exposed surface is arranged at the periphery of the epitaxial lamination; the epitaxial lamination comprises a first type semiconductor layer, an active region and a second type semiconductor layer which are sequentially stacked along a first direction, and the edge of the epitaxial lamination is etched to a part of the first type semiconductor layer to form a step; the first direction is perpendicular to the substrate and directed from the substrate to the epitaxial stack;
a DBR reflective layer covering the epitaxial stack and exposing a portion of the surface of the step, the DBR reflective layer having a first via exposing a portion of the second type semiconductor layer;
the second electrode is stacked on the first through hole, is electrically connected with the second type semiconductor layer, and extends to the exposed surface of the substrate along one side wall of the epitaxial stacked layer;
a first electrode stacked on the exposed surface of the step, electrically connected to the first type semiconductor layer, and extending to the exposed surface of the substrate along the other side wall of the epitaxial stack; and the first electrode is disposed away from the second electrode.
2. The LED chip of claim 1, wherein the first and second electrodes are stepped on the exposed surface of the substrate.
3. The LED chip of claim 1, wherein said first electrode extends up to a horizontal surface of said epitaxial stack and is disposed at the same height as said second electrode.
4. The LED chip of claim 1, wherein said first via and/or said step each have a sloped sidewall.
5. The LED chip of claim 4, wherein the angle of inclination of the oblique sidewall of the first via and/or the step is 20 ° -80 °, inclusive.
6. The LED chip of claim 1, wherein a transparent conductive layer is disposed on a horizontal surface of the epitaxial stack, the DBR reflective layer is stacked on a side surface of the transparent conductive layer facing away from the epitaxial stack, and the first via exposes a portion of the transparent conductive layer or a portion of the second type semiconductor layer.
7. The LED chip of claim 1, wherein said first and second electrodes each comprise one or more stacks of chromium, nickel, aluminum, titanium, platinum, gold, palladium, silver, gold-tin alloy.
8. A preparation method of an LED chip is characterized by comprising the following steps:
s01, providing a substrate;
s02, growing an epitaxial lamination, wherein the epitaxial lamination comprises a first type semiconductor layer, an active layer and a second type semiconductor layer which are sequentially stacked on the surface of the substrate;
s03, etching the epitaxial lamination layer to enable the edge of the epitaxial lamination layer to be etched to a part of the first type semiconductor layer to form a step;
s04, deeply etching the epitaxial lamination layer to enable the periphery of the epitaxial lamination layer to have a substrate exposed surface;
s05, depositing a transparent conducting layer on the mesa of each independent epitaxial lamination;
s06, depositing to form a DBR reflecting layer which covers the epitaxial lamination layer and exposes partial surface of the step; and the DBR reflecting layer is provided with a first through hole which exposes part of the second type semiconductor layer through etching;
s07, depositing a first electrode and a second electrode; the second electrode is stacked on the first through hole, is electrically connected with the second type semiconductor layer, and extends to the exposed surface of the substrate along one side wall of the epitaxial stacked layer;
the first electrode is stacked on the exposed surface of the step, is electrically connected with the first type semiconductor layer, and extends to the exposed surface of the substrate along the other side wall of the epitaxial stack; and the first electrode is disposed away from the second electrode.
9. The method of claim 8, wherein the first electrode extends up to a horizontal surface of the epitaxial stack and is disposed at the same height as the second electrode.
10. The method of claim 8, wherein the first electrode and the second electrode are respectively formed in a step shape on the exposed surface of the substrate.
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| CN202110912304.5A CN113675311A (en) | 2021-08-10 | 2021-08-10 | LED chip and preparation method thereof |
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| CN202110912304.5A CN113675311A (en) | 2021-08-10 | 2021-08-10 | LED chip and preparation method thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115064627A (en) * | 2022-08-18 | 2022-09-16 | 江西兆驰半导体有限公司 | Positive-mounted LED chip and preparation method thereof |
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| US20130313587A1 (en) * | 2012-05-24 | 2013-11-28 | Delta Electronics, Inc | Light emitting element and light emitting module thereof |
| CN111864025A (en) * | 2019-04-30 | 2020-10-30 | 云谷（固安）科技有限公司 | Micro light-emitting diode, manufacturing method thereof and display device |
| CN112768484A (en) * | 2019-11-04 | 2021-05-07 | 厦门三安光电有限公司 | Light emitting diode and manufacturing method thereof |
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- 2021-08-10 CN CN202110912304.5A patent/CN113675311A/en active Pending
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20130313587A1 (en) * | 2012-05-24 | 2013-11-28 | Delta Electronics, Inc | Light emitting element and light emitting module thereof |
| CN111864025A (en) * | 2019-04-30 | 2020-10-30 | 云谷（固安）科技有限公司 | Micro light-emitting diode, manufacturing method thereof and display device |
| CN112768484A (en) * | 2019-11-04 | 2021-05-07 | 厦门三安光电有限公司 | Light emitting diode and manufacturing method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN115064627A (en) * | 2022-08-18 | 2022-09-16 | 江西兆驰半导体有限公司 | Positive-mounted LED chip and preparation method thereof |
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