JPH10190230A - Multilayer printed wiring board and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer printed wiring board, in which the filling properties of a resin into a through-hole are improved while the quantity of the multilayer printed wiring board warped can be reduced, on which various electronic parts can be loaded surely and which has high reliability on mounting. SOLUTION: The thickness of a core board 2 in the multilayer printed wiring board 1 is adjusted within a range of 0.6-1.00mm. Consequently, the multilayer printed wiring board can resist force intending to generate warpage sufficiently in the multilayer printed wiring board 1 and warpage is prevented, and the insides of through-holes 4 are filled with a resin 5 without trouble. Accordingly, the warpage of the multilayer printed wiring board 1 with shrinkage on the curing of inter-layer resin insulating layers 6 is prevented by making the thickness of the core board 2 larger than 0.6mm, and the filling properties of the resin 5 into the through-holes 4 can be ensured by setting the thickness of the core board 2 to 1.0mm or less.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board having a through hole in which a conductive circuit is formed on both the front and back surfaces of a core substrate, and more particularly to a resin having excellent through hole filling properties. The present invention relates to a multilayer printed wiring board capable of reducing the amount of warpage of the multilayer printed wiring board, and thereby securely mounting various electronic components while ensuring the parallelism between the conductor circuits.

[0002]

2. Description of the Related Art Conventionally, in a so-called build-up multilayer wiring board, an interlayer resin insulating layer and a conductive circuit layer are alternately laminated on a front side or a back side of a core substrate having a through-hole formed therein. A via hole is provided in the layer, and a conductor film is formed on the wall surface of the via hole, thereby electrically connecting the upper conductor circuit and the lower conductor circuit. Here, in the through hole of the core board,
In order to ensure the smoothness of the interlayer resin insulation layer, resin is usually filled.

For example, Japanese Patent Application Laid-Open No. 61-276875, U.S. Pat.
In SP5055531, etc., a photosensitive electroless adhesive dispersed in a photosensitive resin matrix in which a heat-resistant resin fine powder is dispersed is used as an interlayer insulating agent, and a hole for forming a via hole is provided by exposure and development treatments. There is disclosed a method of manufacturing a multilayer printed wiring board by roughening the surface of a resin fine powder with an oxidizing agent to roughen the surface, and electrolessly plating the same. In the example of JP-A-2-18892, a thermosetting electroless adhesive in which a heat-resistant resin fine powder is dispersed is used as an interlayer insulating agent, and a laser beam is used to form a via hole. There is disclosed a method of manufacturing a multilayer printed wiring board by roughening a resin fine powder with an oxidizing agent to roughen the surface and performing electroless plating.

[0004]

In the multilayer printed wiring boards disclosed in the above publications, since various electronic components such as IC chips are mounted, the multilayer printed wiring board has a flat surface. Degree is required,
Generally, it is empirically known that a practical allowable amount of warpage in a multilayer printed wiring board is about 76 μm.

However, when the above-mentioned multilayer printed wiring board is actually mass-produced, it is difficult to suppress the amount of warpage within the range of the allowable value. In practice, the amount of warpage exceeds 76 μm. There are many products. As a result, there has been a problem that the yield is reduced.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional problems, and is excellent in the filling property of resin into through holes and can reduce the amount of warpage of a multilayer printed wiring board. It is an object of the present invention to provide a multilayer printed wiring board with high mounting reliability, which can securely mount various electronic components while ensuring the parallelism between the conductor circuits formed on the front and back surfaces of the multilayer printed wiring board. Aim.

[0007]

The present inventors have conducted intensive studies to reduce the amount of warpage of a multilayer printed wiring board, and as a result, have found that warpage in a multilayer printed wiring board occurs according to the following mechanism. . That is, unlike the conventional multilayer printed wiring board laminated via the prepreg,
In the build-up multilayer printed wiring board, since the interlayer resin insulating layer and the conductor layer are alternately laminated on the front and back surfaces, the multilayer printed wiring board is caused by the curing shrinkage generated in the interlayer resin insulating layer. Was found to be warped.

To prevent such a multilayer printed wiring board from warping, the core substrate may be thickened. However, if the core substrate is thickened, it becomes difficult to fill the through holes with resin by a printing method. As a result, unevenness is generated in the interlayer resin insulating layer, and the mounting reliability of various electronic components is reduced. Therefore, the present inventor needs to adjust the thickness of the core substrate to a predetermined range in order to prevent the warpage while securing the mounting reliability of various electronic components in consideration of the above facts. Was newly found.

Based on the above findings, the multilayer printed wiring board according to claim 1 has a through hole formed in a core substrate,
A multilayer printed wiring board in which conductive circuits are formed on both surfaces of a core substrate, wherein the through holes are filled with resin, and the thickness of the core substrate is greater than 0.6 mm and not more than 1.0 mm. It is characterized by being. The multilayer printed wiring board according to a second aspect is the multilayer printed wiring board according to the first aspect, wherein at least one conductive circuit layer is laminated on both surfaces of the core substrate via an interlayer resin insulating layer. Having.

Further, according to a third aspect of the present invention, there is provided a method for manufacturing a multilayer printed wiring board, comprising: forming a through hole in a core substrate; and forming a printing mask having an opening in a portion corresponding to the position of the through hole on the core substrate. Mounting, printing the resin, filling the resin into the through holes, and then laminating an interlayer resin insulating layer and a conductive circuit layer on both sides of the core substrate, in the method of manufacturing a multilayer printed wiring board, the thickness of the core substrate Is set to be greater than 0.6 mm and 1.0 mm or less.

In the multilayer printed wiring board and the method for manufacturing the same according to the first to third aspects, the thickness of the core substrate is 0.6 m.
m is adjusted within the range of 1.00 mm, it is possible to sufficiently oppose a force that is likely to generate warpage in the multilayer printed wiring board, and it is possible to prevent warpage. The resin can be filled into the through hole without any problem. Specifically, by setting the thickness of the core substrate to be more than 0.6 mm, the warpage of the multilayer printed wiring board due to the curing shrinkage of the interlayer resin insulating layer is prevented, and the thickness of the core substrate is also reduced. Is set to 1.0 mm or less, the resin filling property to the through holes is guaranteed.
Accordingly, various electronic components can be reliably mounted while ensuring the parallelism between the conductor circuits in the multilayer printed wiring board, and the mounting reliability can be maintained high. As described above, the range of the thickness of the core substrate is unique in that the warpage of the multilayer printed wiring board can be prevented, the surface unevenness of the interlayer resin insulating layer can be prevented, and the mounting reliability of electronic components such as IC chips can be secured. Range. Here, the thickness of the core substrate is
It is desirable to be in the range of 0.7 to 0.9 mm.

Further, it is desirable that the diameter of the through hole in which the core substrate is formed is in the range of 0.1 to 0.5 mm. If the diameter of the through hole is too small, it is difficult to fill the resin. Conversely, if the diameter is too large, the resin will escape, and it will be difficult to fill the resin. Further, when the diameter of the through hole is increased, the wiring density is reduced, which is unsuitable as a core substrate of a semiconductor package.

Further, as a core substrate, a so-called fiber reinforced resin substrate obtained by impregnating a glass cloth with at least one resin selected from a bismaleimide triazine (BT) resin, an epoxy resin and a polyimide resin and laminating a plurality of the glass cloths. Is desirable. It is based on the fact that it can be drilled with a drill or a laser beam, and that the interlayer resin insulating layer is formed with excellent adhesion.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A multilayer printed wiring board according to the present invention will be described below based on an embodiment embodying the present invention with reference to the drawings. First, a multilayer printed wiring board according to the present embodiment will be described with reference to FIG. FIG. 1 is a sectional view of a multilayer printed wiring board.

In FIG. 1, a multilayer printed wiring board 1 comprises:
This is a four-layer multilayer printed wiring board formed by forming two conductor circuits on each of the front surface (upper surface in FIG. 1) and the back surface (lower surface in FIG. 1) of the core substrate 2. The core substrate 2 has a thickness in the range of 0.6 mm to 1.00 mm, for example, 0.8 m
m substrates are used, and the inner conductor circuit 3 is formed on both surfaces thereof by etching each copper foil of the double-sided copper-clad laminate in a predetermined pattern. here,
Since the thickness of the core substrate 2 is 0.8 mm, even when the hardening shrinkage occurs during the formation of the interlayer insulating layer 6 described below, the core substrate 2 is not affected by the hardening shrinkage of the interlayer resin insulating layer 6. There is no war against it.

The inner conductor circuit 3 includes a pad 3A connected to a via hole 10 described later. The core substrate 2 has a range of 0.1 mm to 0.5 mm,
For example, a through-hole 4 having a diameter of 0.3 mm is formed, and a through-hole plating 4A is formed inside the through-hole 4 and on the periphery thereof.

A resin layer 5 is filled inside the through hole 4 and between the through hole plating 4A and the pad 3A. At this time, since the diameter of the through hole 4 is formed to be 0.3 mm, the resin layer 5 can be filled without any trouble. The surface of the resin layer 5 is the same as the surface of the pad 3A and the surface of the through-hole plating 4A. An interlayer resin insulating layer 6 is formed on each of the pads 3A, the through-hole plating 4A, and the resin layer 5 by applying an adhesive for electroless plating. The surface of the interlayer resin insulating layer 6 is subjected to a roughening treatment, and a via hole opening 7 is formed at a position corresponding to the pad 3A.

On the interlayer resin insulation layer 6, an electroless plating permanent resist layer 8 is formed in a predetermined pattern, and an outer conductor circuit 9 is provided between the permanent resist layers 8 by electroless copper plating. In addition, a via hole 10 having a conductor layer is formed in the portion of the via hole opening 7. Next, a specific method for manufacturing the multilayer printed wiring board 1 configured as described above will be described based on an embodiment with reference to FIGS.

EXAMPLES (1) A copper-clad laminate (core) in which 18 μm copper foil is laminated on both sides of a substrate made of glass epoxy or BT (bismaleimide triazine) having a size of 500 × 500 mm and a thickness of 0.8 mm. Using the substrate 2 as a starting material, the copper foil is etched in a pattern according to a conventional method to connect a planar conductor layer (inner conductor circuit 3) to both sides of the core substrate 2. A pad 3A connected to the through hole 4 and the via hole 10 having a diameter of 0.3 mm was formed (see FIG. 3). In addition, a through-hole plating 4A was formed inside the through-hole 4 and on the periphery thereof according to a usual method (see FIG. 3).

(2) On the other hand, 100 parts by weight of a bisphenol F epoxy monomer (manufactured by Yuka Shell Epoxy: molecular weight 310, trade name E-807) and 6 parts by weight of an imidazole curing agent (manufactured by Shikoku Chemicals: trade name 2E4MZ-CN) And 170 parts by weight of an average particle size of the SiO2 spherical particles of 1.6 μm (here, the maximum particle size is not more than the thickness of the inner conductor circuit 3 (15 μm)).
By kneading with this roll, a resin for flattening the viscosity at 23 ° C. and 45 Pa · s was prepared. This resin is solvent-free. The reason why the solvent is not mixed is that when a resin containing a solvent is used, an interlayer agent (a resin material for forming the interlayer resin insulating layer 6) is applied, and when the resin is heated and dried, the solvent evaporates from the resin layer for flattening. Then, separation is caused between the resin layer for flattening and the interlayer insulating layer 6.

(3) Here, a 0.3 mm-thick printing metal mask 11 having an opening having a diameter of 0.5 mm formed at a position corresponding to the position of the through hole 4 in the core substrate 2.
Is placed on the core substrate 2 (see FIG. 4), the resin 5 is filled in the through holes 4 with a squeegee (see FIG. 5), and then the filled resin 5 is applied by a roll coater or a printing method to form an inner layer. The resin 5 was filled between the conductor circuit 3, the pad 3A, and the through-hole plating 4A (see FIG. 6).

Thereafter, it was cured by heating at 150 ° C. for 30 minutes. Here, the above-mentioned filling resin 5 is almost completely crosslinked by heating at 150 ° C. for 3 hours to reach high hardness. Here, it is heated at 150 ° C. for 30 minutes, and a belt sander as described later is used. Hardening is performed only in a range where polishing or buffing can be performed so that the polishing operation can be easily performed. By this heating step, the filling resin 5 is filled between the copper patterns (the inner conductor circuit 3, the pads 3A, and the through-hole plating 4A), and the surface of the filling resin 5 and the surface of the copper pattern become substantially the same plane (FIG. 6).
reference).

Following the above steps, the core substrate 2 is polished with a belt sander using a # 600 belt abrasive paper (manufactured by Sankyo Rikagaku).
Were polished on both sides. At this time, the inner conductor circuit 3,
Polishing was performed so that the filling resin 5 did not remain on the pad 3A and the through-hole plating 4A. Thereafter, buffing was performed to remove the scratches caused by the belt sander (see FIG. 7).

(4) Here, a cresol novolak type epoxy resin (manufactured by Nippon Kayaku Co., Ltd .: molecular weight 2500) dissolved in DMDG (dimethyl glycol dimethyl ether)
70 parts by weight of 5% acrylate, 30 parts by weight of polyethersulfone (PES), 4 parts by weight of an imidazole curing agent (trade name: 2E4MZ-CN, manufactured by Shikoku Chemicals), and caprolactone-modified tris (acryloxyethyl) as a photosensitive monomer 10 parts by weight of isocyanurate (trade name: Aronix M325, manufactured by Toa Gosei), 5 parts by weight of benzophenone (manufactured by Kanto Chemical) as a photoinitiator, 0.5 part by weight of Michler's ketone (manufactured by Kanto Chemical) as a photosensitizer, and further The average particle size of the epoxy resin particles was 3.0 μm to 3
5 parts by weight, 5 parts by weight having an average particle size of 0.5 μm were mixed, and further mixed while adding NMP, adjusted to a viscosity of 12 Pa · s with a homodisper stirrer, and then kneaded with three rolls. Thus, an adhesive for electroless plating was obtained.

(5) After the core substrate 2 is washed with water and dried, the substrate 2 is acid-degreased and soft-etched.
Treated with a catalyst solution consisting of palladium chloride and an organic acid,
A Pd catalyst is applied, activated, plated in an electroless plating bath, and a 2.5 μm thick Ni-P-Cu alloy uneven layer (roughened surface) is formed on the surface of the copper conductor and the via hole pad. ) Formed. Then, the substrate is washed with water, and the substrate is placed in an electroless tin plating bath composed of a tin borofluoride-thiourea solution.
It was immersed at 0 ° C. for 1 hour to form a 0.3 μm thick tin-substituted plating layer on the roughened surface of the Ni—Cu—P alloy.

(6) Core substrate 2 obtained in (5)
An adhesive was applied to the substrate and dried to form an adhesive layer (FIG. 8).
reference). Next, a photomask film is laminated and 400 m
Exposure was performed by irradiating ultraviolet rays of J / cm ² .

(7) The core substrate 2 is spray-developed with a DMTG solution to form an opening 7 serving as a 100 μmφ via hole in the adhesive layer. Further, the substrate is exposed to an ultra-high pressure mercury lamp at 3000 mJ / cm ² . Exposure, 100 ° C
For 1 hour and then at 150 ° C. for 5 hours to form an interlayer resin insulating layer 6 having a thickness of 50 μm and an opening having excellent dimensional accuracy corresponding to a photomask film (see FIG. 9).

(8) Core substrate 2 in which the opening is formed
Is immersed in chromic acid for 2 minutes to dissolve the epoxy resin particles in the resin matrix to roughen the surface of the interlayer resin insulating layer 6 (see FIG. 10), and then neutralize solution (manufactured by Shipley) And then washed with water.

(9) This surface roughening treatment (roughening depth 6 μm)
Palladium catalyst (manufactured by Atotech)
To give a catalyst core to the interlayer resin insulating layer 6 and the via hole opening 7.

(10) On the other hand, 40 dissolved in DMDG
Weight-% cresol novolak type epoxy resin (manufactured by Nippon Kayaku Co., Ltd.), a photosensitizing oligomer obtained by acrylated 50% of epoxy groups (molecular weight: 4000), 20% by weight bisphenol A type epoxy resin dissolved in methyl ethyl ketone (oilification) Shell Epicoat 1001), imidazole hardener (Shikoku Chemicals: 2P4MZ), photosensitive isocyanate acrylic isocyanate (Toagosei: Aronix M215), benzophenone as photoinitiator (Kanto Chemical), Michler's ketone (manufactured by Kanto Kagaku) as a photosensitizer was mixed with the following composition using NMP, and the viscosity was 3000 cps with a homodisper stirrer.
And kneaded with three rolls to obtain a liquid resist. At this time, the composition ratio of the resin composition was as follows: photosensitive epoxy resin / epicoat 1001 / benzophenone / Michler's ketone / imidazole curing agent = 100/10/5 /
0.5 / 5.

(11) The liquid resist is applied to both surfaces of the core substrate 2 having been subjected to the catalyst nucleus treatment using a roll coater, and dried at 60 ° C. for 30 minutes to obtain a thickness of 3
A 0 μm resist layer was formed.

(12) Then, a photomask film was placed on the photomask film and irradiated with ultraviolet rays of 400 mJ / cm ² for exposure.

(13) The photomask film is removed, the resist layer is dissolved and developed with DMTG, and the inner conductor circuit 3, the pads 3A, the through-hole plating 4 are formed on the core substrate 2.
A resist layer for plating was formed by removing the portion corresponding to A, and further exposed to 6000 mJ / cm ² with an ultra-high pressure mercury lamp, and heated at 100 ° C. for 1 hour and then at 150 ° C. for 3 hours. Then, a permanent resist layer 8 was formed on the interlayer resin insulating layer 6 (see FIG. 11).

(14) The core substrate 2 on which the permanent resist layer 8 has been formed is subjected to a pre-plating treatment (specifically, a sulfuric acid treatment or the like and activation of a catalyst nucleus), and thereafter, an electroless copper plating bath is used. An electroless copper plating having a thickness of about 15 μm is deposited on a non-resist forming portion by electroless plating, and outer conductor circuits 9 and via holes 10 are formed on the front and back surfaces of the core substrate 2. A layer was formed. Thus, the multilayer printed wiring board 1 shown in FIG. 1 was obtained. In this embodiment, the image is created by the full additive method, but a so-called semi-additive method may be used instead.

Here, the warpage was measured for a number of multilayer printed wiring boards 1 manufactured as described above. The measurement of the amount of warpage is performed by measuring the difference between a predetermined reference plane and the surface of the multilayer printed wiring board 1 for any 25 points, and taking the difference between the maximum value and the minimum value of the measured values as the amount of warpage. Defined. As a result of measuring the amount of warpage, the average amount of warpage was 47 μm.
m, the warpage amount does not exceed 76 μm, but is not more than the allowable value of the general warpage amount (75 μm), and it has been confirmed that the warpage amount of the multilayer printed wiring board 1 is sufficiently within the allowable value range. .

For comparison, when the multilayer printed wiring board 1 was manufactured using the core substrate 2 having a thickness of 0.6 mm for comparison with the above-described embodiment, the multilayer printed wiring board 1 was manufactured.
In the above, 55% of the total exceeds the warpage of 76 μm, and the average warpage at this time was 88.45 μm.
When the multilayer printed wiring board 1 is manufactured using the core substrate 2 having a thickness of 1.1 mm, the diameter of the metamask 11 is reduced because the filling amount of the resin 5 into the through holes 4 increases. The opening must be 0.65 mm, and the openings of the metal mask 11 come into contact with each other. Therefore, the resin 5 cannot be filled by the printing method. Printing method is resin 5
Is embedded in the through-hole 4 with a squeegee, so that it is easier to fill the resin than the roll coater method. However, it was confirmed that when the thickness of the core substrate 2 was increased, the printing method could not be adopted.

As described above, in the multilayer printed wiring board 1 manufactured according to the above embodiment, the core substrate 2
Is adjusted to fall within the range of 0.6 mm to 1.00 mm, so that it is possible to sufficiently oppose a force that tends to generate warpage in the multilayer printed wiring board 1 and prevent warpage. The filling of the resin 5 into the through hole 4 can be performed without any trouble. That is, by setting the thickness of the core substrate 2 to exceed 0.6 mm, the warpage of the multilayer printed wiring board 1 due to the curing shrinkage of the interlayer resin insulating layer 6 is prevented, and the thickness of the core substrate 2 is reduced. 1.
By setting the thickness to 0 mm or less, the filling property of the resin 5 into the through holes 4 can be guaranteed. Accordingly, various electronic components can be reliably mounted while maintaining the parallelism between the outer layer conductor circuits 9 and the via holes 10 on both surfaces of the multilayer printed wiring board 1, thereby maintaining high mounting reliability. Thus, the thickness range of the core substrate 2 (0.
6 mm to 1.0 mm), the warpage of the multilayer printed wiring board 1 is prevented, and the surface irregularities of the interlayer resin insulating layer 6 are prevented.
It can be seen that this is a specific range in which the mounting reliability of electronic components such as C chips can be ensured.

It should be noted that the present invention is not limited to the above-described embodiment, and various improvements and modifications can be made without departing from the spirit of the present invention.

[0039]

As described above, claims 1 to 3 are described.
In the multilayer printed wiring board and the method of manufacturing the same, the thickness of the core substrate is adjusted to be in the range of 0.6 mm to 1.00 mm, so that the multilayer printed wiring board is sufficiently resistant to a force for generating a warp in the multilayer printed wiring board. Therefore, warpage can be prevented, and resin can be filled into the through-hole without any trouble. That is, by setting the thickness of the core substrate to be more than 0.6 mm, warpage of the multilayer printed wiring board due to curing shrinkage of the interlayer resin insulating layer is prevented, and the thickness of the core substrate is set to 1. By setting the thickness to 0 mm or less, it is possible to guarantee the resin filling property of the through holes. Accordingly, various electronic components can be reliably mounted while ensuring the parallelism between the conductor circuits in the multilayer printed wiring board, and the mounting reliability can be maintained high. As described above, the range of the thickness of the core substrate is unique in that the warpage of the multilayer printed wiring board can be prevented, the surface unevenness of the interlayer resin insulating layer can be prevented, and the mounting reliability of electronic components such as IC chips can be secured. It can be seen that this is a typical range.

As described above, the present invention is excellent in the filling property of the resin into the through holes and can reduce the amount of warpage of the multilayer printed wiring board. It is possible to provide a multilayer printed wiring board with high mounting reliability, in which various electronic components can be securely mounted while ensuring the parallelism between the conductor circuits.

[Brief description of the drawings]

FIG. 1 is a sectional view schematically showing a multilayer printed wiring board.

FIG. 2 is a sectional view schematically showing a core substrate.

FIG. 3 is a cross-sectional view schematically showing a state in which inner-layer conductor circuits, pads, and through-hole plating are formed on both surfaces of a core substrate.

FIG. 4 is a cross-sectional view schematically showing a state where metal masks are arranged on both surfaces of a core substrate.

FIG. 5 is a cross-sectional view schematically showing a state in which resin is filled in through holes of a core substrate.

FIG. 6 is a cross-sectional view schematically showing a state in which a resin layer is formed over both surfaces of the core substrate.

FIG. 7 is a cross-sectional view schematically showing a state in which resin layers on both surfaces of a core substrate are polished.

FIG. 8 is a cross-sectional view schematically showing a state in which an interlayer resin insulating layer is formed on the resin layers on both surfaces of the core substrate.

FIG. 9 is a cross-sectional view schematically showing a state in which an opening for a via hole is formed in an interlayer resin insulating layer.

FIG. 10 is a cross-sectional view schematically showing a state where the surface of an interlayer resin insulating layer is roughened.

FIG. 11 is a cross-sectional view schematically showing a state in which a permanent resist layer is formed on a roughened interlayer resin insulating layer.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Multilayer printed wiring board 2 Core board 3 Inner layer conductor circuit 3A pad 4 Through hole 4A Through hole plating 5 Resin (layer) 6 Interlayer resin insulation layer 7 Via hole opening 8 Permanent resist layer 9 Outer layer conductor circuit 10 Via hole 11 Metal mask

Claims (3)

[Claims] 1. A multilayer printed wiring board having a through hole formed in a core substrate and conductive circuits formed on both surfaces of the core substrate, wherein the through hole is filled with a resin, and Thickness exceeds 0.6mm, 1.0mm
A multilayer printed wiring board characterized by the following. 2. The multilayer printed wiring board according to claim 1, wherein at least one conductive circuit layer is laminated on both surfaces of the core substrate via an interlayer resin insulating layer. 3. A through-hole is formed in a core substrate, a printing mask having an opening formed in a portion corresponding to the position of the through-hole is placed on the core substrate, and resin is printed to form a resin in the through-hole. And then laminating an interlayer resin insulation layer and a conductive circuit layer on both sides of the core substrate, wherein the thickness of the core substrate exceeds 0.6 mm and 1.0 mm
A method for manufacturing a multilayer printed wiring board, characterized by the following.