JPH10178114A - Manufacture of semiconductor non-volatile storage device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor non-volatile storage device causing no deterioration of an inter-layer insulating film between a floating gate and a control gate. SOLUTION: A gate insulating film 21 formed on a semiconductor substrate is overlaid with a floating gate 31, an inter-layer insulating film 22 is formed over the floating gate, and a first control gate 32a is formed over the inter-layer insulating film. And a contact hole C exposing the floating gate 31 is opened through the first control gate 32a and the inter-layer insulating film 22 present in a selective transistor region, and a preprocessing for removal of a naturaloxidizing film on the surface of the floating gate 31 exposed from the contact hole C is performed. Further, a second control gate 32b electrically connected to the floating gate 31 through the contact hole C is formed over the first control gate 32a.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor nonvolatile memory device, and more particularly to a method for manufacturing a semiconductor nonvolatile memory device having a memory transistor and a select transistor.

[0002]

2. Description of the Related Art In a semiconductor non-volatile memory device for storing electric charges in a floating gate electrode, for example, NAN
In a D-type storage device or the like, a memory cell array has a memory transistor and a selection transistor. The gate electrode of the memory transistor has a two-layer structure of a floating gate and a control gate.
The wiring of the layers is laminated while being insulated from each other. When a predetermined voltage is applied to the control gate, charges are injected from the semiconductor substrate to the floating gate through the tunnel insulating film. When charge is injected, the potential of the floating gate changes. Data can be recorded or erased by the change in the potential of the floating gate.

The gate electrode of one select transistor is
Unlike a memory transistor, it cannot have an insulated floating gate. Therefore, in a semiconductor non-volatile memory device having a memory transistor and a select transistor in a memory cell array, one of the following two methods is employed in the manufacturing method. One is a method of forming a select gate by providing only a layer corresponding to a control gate without providing a floating gate among gate electrodes of a memory transistor as a gate electrode of a select transistor. The other is a method in which an insulated floating gate and a control gate are formed also on the gate electrode of the selection transistor as in the case of the memory transistor, and the floating gate and the control gate are electrically connected in a later step. . In the former case, since two types of gate electrodes are formed, the number of steps becomes large and the process becomes complicated. In the latter case, the gate electrodes of the memory transistor and the selection transistor can be simultaneously formed halfway.

FIGS. 8 and 9 show an example of a manufacturing method in which an insulated floating gate and a control gate are formed as described above, and the floating gate and the control gate are electrically connected in a later step. I will explain. FIG. 8 is a plan view of a memory cell array of a semiconductor nonvolatile memory device manufactured by the above method,
FIG. 9 is a sectional view taken along line DD ′ in FIG. First,
Element isolation insulating film 2 such as LOCOS on semiconductor substrate 10
Next, a gate insulating film 21 is formed by thermal oxidation or the like. Next, a floating gate layer FG (31) is formed by depositing a conductor such as polysilicon by CVD or the like on the gate insulating film 21 so as to cover the active region of the transistor surrounded by the element isolation insulating film 20. The pattern of the gate FG (31) is etched. An interlayer insulating film 22 is formed thereon by depositing silicon oxide or the like by CVD or the like. A control gate CG (32) is formed on top of the conductive layer such as polysilicon by CVD.
Then, the control gate CG (32) is etched into the pattern P1 shown by the broken line, and further, is etched into the pattern of the control gate CG shown in FIG. Next, an interlayer insulating film 23 is formed by depositing silicon oxide or the like by CVD or the like so as to cover the entire surface,
A contact hole C is opened so that the floating gate 31 and the control gate 32 are exposed. next,
The contact hole C is filled with a conductor by CVD or the like to form a connection wiring layer CL (33). Thereby, the floating gate 31 and the control gate 3
2 are electrically connected.

In order to improve the degree of integration of the memory cell array, there is a method using a trench type element isolation insulating film. FIG. 2 shows a plan view of a semiconductor nonvolatile memory device manufactured by this method. Floating gate FG is arranged at the intersection of control gate CG and transistor active layer TA. Transistor active layer T
There is a trench type element isolation insulating film between A. In the case of such a structure, connection by a shunt like the semiconductor nonvolatile memory device shown in FIGS. 8 and 9 cannot be performed, and both gates are electrically connected at the intersection of the floating gate FG and the control gate CG. Contact hole C.

FIG. 10 is a cross-sectional view of a semiconductor nonvolatile memory device using a trench-type element isolation insulating film, and corresponds to a cross-sectional view taken along line AA ′ in FIG. A region delimited by the trench-type element isolation insulating film 20 embedded in the semiconductor substrate 10 becomes an active region of the transistor, and a floating gate 31 is provided thereover via a gate insulating film. The upper layer is covered with an interlayer insulating film 22, the upper part of the floating gate of the interlayer insulating film is opened, and the control gate 3 in the upper layer of the interlayer insulating film 22 is formed.
2 is connected to the underlying floating gate 31 in a form embedded in the opening.

FIG. 10 shows a method of manufacturing a semiconductor nonvolatile memory device using the above-mentioned trench type element isolation insulating film.
This will be described below. First, steps up to a step shown in FIG. A gate insulating film 21 is formed on the semiconductor substrate 10 by thermal oxidation or the like, and, for example, polysilicon or the like is deposited thereon by CVD to form a floating gate 31. A resist is patterned on the upper layer of the floating gate 31 and reactive ion etching (RI
After etching such as E) and patterning like a floating gate, the gate insulating film 21 and the semiconductor substrate 10 are further etched to form a recess serving as a trench insulating film region, and the resist is removed. (A)
Leads to.

Next, as shown in FIG. 10B, an insulator such as silicon oxide is deposited by CVD or the like, and is etched back to fill the recess with the insulator. To form Next, silicon oxide or the like is deposited on the entire surface by CVD, and an interlayer insulating film 22 is formed.

Next, as shown in FIG. 10C, the interlayer insulating film 22 above the floating gate 31 is removed by patterning and etching a resist, and a contact hole is opened. The resist for opening the contact hole is removed, and pre-treatment such as hydrofluoric acid wet cleaning is performed to remove the natural oxide film on the surface of the floating gate exposed in the contact hole. Is deposited on the entire surface by CVD or the like, and is patterned to form the control gate 32. The control gate 32 is electrically connected to the floating gate 31 at a contact hole.

[0010]

However, in the above-mentioned conventional method of manufacturing a semiconductor nonvolatile memory device using a trench-type element isolation insulating film, a contact hole for connecting the floating gate 31 and the control gate 32 is formed. Forming a resist for forming a contact hole, removing the resist after forming the contact hole, and removing a natural oxide film in the opening before forming the control gate 32. A pre-processing step such as wet cleaning is required, and these steps cause deterioration of the film quality of the interlayer insulating film 22. In particular, in a pretreatment step such as wet cleaning for removing a natural oxide film, there is a problem that the action of removing silicon oxide causes the interlayer insulating film 22 to be thinned.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and a method of manufacturing a semiconductor non-volatile memory device having a trench-type element isolation insulating film or the like with an increased degree of integration of the device is provided. Provided is a method of manufacturing a semiconductor non-volatile memory device which does not cause deterioration of an interlayer insulating film between a floating gate and a control gate, particularly thinning when the floating gate and the control gate are connected to form an electrode. With the goal.

[0012]

In order to achieve the above object, a method of manufacturing a semiconductor nonvolatile memory device according to the present invention comprises a gate electrode electrically connected to a floating gate and a control gate formed on a semiconductor substrate. Forming a floating gate on a gate insulating film formed on a semiconductor substrate, and forming an interlayer insulating film on the floating gate. Process and
Forming a first control gate in an upper layer by covering the interlayer insulating film; and opening a contact hole for exposing the floating gate through the first control gate and the interlayer insulating film in the select transistor region. A hole process, a pretreatment process for removing a native oxide film on the surface of the floating gate exposed in the contact hole, and a second control gate electrically connected to the floating gate through the contact hole. Forming an upper layer.

According to the method of manufacturing a semiconductor nonvolatile memory device of the present invention, a contact hole for connecting the floating gate and the first control gate is opened, and the surface of the floating gate exposed in the contact hole is formed. When performing pretreatment to remove the natural oxide film,
The interlayer insulating film covering the floating gate is covered and protected by the first control gate. Therefore, deterioration of the film quality of the interlayer insulating film can be prevented, and the interlayer insulating film can be prevented from being eroded and thinned even in cleaning for removing a natural oxide film.

The method of manufacturing a semiconductor non-volatile memory device according to the present invention preferably includes a step of forming a resist film for forming a contact hole before the step of forming a contact hole. The method further includes the step of removing the resist film after the hole opening step. When the contact hole is opened by masking with the resist film, the interlayer insulating film covering the floating gate is covered and protected by the first control gate, so that deterioration of the film quality of the interlayer insulating film can be prevented.

In the method of manufacturing a semiconductor nonvolatile memory device according to the present invention, preferably, after the step of forming the floating gate, the step of forming recesses in the semiconductor substrate on both sides of the floating gate by etching. Have
Forming a trench-type element isolation insulating film by burying an insulator in the concave portion. According to the trench-type element isolation insulating film, the element isolation insulating film and the active region of the transistor can be formed in close contact with each other, and the degree of integration of the device can be increased.

According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor nonvolatile memory device, comprising: a select transistor having a gate electrode electrically connected to a control gate and a floating gate formed on a semiconductor substrate; A method of manufacturing a semiconductor non-volatile memory device, comprising: forming a floating gate on a gate insulating film formed on a semiconductor substrate; forming an interlayer insulating film on an upper layer of the floating gate; Forming a control gate in an upper layer by covering the interlayer insulating film; opening a contact hole exposing the floating gate through the control gate and the interlayer insulating film in the select transistor region; Natural acid on the surface of the floating gate exposed in the contact hole And a step of forming a pretreatment step of removing the film, the connection wiring layer for electrically connecting the control gate and the floating gate through the contact hole.

According to the method of manufacturing a semiconductor nonvolatile memory device of the present invention, a contact hole for connecting a floating gate and a control gate is opened.
When performing a pretreatment for removing a native oxide film on the surface of the floating gate exposed in the contact hole, the interlayer insulating film covering the floating gate is covered and protected by the control gate. Therefore, deterioration of the film quality of the interlayer insulating film can be prevented, and the interlayer insulating film can be prevented from being eroded and thinned even in cleaning for removing a natural oxide film.

The method of manufacturing a semiconductor nonvolatile memory device according to the present invention preferably includes a step of forming a resist film for forming a contact hole before the step of forming a contact hole. The method further includes the step of removing the resist film after the hole opening step. When opening the contact hole by masking with the resist film, the interlayer insulating film covering the floating gate is covered and protected by the control gate, so that deterioration of the film quality of the interlayer insulating film can be prevented.

Preferably, in the method of manufacturing a semiconductor nonvolatile memory device according to the present invention, after the step of forming the floating gate, a step of forming recesses in the semiconductor substrate on both sides of the floating gate by etching. Have
Forming a trench-type element isolation insulating film by burying an insulator in the concave portion. According to the trench-type element isolation insulating film, the element isolation insulating film and the active region of the transistor can be formed in close contact with each other, and the degree of integration of the device can be increased.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described with reference to the drawings by the following embodiments. First Embodiment FIG. 2 is a plan view of a semiconductor nonvolatile memory device manufactured by a method for manufacturing a semiconductor nonvolatile memory device according to the present embodiment. The floating gate FG is the control gate C
It is arranged at the intersection of G and the transistor active layer TA. There is a trench type element isolation insulating film between the transistor active layers TA. At the intersection of the floating gate FG and the control gate CG, there is a contact hole C for electrically connecting both gates.

FIG. 1C is a cross-sectional view of the semiconductor non-volatile memory device manufactured by the method of manufacturing a semiconductor non-volatile memory device according to the present embodiment, and corresponds to a cross-sectional view taken along line AA 'in FIG. A region separated by the trench-type element isolation insulating film 20 embedded in the semiconductor substrate 10 becomes an active region of the select transistor, and a floating gate 31 is provided thereover via a gate insulating film. The upper layer is covered with an interlayer insulating film 22, and a contact hole is formed in an upper portion of the floating gate of the interlayer insulating film and the first control gate 32a formed thereon. The second control gate 32b fills the contact hole and covers the first control gate 32a. Further, a third layer is formed above the second control gate.
There is a control gate 32c. Thereby, the first control gate 32a and the second control gate 32
b, a control gate 32 as a stacked body of the third control gate 32c is formed.

A method for manufacturing a semiconductor nonvolatile memory device having such a structure will be described. First, steps up to FIG. 1A will be described. A gate insulating film 21 is formed on the semiconductor substrate 10 by thermal oxidation or the like, and, for example, polysilicon or the like is deposited thereon by CVD to form a floating gate 31. The resist is patterned on the upper layer of the floating gate 31 and subjected to etching such as reactive ion etching (RIE), and patterning is performed like a floating gate.
1 and the semiconductor substrate 10 are etched to form a recess serving as a trench insulating film region, and the resist is removed. Next, an insulator such as silicon oxide is deposited by CVD or the like,
Etch-back is performed to fill the recesses with an insulator to form a trench-type element isolation insulating film 20. Next, silicon oxide or the like is deposited on the entire surface by CVD, and an interlayer insulating film 2 is formed.
Form 2 Next, a conductor such as polysilicon is deposited on the interlayer insulating film 22 by CVD or the like to form a first control gate 32a.

Next, as shown in FIG. 1B, the resist is patterned and subjected to etching such as RIE to penetrate through the interlayer insulating film 22 and the first control gate 32a to expose the surface of the floating gate 31. Open contact holes. After opening the contact hole, the resist is removed.

Next, as shown in FIG. 1C, after performing a pretreatment such as hydrofluoric acid wet cleaning to remove a natural oxide film on the surface of the floating gate 31 in the contact hole, a conductive material such as polysilicon is formed. A body is deposited on the entire surface by CVD or the like to form a second control gate 32b. Further, tungsten silicide or the like is deposited on the second control gate 32b by CVD to form the third control gate 32c. After that, pattern processing is performed to form the control gate 32 which is a stacked body of the first to third control gates. The second control gate 32b is embedded in the contact hole and is electrically connected to the floating gate 31. Thereafter, a desired semiconductor non-volatile memory device is manufactured by patterning the wiring and electrodes of the upper layer.

According to the method of manufacturing a semiconductor nonvolatile memory device of the present embodiment, a contact hole for connecting the floating gate and the first control gate is opened, and the surface of the floating gate exposed in the contact hole is opened. In performing the pre-treatment for removing the natural oxide film, the interlayer insulating film covering the floating gate is covered and protected by the first control gate. Therefore, deterioration of the film quality of the interlayer insulating film can be prevented, and the interlayer insulating film can be prevented from being eroded and thinned even in cleaning for removing a natural oxide film. In addition, since the control gate and the floating gate are etched after the control gate and the floating gate are electrically connected, the memory cell floating gate is grounded through the control gate even when the floating gate is etched. Can prevent the interlayer insulating film 22 and the gate insulating film 21 from being deteriorated due to the charge-up.

Second Embodiment FIG. 3 is a sectional view of a semiconductor nonvolatile memory device manufactured by the method for manufacturing a semiconductor nonvolatile memory device according to the present embodiment.
Unlike the first embodiment, the first control gate that covers the interlayer insulating film 22 is a conductive two-layer wiring 32a, 32b.
It is a laminated body of. A second control gate 32c is formed so as to cover the first control gate. The second control gate 32c is embedded in the contact hole and is electrically connected to the floating gate 31. The first control gate may be a single-layer film.

A method for manufacturing a semiconductor nonvolatile memory device having such a structure will be described. The steps up to the step of forming the first control gate 32a of the first embodiment are formed in the same manner.
After the control gate 32a is formed, polysilicon or the like is further deposited by CVD or the like to form a control gate 32b, and the first control gate is formed as a laminate of two layers of wirings 32a and 32b. The resist is patterned and etched by RIE or the like, and a contact hole that penetrates through the interlayer insulating film 22 and the first control gates 32a and 32b and exposes the surface of the floating gate 31 is formed. After opening the contact hole, the resist is removed. After performing a pretreatment such as hydrofluoric acid wet cleaning to remove a natural oxide film on the surface of the floating gate 31 in the contact hole, a conductor such as tungsten silicide is deposited on the entire surface by CVD or the like to form the second control gate 32c. Form. The following is the same as in the first embodiment.

As in the first embodiment, according to the method of manufacturing a semiconductor nonvolatile memory device of the present embodiment, deterioration of the film quality of the interlayer insulating film can be prevented. Also, it is possible to prevent the interlayer insulating film from being eroded and thinned.

Third Embodiment FIG. 4 is a plan view of a semiconductor nonvolatile memory device manufactured by the method for manufacturing a semiconductor nonvolatile memory device according to the present embodiment. The floating gate FG is the control gate C
It is arranged at the intersection of G and the transistor active layer TA. There is a trench type element isolation insulating film between the transistor active layers TA. There is an overhang of the control gate from the intersection of the floating gate FG and the control gate CG toward the upper part of the drawing, and two contact holes C1 for electrically connecting both gates in the overhang are provided.
C2 is opened, the connection wiring layer CL is embedded in the contact hole, and the floating gate FG is opened.
And the control gate CG are electrically connected.

FIG. 5D is a cross-sectional view of the semiconductor non-volatile memory device manufactured by the method of manufacturing a semiconductor non-volatile memory device according to the present embodiment, and corresponds to a cross-sectional view taken along line BB 'in FIG. A region separated by the trench-type element isolation insulating film 20 embedded in the semiconductor substrate 10 becomes an active region of the select transistor, and a floating gate 31 is provided thereover via a gate insulating film. The upper layer is covered with an interlayer insulating film 22, and the upper layer is further covered with a control gate 32. A first contact hole C1 penetrating the interlayer insulating film 22 and the control gate 32 and having a depth of about half the thickness of the floating gate 31 is opened. 23, a second contact hole C2 exposing the first contact hole C1 is opened. The connection wiring layer 33 has the first contact hole C1.
And the floating gate 31 and the control gate 32 are electrically connected to each other by being buried in the second contact hole C2.

A method for manufacturing a semiconductor nonvolatile memory device having such a structure will be described. First, steps up to a step shown in FIG. A gate insulating film 21 is formed on the semiconductor substrate 10 by thermal oxidation or the like, and, for example, polysilicon or the like is deposited thereon by CVD to form a floating gate 31. The resist is patterned on the upper layer of the floating gate 31 and subjected to etching such as reactive ion etching (RIE), and patterning is performed like a floating gate.
1 and the semiconductor substrate 10 are etched to form a recess serving as a trench insulating film region, and the resist is removed. Next, an insulator such as silicon oxide is deposited by CVD or the like,
Etch-back is performed to fill the recesses with an insulator to form a trench-type element isolation insulating film 20. Next, silicon oxide or the like is deposited on the entire surface by CVD, and an interlayer insulating film 2 is formed.
Form 2 Next, a conductor such as polysilicon is deposited on the interlayer insulating film 22 by CVD or the like to form the control gate 32.

Next, as shown in FIG. 5B, the resist is patterned by the pattern of the control gate and the first contact hole, and is subjected to etching such as RIE.
The control gate 32 is etched, and a first contact hole C1 having a depth of about half the thickness of the floating gate 31 is formed through the interlayer insulating film 22 and the control gate 32. In this etching step, the floating gate is left at the intersection of the control gate and the transistor active layer. In this etching step, a line-shaped wiring portion to be widely etched (on the right side, a right side portion of the floating gate in the drawing, a left side portion of the left side floating gate), and a hole-shaped opening portion (contact hole C1). Since the etching rate is lower in the hole-shaped opening portion in the case of, the floating gate 31 is entirely etched until the gate insulating film is exposed in the line-shaped wiring portion by appropriately setting the etching time. At the hole-shaped opening, etching can be limited to a depth of about half the thickness of the floating gate 31. After the opening of the first contact hole C1, the resist is removed.

Next, as shown in FIG. 5C, for example, silicon oxide is deposited by CVD, and reflow or etch back is performed to form a flattening film 23. A resist is patterned on the flattening film 23 and etched by RIE or the like, and a second contact hole C2 exposing a part or all of the first contact hole C1 is opened. At this time, since the floating gate 31 serves as an etching stopper, the hole is not opened to the semiconductor substrate 10.

Next, as shown in FIG. 5D, a natural oxide film on the surface of the floating gate 31 exposed to the first contact hole C1 is removed by performing a pretreatment such as hydrofluoric acid wet cleaning and the like, and then tungsten is removed. Conductor such as CV
D and the like, and buried in the first contact hole C1 and the second contact hole C2 to form a connection wiring layer 33 for electrically connecting the floating gate 31 and the control gate 32. Thereafter, a desired semiconductor non-volatile memory device is manufactured by patterning the wiring and electrodes of the upper layer.

According to the method of manufacturing the semiconductor nonvolatile memory device of the present embodiment, the first and second contact holes for connecting the floating gate and the control gate are opened, and the first and second contact holes are formed in the first contact hole. When performing a pretreatment for removing the native oxide film on the exposed floating gate surface, the interlayer insulating film covering the floating gate is covered and protected by the control gate. Therefore, deterioration of the film quality of the interlayer insulating film can be prevented, and the interlayer insulating film can be prevented from being eroded and thinned even in cleaning for removing a natural oxide film.

Fourth Embodiment FIG. 6 is a plan view of a semiconductor nonvolatile memory device manufactured by the method for manufacturing a semiconductor nonvolatile memory device according to the present embodiment.
Different from the third embodiment, two first contact holes C1
Has been opened in close proximity. Other than the above, it is almost the same as the third embodiment.

Next, a method of manufacturing the semiconductor nonvolatile memory device according to this embodiment will be described. FIG. 7 is a cross-sectional view showing a manufacturing process of the method for manufacturing the semiconductor nonvolatile memory device according to the present embodiment, and corresponds to a cross-sectional view taken along the line CC ′ in FIG. Similar to the third embodiment shown in FIG. 5A, after the control gate 32 is formed, a resist is formed and etching such as RIE is performed to open a first contact hole.
However, unlike the third embodiment, the two first contact holes C1 are opened close to each other. First contact hole C1
The end of the floating gate 31 is hung inside.

As described above, the first control gate C1
After forming a hole, a flattening film is formed, a second contact hole is formed, a connection wiring layer is formed, and a desired semiconductor nonvolatile memory device is formed as in the third embodiment.

According to the method of manufacturing a semiconductor nonvolatile memory device of the present embodiment, it is possible to manufacture a semiconductor device having a higher degree of integration than the manufacturing method of the third embodiment. Further, similarly to the third embodiment, it is possible to prevent the deterioration of the film quality of the interlayer insulating film, and it is possible to prevent the interlayer insulating film from being eroded and thinned even in the cleaning for removing the natural oxide film.

The method for manufacturing a semiconductor nonvolatile memory device of the present invention is not limited to the above embodiment. For example, although the floating gate is formed of a single layer of polysilicon, a process of forming a multilayer structure such as silicide or polycide may be employed. In addition, the source / drain diffusion layer is L
A DD structure or the like may be adopted, and there is no particular limitation. NO if a semiconductor memory device has a selection transistor
It may be an R type. As a semiconductor nonvolatile memory device,
The injection of charges into the floating gate in the memory transistor may be equivalent to either writing or erasing of data. In addition, various changes can be made without departing from the gist of the present invention.

[0041]

According to the method of manufacturing a semiconductor non-volatile memory device of the present invention, in the method of manufacturing a semiconductor non-volatile memory device having a trench-type element isolation insulating film or the like with an increased degree of integration of the device, When a floating gate and a control gate are connected to each other to form a gate electrode, a semiconductor non-volatile memory device can be manufactured without causing deterioration of an interlayer insulating film between the floating gate and the control gate, particularly without causing a reduction in thickness. .

[Brief description of the drawings]

FIG. 1 is a sectional view showing a manufacturing process of a method for manufacturing a semiconductor nonvolatile memory device according to a first embodiment of the present invention;
(A) shows the process up to the step of forming the first control gate.
(B) shows up to the step of forming a contact hole, and (c) shows up to the step of forming a third control gate.

FIG. 2 is a plan view of a semiconductor nonvolatile memory device manufactured by a method for manufacturing a semiconductor nonvolatile memory device according to the first embodiment and the second embodiment of the present invention.

FIG. 3 is a sectional view of a semiconductor nonvolatile memory device manufactured by a method of manufacturing a semiconductor nonvolatile memory device according to a second embodiment of the present invention.

FIG. 2 is a plan view of a semiconductor nonvolatile memory device manufactured by a method of manufacturing a semiconductor nonvolatile memory device according to a third embodiment of the present invention.

FIG. 5 is a sectional view showing a manufacturing process of a method for manufacturing a semiconductor nonvolatile memory device according to a third embodiment of the present invention;
(A) until the control gate formation step, (b) until the control gate etching and contact hole opening step, (c) until the contact hole reopening step after the formation of the planarization film, (d) ) Shows the steps up to the step of forming the connection wiring layer.

FIG. 6 is a plan view of a semiconductor nonvolatile memory device manufactured by a method for manufacturing a semiconductor nonvolatile memory device according to a fourth embodiment of the present invention.

FIG. 7 is a cross-sectional view showing a manufacturing process of a method for manufacturing a semiconductor nonvolatile memory device according to a fourth embodiment of the present invention, and shows a process up to a contact hole opening process;

FIG. 8 is a plan view of a semiconductor nonvolatile memory device manufactured by a conventional method of manufacturing a semiconductor nonvolatile memory device.

FIG. 9 is a cross-sectional view of a semiconductor nonvolatile memory device manufactured by a conventional method of manufacturing a semiconductor nonvolatile memory device.

FIGS. 10A and 10B are cross-sectional views showing a manufacturing process of a conventional method for manufacturing a semiconductor nonvolatile memory device, in which FIG. 10A shows up to a trench groove forming process, and FIG. 10B shows an interlayer insulating film covering a floating gate; (C) shows up to the step of forming the control gate.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 10 ... Semiconductor substrate, 20 ... Element isolation insulating film, 21 ... Gate insulating film, 22 ... Interlayer insulating film, 23 ... Planarization film, 31 ...
Floating gate, 32a, 32b, 32c: control gate, 33: connection wiring layer

Claims (6)

[Claims] 1. A method for manufacturing a semiconductor nonvolatile memory device having a select transistor having a gate electrode electrically connected to a floating gate and a control gate formed on a semiconductor substrate, comprising: Forming a floating gate on the gate insulating film, forming an interlayer insulating film on the floating gate, forming a first control gate on the upper layer by covering the interlayer insulating film, Forming a contact hole through the first control gate and the interlayer insulating film in the transistor region to expose the floating gate; and removing a native oxide film on the surface of the floating gate exposed in the contact hole. A processing step, and a floater through the contact hole. Method for production of a semiconductor nonvolatile memory device having a step of the second control gate is formed on the upper layer of the first control gate electrically connected to Ngugeto. 2. The method according to claim 1, further comprising a step of forming a resist film for forming a contact hole before the step of forming the contact hole, and a step of removing the resist film after the step of forming the contact hole. 2. A method for manufacturing a semiconductor nonvolatile memory device according to item 1. 3. A step of forming a recess in the semiconductor substrate on both sides of the floating gate after the step of forming the floating gate, wherein an insulator is buried in the recess to form a trench-type element isolation insulator. 2. The method according to claim 1, further comprising the step of forming a film. 4. A method for manufacturing a semiconductor nonvolatile memory device having a select transistor having a gate electrode electrically connected to a floating gate and a control gate formed on a semiconductor substrate, the method comprising: Forming a floating gate on the gate insulating film, forming an interlayer insulating film on the floating gate, forming a control gate on the upper layer by covering the interlayer insulating film, A contact hole opening step of exposing the floating gate through the control gate and the interlayer insulating film, and a pretreatment step of removing a native oxide film on the surface of the floating gate exposed in the contact hole; The floating hole through the contact hole Method for production of a semiconductor nonvolatile memory device having a step of forming a connection wiring layer for electrically connecting the gate and the control gate. 5. The method according to claim 1, further comprising a step of forming a resist film for forming a contact hole before the step of forming the contact hole, and a step of removing the resist film after the step of forming the contact hole. 5. The method for manufacturing a semiconductor nonvolatile memory device according to item 4. 6. A step of forming a recess in a semiconductor substrate on both sides of the floating gate after the step of forming the floating gate, wherein an insulator is buried in the recess to form a trench-type element isolation insulator. 5. The method according to claim 4, further comprising the step of forming a film.