JPH10163481A - Semiconductor integrated circuit device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device which has a gate electrode in which the formation of a metallic silicide is prevented and whose resistance is made low. SOLUTION: This semiconductor integrated circuit device is one where a conductive polycrystalline silicon film 4 as a gate electrode, and a metallic film 10 such as for example tungsten or the like, arranged thereon, are made in the gate region of a MOSFET(metal oxide semiconductor field effect transistor) made at a semiconductor substrate 1. Then, a PSG film 9 is made, and after execution of the heat treatment at high temperature for it, a metallic film 10 as a gate electrode is formed. Therefore, a metallic silicide consisting of those materials is not made between the polycrystalline silicon film 4 and the metallic film 10 on it, which prevents the resistance of the gate electrode from increasing by the metallic silicide, so a semiconductor integrated circuit device which has a MOSFET equipped with a low-resistance gate electrode can be manufactured.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor integrated circuit device and a method of manufacturing the same, and more particularly, to a MOSFET (Metal Oxide Semiconductor) having a low-resistance gate electrode.
The present invention relates to a semiconductor integrated circuit device having a tor field effect transistor) and a method of manufacturing the same.

[0002]

2. Description of the Related Art The present inventors have studied a technique for manufacturing a semiconductor integrated circuit device having a MOSFET. The following are the techniques studied by the inventor,
The outline is as follows.

That is, in a process of manufacturing a semiconductor integrated circuit device having a MOSFET, a conductive polycrystalline silicon film containing an impurity such as phosphorus (P) is formed as a gate electrode, and a conductive polycrystalline silicon film is formed thereon. A laminated film structure is formed with a metal film made of a resistive material such as tungsten (W), and the resistance of the gate electrode is reduced for the purpose of speeding up.

On the surface of a semiconductor region serving as a source and a drain, for example, a titanium (Ti) silicide film having a lower resistance than that of the semiconductor region is formed to lower the contact resistance of the region.

Further, after forming a MOSFET having a gate electrode having a metal film on a semiconductor substrate, when forming a first insulating film (passivation film) on the semiconductor substrate, sodium (Na) ion For the purpose of gettering such as, for example, PSG (PhosphoSil) which is a silicon oxide film containing phosphorus (P) as its insulating film.
icate Glass film or BPSG (Boro Phospho Silica)
te Glass) film.

As a document describing a technique for forming a gate electrode having a metal film in a semiconductor integrated circuit device having a MOSFET, for example, 1994
Some are described in p. 493 of the IEEE published in the year.

[0007]

However, in order to improve the moisture resistance of the PSG film or the BPSG film in the manufacturing process of the semiconductor integrated circuit device described above, 800 to 900 after depositing the PSG film or the BPSG film. Heat treatment of about ° C is performed.

Therefore, due to the heat treatment, for example, tungsten in the metal film of the gate electrode reacts with silicon (Si) in the polycrystalline silicon film to form a metal silicide such as tungsten silicide, and the resistance of the gate electrode decreases. The present inventor has found that the problem of the occurrence of the problem occurs.

An object of the present invention is to provide a semiconductor integrated circuit device having a gate electrode whose resistance can be reduced by preventing formation of metal silicide on the gate electrode, and a method of manufacturing the same.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0011]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, (1). The semiconductor integrated circuit device of the present invention includes a plurality of MOS transistors on a substrate such as a semiconductor substrate.
A semiconductor integrated circuit device in which an FET is formed and further has a silicon oxide film containing phosphorus as a first insulating film on a substrate thereof, and a conductive region as a gate electrode is provided in a gate region of the MOSFET. Polycrystalline silicon film and a metal film such as tungsten disposed thereon are formed. After a high-temperature heat treatment is performed on the first insulating film, a metal film as a gate electrode is formed. Since the metal silicide made of these materials is not formed between the conductive polycrystalline silicon film and the metal film thereon,
The metal silicide prevents the resistance of the gate electrode from being increased, and the MO having the low-resistance gate electrode is provided.
This is a semiconductor integrated circuit device having an SFET.

(2). According to the method of manufacturing a semiconductor integrated circuit device of the present invention, a gate insulating film, a conductive polycrystalline silicon film as a gate electrode and a conductive polycrystalline silicon film are formed in a gate region of a MOSFET in an element formation region of a substrate such as a semiconductor substrate. Forming a protective insulating film such as a silicon nitride film on the silicon film, forming a sidewall spacer in the gate region, and then forming a semiconductor region serving as a source and a drain in an element forming region of the substrate; After depositing a phosphorous-containing silicon oxide film on the substrate, the phosphorous-containing silicon oxide film is polished to a surface of the protective insulating film using a polishing technique to contain the phosphorous. Forming a first insulating film made of a silicon oxide film, and removing the protective insulating film from the gate region, and then removing the protective insulating film from the gate region. The metal film is formed on the conductive polysilicon film, and a step of forming a gate electrode of a laminated structure comprising a conductive polysilicon film and metal film.

[0014]

Embodiments of the present invention will be described below in detail with reference to the drawings. In all the drawings for describing the embodiments, components having the same function are denoted by the same reference numerals, and redundant description will be omitted.

(Embodiment 1) FIGS. 1 to 9 are sectional views showing steps of manufacturing a semiconductor integrated circuit device having a MOSFET according to an embodiment of the present invention. Using the figure,
A semiconductor integrated circuit device according to the present embodiment and a method for manufacturing the same will be described.

First, a selective region on the surface of a p-type semiconductor substrate (substrate) 1 made of, for example, single crystal silicon is thermally oxidized to form a field insulating film made of a silicon oxide film having a LOCOS (Local Oxidation of Silicon) structure. Form 2 Next, after a gate insulating film 3 made of, for example, a silicon oxide film is formed on the semiconductor substrate 1, a conductive polycrystalline silicon film 4 containing an impurity such as phosphorus is formed on the surface of the gate insulating film 3. CVD (Chemical Vapor Depositio)
After deposition using the n) method, a silicon nitride film 5 as a protective insulating film is formed thereon using a CVD method (FIG. 1). In this case, as described later, the conductive polycrystalline silicon film 4 is a conductive film under the gate electrode, and a metal film as a gate electrode is formed in a region of the silicon nitride film 5 thereon. It is. Therefore, the thickness of the silicon nitride film 5 as the protective insulating film is thicker than that of the conductive polycrystalline silicon film 4 and has a value corresponding to the thickness of the metal film as the gate electrode.

Next, using a photolithography technique and a selective etching technique, a silicon nitride film 5 and a polycrystalline silicon film 4 corresponding to the pattern of the gate electrode are formed.
A pattern of the gate insulating film 3 is formed thereunder (FIG. 2).

Then, after a silicon oxide film is formed on the semiconductor substrate 1 by using the CVD method, a sidewall spacer (sidewall insulating film) is formed on the side wall of the gate region by using a photolithography technique and a selective etching technique. 6) is formed. Thereafter, an n-type impurity such as phosphorus is ion-implanted and diffused into the surface of the
An n-type semiconductor region 7 serving as a source and a drain of the OSFET is formed (FIG. 3).

Next, after depositing, for example, a titanium (Ti) film on the semiconductor substrate 1, annealing is performed to form a titanium silicide film 8 in a region where the titanium film is in contact with the semiconductor region 7. Then, the titanium film in a region other than the titanium silicide film 8 is removed by etching, and a titanium silicide film 8 for reducing the contact resistance is provided on the surface of the semiconductor region 7. Then, on the semiconductor substrate 1,
After forming, for example, a PSG film 9 as a first insulating film using a CVD method, a heat treatment at about 800 to 900 ° C. is performed to improve the properties of the PSG film 9 as an insulating film such as moisture resistance. (FIG. 4).

In this case, as the first insulating film (passivation film), for the purpose of gettering sodium ions or the like, the insulating film other than the PSG film 9 which is a silicon oxide film containing phosphorus is used. Alternatively, a BPSG film that is a silicon oxide film containing phosphorus may be used.

Thereafter, for example, CMP (Chemical Mechanical)
The surface layer of the PSG film 9 is polished using a polishing technique such as cal polishing (chemical mechanical polishing) until the surface of the silicon nitride film 5 in the gate region is exposed. Is left on the semiconductor substrate 1 (FIG. 5).

Next, the silicon nitride film 5 on the polycrystalline silicon film 4 in the gate region is
Is removed by etching (FIG. 6).

Thereafter, the polycrystalline silicon film 4 in the gate region
A metal film 10 such as a tungsten film is formed on the substrate by using a selective CVD method (FIG. 7). In this case, the metal film 10 is a polycrystalline silicon film 4 as a gate electrode.
Is a metal film as a gate electrode disposed on the gate electrode. In addition to the tungsten film, a high melting point metal film such as a titanium film or molybdenum (Mo) or aluminum (A) is used.
1) or an embodiment using a metal film such as copper (Cu).

Next, after an insulating film 11 such as a plasma TEOS (tetraethoxysilane) film or a silicon oxide film is formed on the semiconductor substrate 1, a contact hole is formed by using a photolithography technique and a selective etching technique. (Connection hole) 12 is formed. Thereafter, a plug 13 is formed by burying, for example, tungsten in the contact hole 12 using a selective CVD method (FIG. 8).
In this case, the plug 13 may be configured to use a conductor such as a refractory metal such as titanium or molybdenum other than tungsten.

Thereafter, a wiring layer 14 made of, for example, an aluminum layer is deposited on the semiconductor substrate 1 by using a sputtering method or a CVD method, and is patterned by using a photolithography technique and a selective etching technique. The wiring layer 14 is formed (FIG. 9). Thereafter, a multi-layer wiring layer is formed on the semiconductor substrate 1 as necessary, and then a passivation film (not shown) is formed thereon, thereby completing the semiconductor integrated circuit device manufacturing process.

According to the above-described semiconductor integrated circuit device of the present embodiment and the method of manufacturing the same, a gate electrode having a laminated structure of a conductive polycrystalline silicon film 4 and a metal film 10 such as a tungsten film is formed. And its metal film 1
Since various high-temperature treatments in the manufacturing process have been completed before forming 0, the conductive polycrystalline silicon film 4 serving as a gate electrode reacts with the metal film 10 to form metal silicide. A reduction in the resistance of the electrode is prevented.

Therefore, the gate electrode of the present embodiment has a laminated structure of the conductive polycrystalline silicon film 4 and the metal film 10 such as a tungsten film, for example. Since no metal silicide is formed by the treatment, a low-resistance gate electrode can be obtained, so that a high-speed MO
A semiconductor integrated circuit device having an SFET can be obtained.

According to the semiconductor integrated circuit device and the method of manufacturing the same according to the above-described embodiment, it is necessary to perform various high-temperature treatments, which will be described later, before forming the metal film 10 in the gate electrode having the laminated structure. MOSF
By improving characteristics such as ET, a highly reliable and high-performance semiconductor integrated circuit device can be obtained.

That is, before forming the metal film 10 as the gate electrode of the present embodiment, the MO
An SFET is formed, and a titanium silicide film 8 for reducing contact resistance is formed on the surface of a semiconductor region 7 serving as a source and a drain thereof. Further, for example, a PSG film 9 as a first insulating film is formed on the semiconductor substrate 1 by CV.
After the formation using the method D, a heat treatment at about 800 to 900 ° C. is performed to improve properties of the PSG film 9 as an insulating film such as moisture resistance. In this case, as the first insulating film, for the purpose of gettering sodium ions and the like, as the insulating film, in addition to the PSG film 9 which is a silicon oxide film containing phosphorus,
A mode in which a BPSG film which is a silicon oxide film containing phosphorus is used can be employed.

According to the semiconductor integrated circuit device and the method of manufacturing the same according to the present embodiment, when forming the metal film 10 in the gate electrode having a laminated structure, the conductive polycrystalline silicon film 4 in the gate region is formed. In the region where the metal film 10 is disposed, a silicon nitride film 5 as a protective insulating film having the same pattern as that of the first insulating film is formed. In this state, a first insulating film such as a PSG film 9 is formed. rear,
The silicon nitride film 5 as the protective insulating film is removed, and a metal film 10 such as a tungsten film is formed in the region by using a selective CVD method.

Therefore, the conductive polycrystalline silicon film 4
And a gate electrode having a laminated structure composed of the metal film 10 can be formed by an easy and simple manufacturing process.

(Embodiment 2) In the manufacturing process of the semiconductor integrated circuit device having the MOSFET of the above-described Embodiment 1, another embodiment of the manufacturing process of forming the metal film 10 as a gate electrode is shown in FIG. This will be specifically described with reference to FIGS.

As shown in FIG. 10 similar to FIG. 6 used for describing the manufacturing process of the first embodiment, the same manufacturing process as that of the first embodiment described with reference to FIGS. Then, a MOSFET is formed on the semiconductor substrate 1 by using a silicon nitride (PSG) film 9 as a first insulating film, and then a silicon nitride film as a protective insulating film on the polycrystalline silicon film 4 in the gate region. An operation for removing the film 5 is performed.

Next, a thick metal film 10 such as a tungsten film is formed on the polycrystalline silicon film 4 and the PSG film 9 in the gate region by using the CVD method.
An operation of burying the voids on the polycrystalline silicon film 4 with the metal film 10 is performed (FIG. 11). In this case, as the metal film 10, in addition to the tungsten film, a mode in which a high-melting-point metal film such as a titanium film or molybdenum or a metal film such as copper can be used.

Then, the surface layer of the metal film 10 is polished by using a polishing technique such as a CMP method until the surface of the PSG film 9 is exposed, so that the same planar metal film 10 as the PSG film 9 is formed. A pattern of the metal film 10 as a gate electrode is formed by being left on the polycrystalline silicon film 4 (FIG. 12).

Next, using the same manufacturing process as in the first embodiment described with reference to FIGS.
After the insulating film 11 is formed on the
To form Then, after forming the plug 13 in the contact hole 12, the wiring layer 14 is formed on the semiconductor substrate 1. Thereafter, a multilayer wiring layer is formed on the semiconductor substrate 1 as necessary, and then a passivation film is formed thereon, thereby completing the semiconductor integrated circuit device manufacturing process.

According to the above-described semiconductor integrated circuit device of the present embodiment and the method of manufacturing the same, when forming the metal film 10 in the gate electrode having the stacked structure, the conductive polycrystalline silicon film 4 in the gate region is formed. In the region where the metal film 10 is disposed, a silicon nitride film 5 as a protective insulating film having the same pattern as that of the first insulating film is formed. In this state, a first insulating film such as a PSG film 9 is formed. rear,
The silicon nitride film 5 is removed, a metal film 10 such as a tungsten film is formed as a thick film by using a CVD method in the region, and a gap above the polycrystalline silicon film 4 is filled with the metal film 10. After that, the surface layer of the metal film 10 is polished using a polishing technique such as a CMP method until the surface of the PSG film 9 is exposed.
The same planar metal film 10 as the G film 9 is left on the polycrystalline silicon film 4 so that the metal film 1 as a gate electrode is formed.
0 pattern is formed.

Therefore, the conductive polycrystalline silicon film 4
And a gate electrode having a laminated structure composed of the metal film 10 can be formed by an easy and simple manufacturing process.

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the above embodiments, and various modifications may be made without departing from the gist of the invention. Needless to say, it can be changed.

For example, according to the present invention, a semiconductor substrate on which a semiconductor element is formed can be changed to an SOI (Siliconon Insulator) substrate,
And a semiconductor integrated circuit device in which various semiconductor elements such as bipolar transistors are combined, and a method of manufacturing the same.

Further, according to the present invention, a MOSFET, a C
Logic system or SRAM (Static Random Access) having MOSFET, BiCMOSFET, etc. as constituent elements
Memory), DRAM (Dynamic Random Access Memory)
The present invention can be applied to various semiconductor integrated circuit devices having a memory system and the like and a method of manufacturing the same.

[0042]

Advantageous effects obtained by typical ones of the inventions disclosed in the present application will be briefly described.
It is as follows.

(1). According to the semiconductor integrated circuit device and the method of manufacturing the same of the present invention, a gate electrode having a laminated structure of a conductive polycrystalline silicon film and a metal film such as a tungsten film is formed, and before the metal film is formed. In addition, the completion of various high-temperature treatments in the manufacturing process causes a reaction between the conductive polycrystalline silicon film as the gate electrode and the metal film to form metal silicide, thereby lowering the resistance of the gate electrode. Has been prevented.

Therefore, the gate electrode of the present invention is a gate electrode having a laminated structure of a conductive polycrystalline silicon film and a metal film such as a tungsten film. Is not formed, a low-resistance gate electrode can be provided, and a semiconductor integrated circuit device having a high-speed MOSFET can be obtained.

(2). According to the semiconductor integrated circuit device and the method of manufacturing the same of the present invention, before forming a metal film in a gate electrode having a laminated structure, it is necessary to perform various high-temperature treatments to be described later to improve characteristics of MOSFETs and the like. Accordingly, a highly reliable and high-performance semiconductor integrated circuit device can be obtained.

That is, before forming a metal film as a gate electrode of the present invention, a MOS transistor is formed on a substrate such as a semiconductor substrate.
An FET is formed, and a titanium silicide film for reducing a contact resistance is formed on a surface of a semiconductor region serving as a source and a drain thereof. On a substrate such as a semiconductor substrate, for example, a PSG film as a first insulating film is formed by CV.
After the formation using the method D, heat treatment is performed at about 800 to 900 ° C. to improve properties of the PSG film as an insulating film such as moisture resistance. In this case, as the first insulating film, for the purpose of gettering of sodium ions or the like, an oxide film containing phosphorus other than the PSG film which is a silicon oxide film containing phosphorus is used as the insulating film. An embodiment using a BPSG film, which is a silicon film, can be adopted.

(3). According to the semiconductor integrated circuit device and the method of manufacturing the same of the present invention, when forming a metal film in a gate electrode having a stacked structure, the metal film is formed in a region where a metal film is arranged on a conductive polycrystalline silicon film in a gate region. A protective insulating film such as a silicon nitride film having the same pattern is formed. In this state, a first insulating film such as a PSG film is formed, and then a protective insulating film such as a silicon nitride film is formed. And select CV in that area
A metal film such as a tungsten film is formed by using the D method.

In the above-described metal film manufacturing process, a thick metal film such as a tungsten film is formed by a CVD method, and the voids on the polycrystalline silicon film are filled with the metal film. After doing
For example, the surface layer of the metal film is polished using a polishing technique such as a CMP method until the surface of the first insulating film such as a PSG film is exposed, and the same planar shape as the first insulating film is formed. Is left on the polycrystalline silicon film to form a metal film pattern as a gate electrode.

Therefore, a gate electrode having a laminated structure composed of a conductive polycrystalline silicon film and a metal film can be formed by an easy and simple manufacturing process.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a manufacturing process of a semiconductor integrated circuit device having a MOSFET according to an embodiment of the present invention.

FIG. 2 is a sectional view illustrating a manufacturing process of a semiconductor integrated circuit device having a MOSFET according to an embodiment of the present invention.

FIG. 3 is a cross-sectional view illustrating a manufacturing process of a semiconductor integrated circuit device having a MOSFET according to an embodiment of the present invention.

FIG. 4 is a cross-sectional view showing a manufacturing process of the semiconductor integrated circuit device having the MOSFET according to one embodiment of the present invention;

FIG. 5 is a cross-sectional view showing a manufacturing process of the semiconductor integrated circuit device having the MOSFET according to one embodiment of the present invention;

FIG. 6 is a cross-sectional view illustrating a manufacturing process of the semiconductor integrated circuit device having the MOSFET according to the embodiment of the present invention;

FIG. 7 is a cross-sectional view showing a manufacturing step of the semiconductor integrated circuit device having the MOSFET according to one embodiment of the present invention;

FIG. 8 is a cross-sectional view showing a manufacturing step of the semiconductor integrated circuit device having the MOSFET according to the embodiment of the present invention;

FIG. 9 is a cross-sectional view showing a manufacturing process of the semiconductor integrated circuit device having the MOSFET according to one embodiment of the present invention.

FIG. 10 is a MOSFET according to another embodiment of the present invention.
FIG. 14 is a cross-sectional view showing a manufacturing step of a semiconductor integrated circuit device having

FIG. 11 is a MOSFET according to another embodiment of the present invention.
FIG. 14 is a cross-sectional view showing a manufacturing step of a semiconductor integrated circuit device having

FIG. 12 is a MOSFET according to another embodiment of the present invention.
FIG. 14 is a cross-sectional view showing a manufacturing step of a semiconductor integrated circuit device having

[Explanation of symbols]

 Reference Signs List 1 semiconductor substrate (substrate) 2 field insulating film 3 gate insulating film 4 polycrystalline silicon film 5 silicon nitride film (protective insulating film) 6 sidewall spacer (sidewall insulating film) 7 semiconductor region 8 titanium silicide film 9 PSG film 10 metal film DESCRIPTION OF SYMBOLS 11 Insulating film 12 Contact hole (connection hole) 13 Plug 14 Wiring layer

Claims (9)

[Claims] 1. A semiconductor integrated circuit device comprising: a plurality of MOSFETs formed on a substrate; and a silicon oxide film containing phosphorus as a first insulating film on the substrate. In the gate region, a conductive polycrystalline silicon film as a gate electrode and a metal film disposed thereon are formed, and the conductive polycrystalline silicon film and the metal film thereon are formed. A semiconductor integrated circuit device, wherein no metal silicide made of these materials is formed between them. 2. The semiconductor integrated circuit device according to claim 1, wherein a surface of said metal film in a gate region and a surface of said silicon oxide film containing phosphorus are at the same height. Semiconductor integrated circuit device. 3. The semiconductor integrated circuit device according to claim 1, wherein the silicon oxide film containing phosphorus is a PSG film or a BPSG film. 4. The semiconductor integrated circuit device according to claim 1, wherein said metal film in said gate region is made of a metal having a high melting point such as tungsten or titanium or a metal such as aluminum or copper. A semiconductor integrated circuit device comprising a material. 5. After forming a field insulating film in a selective region on the surface of the substrate, a gate insulating film and a conductive polycrystalline silicon film as a gate electrode are formed in a gate region of the MOSFET in an element forming region of the substrate. Forming and then forming a protective insulating film on the polycrystalline silicon film; and forming a sidewall spacer in the gate region, and then forming a semiconductor region to be a source and a drain in an element forming region of the substrate. After depositing a silicon oxide film containing phosphorus on the substrate, using a polishing technique, polishing the silicon oxide film containing phosphorus to the surface of the protective insulating film. A silicon oxide film containing phosphorus
Forming a second-layer insulating film, and after removing the protective insulating film in the gate region, forming a metal film on the conductive polycrystalline silicon film in the region where the protective insulating film was located. Forming a gate electrode having a laminated structure composed of the conductive polycrystalline silicon film and the metal film. 6. The method of manufacturing a semiconductor integrated circuit device according to claim 5, wherein when depositing a silicon oxide film containing phosphorus on said substrate, said silicon oxide containing phosphorus is deposited. A method for manufacturing a semiconductor integrated circuit device, wherein a PSG film or a BPSG film is used as a film. 7. The method for manufacturing a semiconductor integrated circuit device according to claim 5, wherein after depositing a silicon oxide film containing phosphorus on the substrate, 800 to 900.
A method for manufacturing a semiconductor integrated circuit device, comprising: performing a heat treatment at about ° C. 8. The method for manufacturing a semiconductor integrated circuit device according to claim 5, wherein after the protective insulating film in the gate region is removed, the region where the protective insulating film is present. Forming a metal film on the conductive polycrystalline silicon film, and forming the metal electrode as a gate electrode in the step of forming a gate electrode having a laminated structure including the conductive polycrystalline silicon film and the metal film. When forming the film, a step of forming a metal film as a gate electrode on the conductive polycrystalline silicon film using a selective CVD method is used, or a CVD method is performed on the substrate. After depositing a metal film using a polishing technique, the surface layer of the metal film is polished using a polishing technique until the surface of the silicon oxide film containing phosphorus is exposed, and the conductive polycrystalline On silicon film A method of manufacturing a semiconductor integrated circuit device, wherein a metal film as a gate electrode remains. 9. The method for manufacturing a semiconductor integrated circuit device according to claim 5, wherein a gate electrode having a laminated structure including said conductive polycrystalline silicon film and said metal film is formed. A step of forming the metal film as a gate electrode in the forming step, using a metal film made of a material having a high melting point such as tungsten or titanium or a metal such as aluminum or copper. Manufacturing method.