JPH10163178A - Method of removing resist - Google Patents

Method of removing resist

Info

Publication number
JPH10163178A
JPH10163178A JP32506096A JP32506096A JPH10163178A JP H10163178 A JPH10163178 A JP H10163178A JP 32506096 A JP32506096 A JP 32506096A JP 32506096 A JP32506096 A JP 32506096A JP H10163178 A JPH10163178 A JP H10163178A
Authority
JP
Japan
Prior art keywords
ozone
stage
ashing
resist
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP32506096A
Other languages
Japanese (ja)
Inventor
Kotaro Koizumi
浩太郎 小泉
Sukeyoshi Tsunekawa
助芳 恒川
Hiromichi Kawasaki
裕通 川▲崎▼
Kazuo Nojiri
一男 野尻
Shunji Sasabe
俊二 笹部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP32506096A priority Critical patent/JPH10163178A/en
Publication of JPH10163178A publication Critical patent/JPH10163178A/en
Pending legal-status Critical Current

Links

Landscapes

  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Drying Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PROBLEM TO BE SOLVED: To remove the ashing residuum of resist exposed to dry etching by controlling the oxidative reaction by the action of ozone and ozone and ultraviolet rays. SOLUTION: A semiconductor substrate 1 is put on a stage 3 within a treatment chamber 2. A heater 4 for heating is built in the stage 3, and the surface temperature of the stage 32 is controlled by a thermocouple 5 and a temperature adjuster 6. A quartz board 8 is installed opposite to the stage 3, and a nozzle 9 for ozone supply is attached to the quart board 8. There is an ultraviolet ray lamp 10 on the quart board 8, and the ultraviolet rays can be applied optionally to the semiconductor substrate 1. For the ultraviolet ray lamp 10, a low- pressure mercury lamp is used. The ozone is is produced and supplied, with oxygen gas as material, by an ozone generator 11. The quantity of generated ozone is measured by an ozone densitometer 12, and the signal is feedback to an ozone generator 11.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はレジスト除去処理方
法に関する。
The present invention relates to a method for removing a resist.

【0002】[0002]

【従来の技術】個体表面に付着した有機物の除去や被処
理物表面の洗浄処理は、半導体装置の製造,光学部品,
液晶用ガラスの洗浄等に用いられている。例えば、半導
体装置の製造工程ではイオン打ち込みやドライエッチン
グのマスクにレジストが用いられている。レジストは半
導体基板に前述した所望の加工を施した後に除去され
る。
2. Description of the Related Art The removal of organic substances adhered to the surface of an individual and the cleaning of the surface of an object to be processed are performed by manufacturing semiconductor devices, optical components,
It is used for cleaning glass for liquid crystal. For example, in a manufacturing process of a semiconductor device, a resist is used as a mask for ion implantation or dry etching. The resist is removed after performing the above-described desired processing on the semiconductor substrate.

【0003】従来、レジストの除去方法の一つとしてオ
ゾン、あるいはオゾンと紫外線の作用によりアッシング
を行う方法が用いられている。
Conventionally, as one of the resist removing methods, a method of performing ashing by the action of ozone or the action of ozone and ultraviolet rays has been used.

【0004】この種の装置例として日立評論 第73巻
第9号(1991−9)第37頁から第42頁が挙げ
られる。
An example of this type of apparatus is described in Hitachi Review, Vol. 73, No. 9, pp. 37-42 (1991-1-9).

【0005】[0005]

【発明が解決しようとする課題】上記従来技術のレジス
トのアッシング方法は未処理のレジストを除去するのは
容易に可能だが、ドライエッチング処理等に晒されたレ
ジストの除去においてはアッシング後の基板表面に残さ
を残すという問題がある。
Although the above-mentioned prior art resist ashing method can easily remove untreated resist, the removal of the resist exposed to a dry etching process or the like requires removing the substrate surface after ashing. There is a problem of leaving a residue.

【0006】例えば、半導体装置で多層Al系配線等の
層間絶縁膜をドライエッチングしコンタクトホールを形
成する場合、エッチング後にレジストをアッシングする
とコンタクトホール周辺部に残さが残る。この残さの除
去は配線が露出しているため酸類を用いた強力な洗浄を
行うことができない。したがってアッシングによる除去
が必要不可欠である。
For example, in the case where a contact hole is formed by dry-etching an interlayer insulating film such as a multi-layer Al-based wiring in a semiconductor device, ashing remains after etching to leave a residue around the contact hole. Removal of this residue makes it impossible to perform strong cleaning using acids because the wiring is exposed. Therefore, removal by ashing is indispensable.

【0007】残さが残っている場合、次工程でコンタク
ト部の配線形成が正常に行えず断線を起こす等、半導体
装置の信頼性を著しく低下させる。
[0007] If the residue remains, the reliability of the semiconductor device is remarkably deteriorated, for example, the wiring of the contact portion cannot be formed normally in the next step, causing disconnection.

【0008】この残さはエッチング過程で、層間絶縁膜
やAl系配線材がエッチング処理中にスパッタリング現
象等によりマスクであるレジストに付着し、アッシング
過程で酸化変質したものであると考えられる。
This residue is considered to be caused by the interlayer insulating film and the Al-based wiring material adhering to the resist which is a mask during the etching process due to a sputtering phenomenon or the like during the etching process and being oxidized and deteriorated during the ashing process.

【0009】本発明の目的は、ドライエッチング処理に
晒されたレジストのアッシング残さを改善した有機物除
去方法を提供することにある。
It is an object of the present invention to provide a method for removing an organic substance in which ashing residue of a resist exposed to a dry etching process is improved.

【0010】[0010]

【課題を解決するための手段】オゾンやオゾンと紫外線
による有機物の除去はオゾンの強い酸化力により有機物
を分解揮発させるものである。この時、被処理物の温度
を300℃程度まで上げて酸化反応の速度を高め、有機
物の分解を促進させている。
The removal of organic substances by ozone or ozone and ultraviolet rays decomposes and volatilizes organic substances by the strong oxidizing power of ozone. At this time, the temperature of the object is raised to about 300 ° C. to increase the speed of the oxidation reaction, thereby promoting the decomposition of organic substances.

【0011】前述した残さはレジスト表面に付着したエ
ッチング生成物が酸化反応の過程で酸化され残留したも
のと考えられる。このことからオゾンやオゾンと紫外線
の作用による酸化反応を制御すればエッチング生成物の
酸化を抑え、残さを低減することが可能となる。
It is considered that the above-mentioned residue is a residue of the etching product adhering to the resist surface oxidized during the oxidation reaction. From this, if the oxidation reaction by the action of ozone or ozone and ultraviolet rays is controlled, the oxidation of the etching product can be suppressed and the residue can be reduced.

【0012】酸化反応速度を制御する方法には二通りあ
る。すなわち、被処理物の温度を制御する方法と被処理
物表面に供給するオゾンの量を制御する方法である。前
者の場合、被処理物の温度を下げることにより酸化反応
の速度が制限される。これにより、エッチング生成物の
酸化が抑えられエッチング生成物の除去が可能となる。
一方後者の場合、酸化剤であるオゾン量を減らすことに
より酸化反応の速度が制限され、エッチング生成物の酸
化が抑えられエッチング生成物の除去が可能となるので
ある。
There are two ways to control the rate of the oxidation reaction. That is, a method of controlling the temperature of the object to be processed and a method of controlling the amount of ozone supplied to the surface of the object to be processed. In the former case, the rate of the oxidation reaction is limited by lowering the temperature of the object. Thereby, oxidation of the etching product is suppressed, and the etching product can be removed.
In the latter case, on the other hand, the rate of the oxidation reaction is limited by reducing the amount of ozone, which is an oxidizing agent, so that the oxidation of the etching product is suppressed and the etching product can be removed.

【0013】例えば、Al系配線の層間絶縁膜エッチン
グ後のアッシング処理では、基板温度を280℃以下に
してアッシングすれば残さを低減できる。これと同様な
効果は基板温度300℃でオゾン量を80g/Nm3
下にすることにより達成することができる。
For example, in the ashing process after the etching of the interlayer insulating film of the Al-based wiring, the residue can be reduced by ashing at a substrate temperature of 280 ° C. or lower. A similar effect can be achieved by setting the ozone amount to 80 g / Nm 3 or less at a substrate temperature of 300 ° C.

【0014】Al系配線材料にはAlやSi,バリア層
がある場合にはTi等が使われている。層間絶縁膜はS
iの酸化膜が使われている。これらの材料がエッチング
の際にスパッタリング現象等によりレジストの側壁や表
面に付着する。この時これらの元素はレジストやエッチ
ングガス等と反応し、有機化合物状態で付着していると
考えられる。この状態で高温のオゾン雰囲気に晒すと強
力な酸化反応の進行で金属元素は酸化物の状態となり基
板表面に残留してしまう。AlやTi等は酸化物生成エ
ンタルピーの大きさからも分かる様に、金属元素の中で
比較的酸化されやすい元素である。しかしながら温度を
下げてアッシングし、酸化反応速度を調節することによ
り、有機化合物状態のエッチング生成物が熱分解反応等
により分子団状態でリフトオフされていく。これにより
アッシング残さが低減される。一方オゾン量を制御した
場合、オゾン量が制限されているため熱分解反応が先行
するため残さが残留しない。
Al or Si is used as an Al-based wiring material, and Ti or the like is used when a barrier layer is provided. The interlayer insulating film is S
The oxide film of i is used. These materials adhere to the side walls and the surface of the resist due to a sputtering phenomenon or the like during etching. At this time, it is considered that these elements react with the resist, the etching gas, and the like, and are attached in an organic compound state. When exposed to a high-temperature ozone atmosphere in this state, the metal element becomes an oxide state due to the progress of a strong oxidation reaction and remains on the substrate surface. Al, Ti, and the like are relatively easily oxidized among the metal elements, as can be seen from the magnitude of the enthalpy of oxide formation. However, by lowering the temperature and performing ashing to adjust the oxidation reaction rate, the etching product in an organic compound state is lifted off in a molecular group state by a thermal decomposition reaction or the like. Thereby, ashing residue is reduced. On the other hand, when the amount of ozone is controlled, no residue remains because the amount of ozone is limited and the thermal decomposition reaction precedes.

【0015】[0015]

【発明の実施の形態】本発明の実施例を図1及び図3を
用いて説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to FIGS.

【0016】図1は本発明で使用したアッシング装置の
一例を示す。本装置は被処理物表面にオゾンを流すと共
に被処理物を加熱してアッシングを行う装置である。本
装置を用いて半導体装置におけるAl系配線の層間絶縁
膜をエッチングしたあとのアッシング処理を行った例を
説明する。
FIG. 1 shows an example of an ashing apparatus used in the present invention. The present apparatus is an apparatus for performing ashing by flowing ozone to the surface of a processing object and heating the processing object. An example in which an ashing process is performed after etching an interlayer insulating film of an Al-based wiring in a semiconductor device using the present device will be described.

【0017】被処理物である半導体基板1の表面にはド
ライエッチングのマスクとして使用されたレジストがあ
る。この半導体基板1を処理室2内のステージ3に載せ
る。ステージ3内には加熱用ヒータ4が内蔵されており
ステージ表面温度は熱電対5と温調器6により280℃
にコントロールされている。またステージ3には半導体
基板1を真空吸着する機構7がある。半導体基板1はス
テージ3に載せられ真空吸着されることによりステージ
3と同温に制御されることになる。
On the surface of the semiconductor substrate 1, which is the object to be processed, there is a resist used as a mask for dry etching. This semiconductor substrate 1 is placed on the stage 3 in the processing chamber 2. A heating heater 4 is built in the stage 3, and the surface temperature of the stage is 280 ° C. by a thermocouple 5 and a temperature controller 6.
Is controlled by The stage 3 has a mechanism 7 for vacuum-sucking the semiconductor substrate 1. The semiconductor substrate 1 is placed on the stage 3 and vacuum-adsorbed, so that the semiconductor substrate 1 is controlled at the same temperature as the stage 3.

【0018】ステージ3に対向して石英板8が設置され
ており石英板8にはオゾン供給用ノズル9が付けられて
いる。石英板8の上には紫外線ランプ10があり任意に
半導体基板1に紫外線を任意に照射可能なようになって
いる。紫外線ランプ10は低圧水銀ランプを用いた。オ
ゾンは酸素ガスを原料としオゾン発生器11により生成
され供給される。オゾン発生量はオゾン濃度計12によ
り測定されオゾン発生器11にフィードバックされ制御
される。
A quartz plate 8 is provided to face the stage 3, and the quartz plate 8 is provided with an ozone supply nozzle 9. An ultraviolet lamp 10 is provided on the quartz plate 8 so that the semiconductor substrate 1 can be arbitrarily irradiated with ultraviolet light. As the ultraviolet lamp 10, a low-pressure mercury lamp was used. Ozone is generated and supplied by an ozone generator 11 using oxygen gas as a raw material. The ozone generation amount is measured by the ozone concentration meter 12 and fed back to the ozone generator 11 to be controlled.

【0019】処理室2内はダクト13により排気され余
分なオゾンやアッシング反応性生成物は処理室2外に排
出される。
The inside of the processing chamber 2 is evacuated by a duct 13 and excess ozone and ashing reactive products are discharged out of the processing chamber 2.

【0020】半導体基板1を載せたステージ2は対向し
て設置された石英板8に向かって上昇し半導体基板1と
石英板8の間隙を0.3mm に制御し回転する。その後、
オゾンが供給されアッシング処理が開始される。
The stage 2 on which the semiconductor substrate 1 is mounted rises toward the quartz plate 8 placed opposite thereto, and rotates while controlling the gap between the semiconductor substrate 1 and the quartz plate 8 to 0.3 mm. afterwards,
Ozone is supplied and the ashing process is started.

【0021】Al系配線間の層間絶縁膜にドライエッチ
ングによりコンタクトホールを形成し、半導体基板をア
ッシングした場合の残さ数を走査電子顕微鏡(SEM)
を用いてカウントした結果を図2に示す。縦軸は残さ数
を示し、残さ数は1コンタクトホール当たりの数で大き
さは0.01μm 以上とした場合を示した。横軸にはア
ッシング時の半導体基板温度を示した。白丸は紫外線照
射有り、黒丸は紫外線照射なしを示している。同図から
明らかなように半導体基板の温度が280℃以下で残さ
数が減少し270以下では全く見られなくなった。
A contact hole is formed in the interlayer insulating film between the Al-based wirings by dry etching, and the number of residues when the semiconductor substrate is ashed is measured by a scanning electron microscope (SEM).
FIG. 2 shows the results of counting by using. The vertical axis indicates the number of residues, and the number of residues is the number per contact hole and the size is 0.01 μm or more. The horizontal axis shows the semiconductor substrate temperature during ashing. Open circles indicate that ultraviolet irradiation was performed, and black circles indicate that no ultraviolet irradiation was performed. As is clear from the figure, when the temperature of the semiconductor substrate is 280 ° C. or lower, the number of residues decreases, and when the temperature is 270 or lower, no residue is observed.

【0022】図3には同様にオゾン濃度と残さ数の関係
を示す。縦軸は残さ数、横軸は原料酸素流量20L/mi
n中に発生させたオゾン量を示した。残さ数は80g/
Nm3以下から減少し、70g/Nm3 以下では全く見
られない。
FIG. 3 similarly shows the relationship between the ozone concentration and the number of residues. The vertical axis is the number of residues, and the horizontal axis is the raw material oxygen flow rate 20 L / mi.
The amount of ozone generated in n is shown. 80g /
It decreased from Nm 3 or less, not seen at all in 70g / Nm 3 or less.

【0023】[0023]

【発明の効果】本発明を用いれば、ドライエッチング処
理に晒されたレジストをオゾンまたはオゾンと紫外線の
作用により残さを残さずに除去が可能である。また、こ
れにより半導体装置の信頼性が大幅に向上する。
According to the present invention, the resist exposed to the dry etching treatment can be removed without leaving any residue by the action of ozone or ozone and ultraviolet rays. This also significantly improves the reliability of the semiconductor device.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明を実施した有機物除去装置の説明図。FIG. 1 is an explanatory view of an organic matter removing device embodying the present invention.

【図2】本発明の一実施例による残さ数と半導体基板温
度の相関を示す測定図。
FIG. 2 is a measurement diagram showing a correlation between the number of residues and a semiconductor substrate temperature according to one embodiment of the present invention.

【図3】本発明の一実施例による残さ数とオゾン濃度の
相関を示す測定図。
FIG. 3 is a measurement diagram showing the correlation between the number of residues and the ozone concentration according to one embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1…半導体基板、2…処理室、3…ステージ、4…ヒー
タ、5…熱電対、6…温調器、7…真空吸着機構、8…
石英板、9…オゾン供給ノズル、10…紫外線ランプ、
11…オゾン発生器、12…オゾン濃度計、13…ダク
ト、14…オゾン配管。
DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate, 2 ... Processing room, 3 ... Stage, 4 ... Heater, 5 ... Thermocouple, 6 ... Temperature controller, 7 ... Vacuum suction mechanism, 8 ...
Quartz plate, 9 ozone supply nozzle, 10 ultraviolet lamp,
11 ozone generator, 12 ozone concentration meter, 13 duct, 14 ozone pipe.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 野尻 一男 茨城県ひたちなか市市毛882番地 株式会 社日立製作所計測器事業部内 (72)発明者 笹部 俊二 東京都小平市上水本町五丁目20番1号 株 式会社日立製作所半導体事業部内 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Kazuo Nojiri, 882 Ma, Hitachinaka-shi, Ibaraki, Japan Measurement Instruments Division, Hitachi, Ltd. (72) Shunji Sasabe 5-2-1, Josuihoncho, Kodaira-shi, Tokyo No.In the semiconductor division of Hitachi, Ltd.

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】ドライエッチング処理に晒されたレジスト
を、オゾンまたはオゾンと紫外線の作用により剥離する
アッシング方法において、被処理物の温度を任意の温度
以下に制御しアッシングを行うことを特徴とするレジス
トの除去方法。
An ashing method for stripping a resist exposed to a dry etching treatment by the action of ozone or ozone and ultraviolet rays, wherein the ashing is performed by controlling the temperature of an object to be processed to an arbitrary temperature or lower. How to remove resist.
【請求項2】請求項1において、上記ドライエッチング
処理は半導体装置の製造工程におけるAl系配線間の層
間絶縁膜エッチングであるレジストの除去方法。
2. A method for removing a resist according to claim 1, wherein said dry etching is etching of an interlayer insulating film between Al-based wirings in a semiconductor device manufacturing process.
【請求項3】請求項1または2において、上記被処理物
の温度を280℃以下に制御するレジスト除去方法。
3. The method according to claim 1, wherein the temperature of the object is controlled at 280 ° C. or lower.
【請求項4】請求項1,2または3において、上記被処
理物の表面に供給するオゾン量を任意の量に制御しアッ
シングを行うレジストの除去方法。
4. A method for removing a resist according to claim 1, wherein the amount of ozone supplied to the surface of the object is controlled to an arbitrary amount and ashing is performed.
【請求項5】請求項4において、上記被処理物の表面に
供給するオゾン量を原料ガスの4vol% 以下に制御する
レジスト除去方法。
5. The method according to claim 4, wherein the amount of ozone supplied to the surface of the object is controlled to 4 vol% or less of the raw material gas.
JP32506096A 1996-12-05 1996-12-05 Method of removing resist Pending JPH10163178A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP32506096A JPH10163178A (en) 1996-12-05 1996-12-05 Method of removing resist

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP32506096A JPH10163178A (en) 1996-12-05 1996-12-05 Method of removing resist

Publications (1)

Publication Number Publication Date
JPH10163178A true JPH10163178A (en) 1998-06-19

Family

ID=18172713

Family Applications (1)

Application Number Title Priority Date Filing Date
JP32506096A Pending JPH10163178A (en) 1996-12-05 1996-12-05 Method of removing resist

Country Status (1)

Country Link
JP (1) JPH10163178A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6664184B2 (en) 2001-06-18 2003-12-16 Hitachi, Ltd. Method for manufacturing semiconductor device having an etching treatment
KR100621788B1 (en) 2005-04-01 2006-09-19 두산디앤디 주식회사 Ozone asher apparatus
US8679732B2 (en) 2009-06-24 2014-03-25 HGST Netherlands B.V. Method for removing resist and for producing a magnetic recording medium, and systems thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6664184B2 (en) 2001-06-18 2003-12-16 Hitachi, Ltd. Method for manufacturing semiconductor device having an etching treatment
KR100621788B1 (en) 2005-04-01 2006-09-19 두산디앤디 주식회사 Ozone asher apparatus
US8679732B2 (en) 2009-06-24 2014-03-25 HGST Netherlands B.V. Method for removing resist and for producing a magnetic recording medium, and systems thereof

Similar Documents

Publication Publication Date Title
JPH1116866A (en) Method and equipment for cleaning silicon
JPH0878372A (en) Organic matter removing method and its apparatus
JPH0691014B2 (en) Semiconductor device manufacturing equipment
JP2540583B2 (en) Substrate cleaning method and apparatus
JPH10163178A (en) Method of removing resist
JP2001507515A (en) Laser removal of foreign matter from the surface
JPH11111695A (en) Method of forming platinum thin-film pattern and method of manufacturing semiconductor device
JP2613803B2 (en) Copper thin film etching method
JPS6049630A (en) Manufacture of semiconductor device
JPS58101429A (en) Dry etching method
JP3439580B2 (en) Method and apparatus for forming silicon oxide film
JPS61160939A (en) Method of dry removal of si surface damage after dry etching
JPH0738380B2 (en) Surface treatment method
JP2623672B2 (en) Etching method
JPS6191930A (en) Cleaning method of semiconductor substrate
JPH03155621A (en) Dry etching method
JPH0927473A (en) Resist removing method and apparatus
JPH11224872A (en) Surface treatment method for silicon
JPH0611038B2 (en) Surface treatment method
JP2892049B2 (en) Resist ashing method
JPH10209132A (en) Eliminating method of organic matter
JP3657879B2 (en) Cleaning method for baking equipment
JPH042123A (en) Surface treatment
JPH0793284B2 (en) Method for manufacturing semiconductor element
JPS61290712A (en) Manufacture of amorphous semiconductor film