JPH10163130A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make smooth the interface of a Co silicide film, by providing a Ga injection layer having an impurity concn. peak at a shallower position than the interface between a CoSi2 layer and constituent Si of a semiconductor substrate, and forming impurity regions in lower portions of the Ge layer. SOLUTION: A Ge injection layer 4 formed on the cleaned surface of a semiconductor substrate 1 has a peak at a deeper position than that of an initial Co silicide layer formed later, and is adjusted so that the peak locates approximately on or above the interface between a finally formed Co silicide layer 5 and constituent Si of the substrate 1. A Co film 6 is formed and reacted with the Si of the substrate 1 at impurity regions to form a first Co silicide film 5a, which is then heat treated to finally obtain a second CoSi2 film 5a. Thus, this film 5a is made smooth on the semiconductor substrate 1 surface.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor device having cobalt silicide as a component and a method of manufacturing the semiconductor device, and more particularly to a cobalt silicide process.

[0002]

2. Description of the Related Art Logic devices such as microprocessors are required to operate at high integration and at high speed. The salicide process is a process in which an impurity region (impurity diffusion region or impurity implantation region) such as a source / drain region of a transistor and a polysilicon layer or an amorphous silicon layer such as a gate electrode are selectively silicided to reduce resistance. This is a process suitable for a highly integrated semiconductor device because a plate-making process is not required and the plate can be formed in a self-aligned manner.

Conventionally, titanium has been generally used as a metal used for salicide. However, when it is used for a wiring part of quarter micron or less, an increase in wiring resistance,
The occurrence of a short circuit between the gate electrode and the source / drain region, and the gate caused by "overgrowth" in which metal silicide grows on the side wall of the insulating film formed on the side section of the gate electrode. There have been problems such as occurrence of short-circuit failure between the electrode and the source / drain region.

[0004] In recent years, it has become clear that these problems can be solved by using cobalt instead of titanium, and a salicide process using cobalt has been used. However, in the case of using cobalt, there was no problem in the salicide process using titanium, but the unevenness of the interface between the silicide film and the silicon substrate became large. A problem occurred.

Next, a conventional salicide process using cobalt will be described in the order of steps. First,
As shown in FIG. 5A, the surface of the semiconductor substrate 101 is L
An element isolation insulating film 102 having a thickness of about 500 nm is formed by an OCOS (local oxidation of silicon) method or the like.
100keV, 1E14-1E16cm ^-2 or BF ₂
Impurity ions are implanted under the conditions of 25 to 50 keV and 1E14 to 1E16 cm ⁻² to obtain the impurity region 1.
03 is formed.

Next, as shown in FIG. 5B, Co (cobalt) is deposited on the surface of the semiconductor device shown in FIG.
The film 104 is stacked.

Then, as shown in FIG. 5C, annealing is performed at a first temperature of 350 to 500 ° C. for 60 seconds to form a first cobalt silicide film 105 on the surface of the active region. At this time, the thickness of the first cobalt silicide film 105 is about twice the thickness of the Co film 104, and the impurity region 103 is present below the first cobalt silicide film 105. I have.

Next, as shown in FIG. 5 (d), unreacted C is reacted with a chemical such as a mixed solution of sulfuric acid and hydrogen peroxide solution.
o The film 104 is dissolved and removed. After that, as shown in FIG.
Heat treatment for 0 second to form the first cobalt silicide film 1
05 is a second cobalt silicide film (CoSi ₂ ) 10
Change to 6. This second cobalt silicide film 10
6 is about 3.5 times the thickness of the Co film 104.

When the second cobalt silicide film 106 is formed, the interface between the semiconductor substrate 101 made of silicon and the second cobalt silicide film 106 becomes non-uniform, and the unevenness is large, that is, the second cobalt silicide film 106 When a portion of the semiconductor layer 101 has an extremely large film thickness, the second cobalt silicide film 106 reaches the PN junction between the impurity region 103 and the semiconductor substrate 101, and the junction leaks at this portion. There is a problem that the current increases.

When the second cobalt silicide film 106 is formed, a locally thick portion is formed because the silicon substrate used in the semiconductor device is (10
0) Although an oriented substrate is used, CoSi ₂ has a lower interface energy with the (111) plane than the (100) plane of the silicon substrate, so that an interface where the silicon (111) plane and CoSi ₂ are in contact appears. It is considered.

Another conventional technique is disclosed in Japanese Patent Application Laid-Open No. 8-78.
No. 360 discloses an example of a method for manufacturing a semiconductor device using a salicide process. According to this method, first, a SiGe film is selectively patterned on a portion requiring wiring (on the element isolation insulating film), and then, a cobalt film is laminated to a predetermined thickness on the entire surface and heat treatment is performed. As a result, a salicide is formed on the source / drain region and the gate electrode of the metal oxide semiconductor (MOS) transistor, and a low resistance which can be used as a wiring in a portion where the SiGe film on the element isolation insulating film is patterned is used. It has been shown that a highly conductive material can be formed.

However, even when the above-described method is used, the salicide formed on the source / drain region and the gate electrode is converted into metal silicide by reacting silicon and cobalt by a heat treatment.
As in the case shown in (e), the thickness of the formed cobalt silicide locally increases, and a junction leak current occurs when the thickness reaches the PN junction between the impurity region and the semiconductor substrate. It does not solve the problem of doing.

[0013]

According to the present invention, in a salicide process using cobalt, the formed cobalt silicide locally has a large thickness,
This is to solve the problem that a junction leak current occurs when a PN junction is reached.
An object of the present invention is to form a cobalt silicide film having a smooth interface shape, and an object of the present invention is to provide a method for manufacturing a semiconductor device having good device characteristics.

[0014]

A semiconductor device according to the present invention has a CoSi ₂ layer formed on a surface of a semiconductor substrate, and a same or shallower position as an interface between the CoSi ₂ layer and Si constituting the semiconductor substrate. Ge (germanium)
Ge implantation layer having an impurity concentration peak includes an impurity region formed in the lower portion of the Ge injection layer, the CoSi ₂
The surface where the layer and the Ge injection layer are joined is smooth, and the C
The oSi ₂ layer is characterized by being separated from the bonding surface between the semiconductor substrate and the impurity region, that is, not in contact with the bonding surface.

Further, according to the present invention, there is provided a semiconductor device comprising: an impurity region formed from one main surface of a semiconductor substrate to a predetermined depth; a Ge film laminated on the impurity region;
comprises CoSi ₂ film laminated on e film, the CoSi ₂
The film is separated from a PN junction surface between the semiconductor substrate and the impurity region.

Further, in the semiconductor device according to the present invention, a gate electrode laminated on a region to be a channel region of the semiconductor substrate via a gate insulating film, a source / drain region formed with the channel region interposed therebetween, Co formed on the surface of the gate electrode and the source / drain regions
Si ₂ layer comprises a MOS transistor including a Ge injection layer having a Ge impurity concentration peaks same or shallower than the position and the interface with the Si constituting the CoSi ₂ layer and the semiconductor substrate, the CoSi ₂ layer and the Ge implantation The surface where the layers are joined is smooth, and at least the CoSi ₂ layer is separated from the PN junction surface between the semiconductor substrate and the source / drain regions.

Further, according to the semiconductor device of the present invention, there is provided a semiconductor substrate, comprising: a gate electrode laminated on a region to be a channel region via a gate insulating film; a source / drain region formed by sandwiching the channel region; A Ge film stacked on the gate electrode and the source / drain regions, and a MOS transistor including a CoSi ₂ film stacked on the Ge film, wherein the CoSi ₂ film is in contact with the Ge film, _{The two} films are separated from a PN junction surface between the semiconductor substrate and the source / drain region.

A method for manufacturing a semiconductor device according to the present invention comprises:
Forming an impurity region from one main surface of the semiconductor substrate to a predetermined depth; Ge implantation having a peak at a position less than the predetermined depth from the one main surface of the semiconductor substrate in a region where the impurity region is formed; A step of forming a layer, a step of laminating a Co film on the semiconductor substrate to a predetermined thickness, a heat treatment at a first temperature to react the Co film with the semiconductor substrate, and from the surface of the semiconductor substrate Forming a first cobalt silicide film thinner than the depth of the Ge injection layer up to the peak position, removing unreacted Co from the Co film after forming the first cobalt silicide film; And a step of performing a heat treatment at a second temperature to change the first cobalt silicide film into a second cobalt silicide film having a different composition. The peak of the Ge implanted layer is located at the same or shallower position as the interface between the baltic silicide film and Si constituting the semiconductor substrate, and the second cobalt silicide film is formed between the semiconductor substrate and the impurity region. It is characterized by being separated from the PN junction surface.

Further, in the method of manufacturing a semiconductor device according to the present invention, a step of forming an impurity region from one main surface of the semiconductor substrate to a predetermined depth is performed, and the one main surface of the semiconductor substrate in a region where the impurity region is formed. Forming a Ge film with a predetermined thickness on the Ge film, laminating a Si (silicon) film with a predetermined thickness on at least the Ge film, and laminating a Co film with a predetermined thickness on the Si film A step of performing a heat treatment at a first temperature to cause the Co film and the Si film to react to form a first cobalt silicide film having a thickness smaller than or equal to the Si film; After the formation of the cobalt silicide film, a step of removing unreacted Co is performed, and a heat treatment is performed at a second temperature to convert the first cobalt silicide film into a second cobalt silicide having a different composition. The method includes a step of changing to a side film, wherein the entire Si film is consumed during the formation of the second cobalt silicide film, and the second cobalt silicide film is removed from a PN junction surface between the semiconductor substrate and the impurity region. It is characterized by being separated.

In the method of manufacturing a semiconductor device according to the present invention, a step of forming a gate electrode via a gate insulating film on a region to be a channel region of a MOS transistor on a semiconductor substrate; Forming a sidewall made of a material, forming a Ge injection layer having a peak at a position less than a predetermined depth from at least one main surface of the semiconductor substrate to be a source / drain region of the MOS transistor and an upper surface of the gate electrode; Process,
At least over the region where the MOS transistor is formed, Co
A step of laminating a film to a predetermined thickness, a heat treatment under a first temperature to cause a reaction between the Co film and the semiconductor substrate located in a region to be the conductive wiring and the source / drain region, Forming a first cobalt silicide film having a thickness smaller than the depth between the peak positions of the Ge injection layer from the surface, and after forming the first cobalt silicide film of the Co film, the first cobalt silicide film is left unreacted. C
o, a step of performing a heat treatment at a second temperature to change the first cobalt silicide film into a second cobalt silicide film having a different composition, and the second cobalt silicide film The peak of the Ge injection layer is located at the same or shallower position as the interface with Si constituting the semiconductor substrate, and the second cobalt silicide film is separated from the PN junction surface between the semiconductor substrate and the impurity region. It is characterized by doing.

Further, in the method of manufacturing a semiconductor device according to the present invention, a step of forming a gate electrode via a gate insulating film on a region to be a channel region of a MOS transistor on a semiconductor substrate; Forming a side wall made of the semiconductor substrate;
Forming a Ge film on one main surface serving as a source / drain region of the OS transistor and on the upper surface of the gate electrode; laminating a Si film on the Ge film;
A step of laminating a Co film to an arbitrary thickness on the formation region of the OS transistor, a heat treatment is performed at a first temperature, and the Co film reacts with the Si film to form a first film having a thickness smaller than the Si film; Forming a cobalt silicide film of the above, after the formation of the first cobalt silicide film of the Co film, a step of removing Co left unreacted, a heat treatment at a second temperature and the first A step of changing the cobalt silicide film into a second cobalt silicide film having a different composition, wherein the Si film is completely consumed during the formation of the second cobalt silicide film, and the second cobalt silicide film is formed of the semiconductor The semiconductor device is characterized by being separated from a PN junction surface between the substrate and the impurity region.

In the method of manufacturing a semiconductor device including the step of forming the Ge injection layer, the surface of the semiconductor substrate is etched and cleaned before the Ge injection step for forming the Ge injection layer. Steps shall be included.

Further, in the method of manufacturing a semiconductor device as described above, the first temperature is adjusted to 350 to 550 ° C., and the second temperature is adjusted to 700 to 900 ° C.

In the method of manufacturing a semiconductor device as described above, the first cobalt silicide film is made of a material in which one or both of CoSi and Co ₂ Si are mixed, and the second cobalt silicide film is made of Co
It is made of Si ₂ .

[0025]

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiment 1 FIG. Next, a method of manufacturing a semiconductor device in which cobalt salicide formed on the surface of a semiconductor substrate according to the first embodiment of the present invention has a smooth shape at the interface with the semiconductor substrate and does not generate a junction leak current will be described. .

FIG. 1A is a sectional view showing a case where a cobalt silicide film is formed in one active region of a semiconductor device according to the first embodiment of the present invention. In the figure, 1 is a semiconductor substrate made of single crystal silicon, 2 is an element isolation insulating film made of a silicon oxide film formed by a LOCOS isolation method, and 3 is impurity ion implantation or diffusion into a region to be an active region on the surface of the semiconductor substrate 1. The impurity region 4 formed by the above process is a Ge implanted layer formed by implanting impurity Ge into the impurity region 3, and 5 is a cobalt silicide film formed on the surface of the impurity region. The joining surface is in a smooth state.

A method of forming the sectional structure shown in FIG. 1A will be described in the order of steps. First, as shown in FIG. 1B, the semiconductor substrate 1 is selectively oxidized (LOCO
(S oxidation), an element isolation insulating film 2 made of a silicon oxide film having a thickness of about 500 nm is formed. Next, ion implantation is performed, for example, As is implanted under the conditions of several tens keV and 1E14 to 1E16 cm ⁻² , and a heat treatment is performed to thereby form the impurity region 3.
To form

Next, the surface of the semiconductor substrate 1 is made of CF ₄ , C ₂ F
The silicon of the outermost surface is removed by plasma of a gas containing a ₆ fluorocarbon and oxygen, for cleaning. The Si layer on the outermost surface of the semiconductor substrate 1 is often contaminated by oxygen or carbon. When oxygen or carbon enters Si by Ge ion implantation, these contaminants are incorporated into CoSi ₂ during a silicidation reaction of Co. The resistance of the CoSi ₂ film may increase, but this problem can be solved by removing Si on the outermost surface.

Thereafter, Ge is implanted by ion implantation under the conditions of, for example, several tens of keV and 1E15 to 1E17 cm ⁻² to form the Ge implanted layer 4. The Ge implantation layer 4 formed at this stage has a peak at a position deeper than the first cobalt silicide layer to be formed later, and the peak is between the cobalt silicide layer 5 to be finally formed and Si forming the semiconductor substrate 1. Is formed so as to be substantially the same as or shallower than the interface.

Next, as shown in FIG. 1C, a silicon oxide film formed by natural oxidation of the surface of the semiconductor substrate 1 was removed by performing a treatment with an HF solution or HF vapor or a sputter etching treatment. Thereafter, a Co film 6 is formed to a thickness of 5 to 15 nm by a sputtering method or a CVD (chemical vapor deposition) method.

Thereafter, as shown in FIG. 1D, a heat treatment is performed at a first temperature of 350 to 550 ° C. for about 60 seconds to remove the silicon and the Co film 6 of the semiconductor substrate 1 in the impurity region. The reaction is performed to form a (first) cobalt silicide film 5a. The (first) cobalt silicide film 5a formed at this time is made of a material composed of one or both of CoSi and Co ₂ Si,
The film thickness is about twice as large as the film thickness of the Co film 6 laminated earlier. The Ge implantation energy and the thickness of the Co film are adjusted so that the peak position of the Ge implantation layer is deeper than the interface between the (first) cobalt silicide 5a and Si of the semiconductor substrate 1.

Next, as shown in FIG. 1 (e), C remaining in an unreacted state even after the heat treatment at the first temperature is performed.
The o film 6 is dissolved and removed by using a chemical, for example, a mixed solution of sulfuric acid and hydrogen peroxide solution. Thereafter, a heat treatment is performed at a second temperature of 700 to 900 ° C. for, for example, about 10 to 60 seconds to obtain a (second) cobalt silicide film 5 to be finally formed.

The finally formed (second) cobalt silicide film 5 is made of CoSi ₂ , and its thickness is about 3.5 times the thickness of the Co film 6 to be laminated. I have. In the heat treatment step at the second temperature,
Since the Co film 6 reacts selectively with Si over Ge,
In the e-injection layer, the silicide reaction rate becomes relatively slow.

Here, the formation position (depth) of the Ge injection layer 4
Is set to about the thickness of the (second) cobalt silicide film 5 to be finally formed, so that the reaction rate of the (second) cobalt silicide film 5 becomes slower when the depth becomes about the depth of the Ge implantation layer 4. Then, the cobalt silicidation reaction progresses almost to the vicinity of the peak of the Ge impurity concentration of the Ge injection layer 4 or to a depth between the peak and the bottom surface of the Ge injection layer, and the reaction stops, and the film thickness becomes uniform. That is, there is an effect of preventing the film thickness from becoming non-uniform, the Si interface where the (second) cobalt silicide film 5 and the Ge implantation layer 4 are formed becomes flat, and the (second) cobalt silicide film 5 is entirely As
It is formed on the surface of the semiconductor substrate 1 in a smooth state. Therefore, the Ge injection layer 4 shown in FIG.
In the second step, the cobalt silicidation reaction when forming the (second) cobalt silicide film 5 is deeper than the position of the Ge impurity peak, and the Ge injection layer 4 is formed. In the case where it extends to a position shallower than the lower surface of Ge,
The injection layer 4 is shown in the figure as indicating only a portion which has not been affected by the cobalt silicidation reaction.

By the above steps, the (second) cobalt silicide film 5 having a smooth junction can be formed.
A semiconductor device having a structure as shown in FIG. MOS transistors are built on the semiconductor substrate,
In the present invention, the (second) cobalt silicide film 5 formed on the impurity region is characterized in that the bonding surface can be formed smoothly, and thus the description thereof is omitted.

In the salicide process as described above, the Ge implantation layer 4 is adjusted so that its peak is formed at a position deeper than the formation position of the (first) cobalt silicide film 5a formed by the first heat treatment. Formed in contact with the silicon film of the semiconductor substrate 1
Almost all are silicided. That is, when the (first) cobalt silicide film 5a is formed, the Ge injection layer 4 has no influence on the silicide reaction.
Therefore, the thickness of the (first) cobalt silicide film 5a is determined with good controllability by the thickness of the Co film 6 to be stacked first. Also, (second) cobalt silicide film 5
Is thicker than the (first) cobalt silicide film 5a, and can set the peak position of the Ge injection layer for the above purpose.

As described above, according to the present invention,
The (second) cobalt silicide film 5 (C
It is possible to form a film having a smooth interface between oSi ₂ ) and silicon constituting the semiconductor substrate 1 with good controllability. As a result, it is possible to suppress the increase in junction leak current while maintaining a desired thickness of cobalt silicide. It is possible to obtain a film. Therefore, according to the present invention, even when a cobalt silicide film is formed on a shallow junction, a cobalt silicide film having a uniform thickness can be formed, and a highly integrated semiconductor device can be formed. There is.

Further, as shown in FIG. 1A, the peak of the Ge implantation layer 4 is substantially the same or shallower than the interface between the (second) cobalt silicide film 5 and the semiconductor substrate 1 (impurity diffusion region 3). (Second) cobalt silicide film 5
Since Ge reacts selectively with Si during the silicide reaction during formation, Ge segregates at the interface with the semiconductor substrate 1 so as to be left behind during this reaction, and as a result, Si having a high Ge concentration
A Ge alloy is formed. Since Ge has a narrower band gap than Si, the band gap at the interface of the SiGe alloy layer becomes narrower as the Ge concentration becomes higher than that of Si.
As a result, the barrier between the CoSi ₂ layer and Si is lowered, and the contact resistance is reduced. When the contact resistance decreases, the drain current of the transistor increases, the driving capability improves, and the operation speed of the semiconductor device can be increased.

Note that a MOSFET (me
tal oxide semiconductor field effect transistor)
It is needless to say that the method can be applied to the case where cobalt silicide is formed in the source / drain region of the MOSFET. Further, in the above description, the semiconductor substrate 1 is described as being made of single-crystal silicon. However, for example, when a SOI (silicon on insulator) substrate is used, a smooth joint surface is similarly formed (second 3.) The cobalt silicide film 5 can be formed, and a semiconductor device having the same effect can be formed.

In the first embodiment, the impurity region 3 is described as being formed directly on the semiconductor substrate 1. However, a well of the conductivity type opposite to the conductivity type of the impurity region 3 is formed in the semiconductor substrate 1. It is needless to say that it is common sense to form the impurity region 3 in the well.

Embodiment 2 Next, a second embodiment of the present invention will be described. In the first embodiment described above, the Ge injection layer 4 is replaced with G in the salicide process.
In this embodiment, a difference is that the Ge film 8 is stacked on the surface of the semiconductor substrate 1. FIG. 2A is a cross-sectional view of the finally obtained semiconductor device at the end of the salicide process, and a cobalt silicide film 7 is stacked on one main surface of the semiconductor substrate 1 with a Ge film 8 interposed therebetween. It has a structure.

Next, the salicide process according to the present invention will be described in the order of steps. First, similarly to the case described in the first embodiment, the element isolation insulating film 2 is formed on a predetermined region on the surface of the semiconductor substrate 1 by a predetermined thickness, for example, 500 n.
An impurity region 3 is formed by an impurity ion implantation method or the like.

Thereafter, as shown in FIG. 2B, for example, the raw material is GeH _4, and is selectively deposited on the semiconductor substrate 1 by thermal CVD under the conditions of a temperature of 500 to 600 ° C. and a pressure of 0.1 to 1 Torr. Ge film 8 is 10 to 15 n
The layers are laminated so as to have a thickness of m. Thereafter, a Si film 9 is formed using SiH ₄ as a raw material by a similar thermal CVD method. The thickness of the Si film 9 is larger than the thickness of the (first) cobalt silicide film 5a in FIG. 1D of the first embodiment, and the thickness of the (second) cobalt silicide film 5 in FIG. The thickness is adjusted to be approximately the same as or less than.

Next, FIG. 1 shown in Embodiment 1
When the processes (c) to (e) are performed in the same manner and finally the heat treatment at the second temperature is completed, the state shown in FIG. Ge laminated on
The cobalt silicide film (CoSi ₂ ) 7 is laminated on the film 8 to a predetermined thickness.

In the second embodiment, Ge film 8 functions in the same manner as Ge implantation layer 4 of the first embodiment, and cobalt consumes Si film 9 during heat treatment for forming cobalt silicide film 7. When the entire Si film 9 is consumed by the silicide reaction, the Ge film 8 on the bottom surface of the Si film 9 and the vicinity thereof are suppressed, and as a result, the cobalt silicide film 7
Are arranged at a position shallower than the position where the Ge film 8 is formed, and the bottom surface thereof is formed in a smooth state.

According to this embodiment, since the Ge film 8 and the Si film 9 are laminated on the semiconductor substrate 1, even if the cobalt silicide film 7 is finally formed, the Si film on the surface of the semiconductor substrate 1 It is possible to suppress consumption,
As a result, even in a semiconductor device having a shallower junction, there is an effect that the junction is not broken.

Note that instead of using pure Ge as the Ge film 8, thermal CVD using GeH ₄ and SiH ₄ as raw materials is used.
The same effect can be obtained by forming a GeSi alloy by the method. It is also effective to prevent the formation of a natural oxide film or the like by forming the Si film 9 before forming the Co film and performing these two films continuously in vacuum.

Embodiment 3 Next, a method of manufacturing a MOS transistor using the cobalt silicide process according to the first embodiment of the present invention will be described in the order of steps. The structure finally obtained is a MOS transistor as shown in FIG.
Is a gate insulating film, 11 is a gate electrode, 13 is a side wall formed by adhering to a side section of the gate electrode 11, 1
5 is a source / drain region comprising a low-concentration impurity region 12 and a high-concentration impurity region 14, 16 is a Ge implantation layer formed by ion implantation in the gate electrode 11 and the source / drain region 15, and 18 is a gate electrode 11 and a source. /
The cobalt silicide films formed on the surface of the drain region 15 are shown.

In the semiconductor device thus formed, a cobalt silicide film CoSi ₂ film is laminated on the source / drain regions and the surface of the gate electrode, and the bottom surface of the cobalt silicide film is smooth. As for the cobalt silicide film on the source / drain region, the cobalt silicide film is not in contact with the boundary between the source / drain region and bulk silicon (or the well if the source / drain region is formed on the well). It has the characteristic of being in a state.

Next, a method for manufacturing the above-described semiconductor device will be described. Here, NMOS of salicide structure
A method for manufacturing the transistor will be described using a transistor as an example. First, as shown in FIG. 3B, the element isolation insulating film 2 is formed by selectively performing LOCOS oxidation on a predetermined region of the semiconductor substrate 1. Then, FIG.
As shown in (c), a silicon oxide film 10a serving as a gate insulating film is formed to a thickness of about 5 to 10 nm by, for example, thermally oxidizing the exposed surface of the semiconductor substrate 1.

Thereafter, as shown in FIG.
For example, 200 to 5
A polysilicon film 11a having a thickness of about 00 nm is laminated. Next, as shown in FIG. 3 (e), the dimension in the gate length direction is set to 0.1 to over the region where the gate electrode is to be formed.
A resist pattern of about 0.5 μm is formed, and the polysilicon film 11a is anisotropically etched using the resist pattern as a mask to obtain a gate electrode 11 having a predetermined size.

Further, for example, an impurity As (arsenic) is implanted into at least a region where a source / drain region is to be formed, that is, a region sandwiching the gate electrode 11, and a low concentration impurity is selectively formed on the surface of the semiconductor substrate 1. A region 12 is formed.

Thereafter, as shown in FIG. 3F, a side wall 13 made of an insulating film is formed on a side section of the gate electrode 11.
To form Further, high-concentration impurity regions 14 are formed by implanting As as impurities. At this stage, a source / drain region 15 including the low concentration impurity region 12 and the high concentration impurity region 14 can be formed.

Although the low-concentration impurity region 12 and the high-concentration impurity region 14 are formed at the same depth here as an example, the low-concentration impurity region 12 can be formed to be shallower.

Next, as shown in FIG. 3 (g), Ge is, for example, several tens keV, 1E15 to 1E by ion implantation.
By implanting under the condition of 17 cm ⁻² , the Ge implantation layer 16 is formed at a position between the upper surface and the bottom surface of each of the source / drain region 15 and the gate electrode 11. This Ge
The implantation layer 16 is formed at a position at a predetermined depth from the surfaces of the gate electrode 11 and the source / drain regions 15 and is arranged at a position that does not hinder the formation of a cobalt silicide film 18a to be formed later.

Next, as shown in FIG. 3 (h), a Co film 17 is
The semiconductor device is stacked over the entire surface so as to have a thickness of nm.

Thereafter, as shown in FIG. 3 (i), a heat treatment is performed at a first temperature of 350 to 550 ° C., for example, for 60 seconds, and the silicon of the semiconductor substrate 1 reacts with the Co film 17 in the active region. Then, a (first) cobalt silicide film 18a is formed. This cobalt silicide film 18a
Is formed of CoSi or Co ₂ Si, and the thickness of the cobalt silicide film 18a formed here is
It is about twice the thickness of the Co film 17 laminated earlier,
Its composition is CoSi or Co ₂ Si, or a mixture thereof.

Next, as shown in FIG. 3 (j), C remaining in an unreacted state even after the heat treatment at the first temperature is performed.
The o-film 17 is removed by dissolving the film 17 at a temperature of 50 to 100 ° C. using, for example, a chemical solution of a mixed solution of sulfuric acid and hydrogen peroxide solution.

Thereafter, a heat treatment is performed at a second temperature of 700 to 900 ° C. for about 10 to 60 seconds to obtain a (second) cobalt silicide film 1 having a final composition of CoSi _2.
8 is formed. The description of the formation of the contact for electrically connecting the source / drain region of the MOS transistor and the upper wiring is omitted here.

As described above, the salicide process for forming a cobalt silicide film shown in the first embodiment can be used for forming a MOS transistor.
Also in this case, similarly to the case of the first embodiment, it is possible to form a film having a smooth interface between the finally obtained cobalt silicide film 5 (CoSi ₂ ) and silicon constituting the semiconductor substrate 1 with good controllability. As a result, a cobalt silicide film having a desired film thickness can be obtained while suppressing an increase in junction leakage current.

Accordingly, even when a cobalt silicide film is formed on a shallow junction, it is possible to form a cobalt silicide film having a uniform thickness by using the present invention, and to form a highly integrated semiconductor device. This also has the effect that it becomes possible. Needless to say, the present invention can be used not only for forming a MOS transistor but also for forming other elements.

Further, as shown in FIG. 3A, Ge is segregated at the interface between the cobalt silicide film 18 and the semiconductor substrate 1 as in the first embodiment. A large SiGe alloy is formed. Since the band gap of Ge is narrower than that of Si, the band gap at the interface becomes narrower as the Ge concentration of the SiGe alloy layer becomes higher than that of Si. As a result, the barrier between the CoSi ₂ layer and Si becomes lower and the contact resistance decreases. There is also a feature to do. When the contact resistance is reduced, the drain current of the transistor is increased, the driving capability is improved, and the operation speed of the semiconductor device can be increased.

Embodiment 4 Next, using the cobalt silicide process of the second embodiment of the invention described above,
A method for forming an OS transistor is described in Embodiment 4.
Will be described. The finally formed MOS transistor has a structure as shown in FIG.
3A, reference numeral 19 denotes a Ge film stacked on the source / drain region 15 and the gate electrode 11.
A cobalt silicide (CoSi ₂ ) film 18 is formed on the film 19.

Next, a method of manufacturing the semiconductor device shown in FIG. First, the processes shown in FIGS. 3B to 3E are performed according to the manufacturing method described in the third embodiment, and the gate electrode 11 and the source / drain region 1 are processed.
5 is formed.

Thereafter, as shown in FIG. 4B, the exposed surface of the source / drain region 15 and the gate electrode 11 are exposed.
The Ge layer 19 is selectively formed on the surface of the substrate so as to have a thickness of 10 to 15 nm. This Ge film 19 is selectively formed only on the exposed surface of the silicon substrate (semiconductor substrate 1) and the surface of polysilicon (gate electrode 11).
Temperature 500-600 ° C, pressure 0.1-1 torr, Ge
It can be formed under the condition of a H ₄ flow rate of 50 to 100 sccm. In this case, since the growth rate of the Ge film 19 depends on the base, it is not stacked on the side wall 13 made of the silicon oxide film and the element isolation insulating film 2 but on the gate electrode 11 and the source / drain region 15. It is selectively formed only on the surface.

Next, as shown in FIG. 4C, a Si film 20 is selectively laminated on the Ge film 19 to a thickness of about 10 to 30 nm. This Si film 20 has a temperature of 500 to
600 ° C., pressure 0.1-1 torr, SiH ₄ flow rate 50
It can be formed under conditions of 〜100 sccm. Also in this case, since the growth rate of the Si film 20 depends on the base, it is not laminated on the sidewall 13 made of the silicon oxide film and the element isolation insulating film 2 but selectively on the surface of the Ge film 19 only. Laminated.

Thereafter, as shown in FIG.
A Co film 17 is laminated to a thickness of about 5 to 15 nm over the entire surface of the semiconductor device by a sputtering method or a sputtering method. Next, as shown in FIG. 4E, a heat treatment is performed at a temperature of 350 to 500 ° C. for about 1 minute to form the Co film 17 and the S film.
react with the i-film 20 to obtain CoSi or Co ₂ Si,
Or a cobalt silicide film 1 made of a mixture thereof
8a is formed. The Co film 17 stacked on the sidewalls 13 and the element isolation insulating film 2 is not silicided by this heat treatment, so that the unreacted C
O film 17 is left.

Next, as shown in FIG. 4 (f), the unreacted Co film 17 is dissolved at a temperature of 50 to 100 ° C. using a chemical mixture of, for example, sulfuric acid and hydrogen peroxide solution. ,Remove.

Thereafter, a heat treatment is performed at a second temperature of 700 to 900 ° C. for about 10 to 60 seconds to react the cobalt silicide film 18 a with the unreacted Si film 19 located thereunder. Then, the cobalt silicide film 18 having a composition of CoSi ₂ shown in FIG.
Get. The description of the formation of the contact for electrically connecting the source / drain region of the MOS transistor and the wiring formed in the upper layer is omitted here.

Through the above steps, the cobalt silicide step described in the second embodiment can be applied to the formation of a MOS transistor. Also,
It is needless to say that the cobalt silicide process of the present invention can be used not only for the formation of the MOS transistor but also for the formation of other elements.

In this embodiment, the Ge film 19 is
For example, it functions similarly to the Ge injection layer 4 of the first embodiment,
During the heat treatment for forming the cobalt silicide film 7,
The silicide reaction is suppressed in the Ge film 8 on the bottom surface of the Si film 9 and in the vicinity thereof, and the bottom surface is formed in a smooth shape.

As described in the third embodiment, Ge has a narrower band gap than Si, and
iGe alloy layer band gap at the interface as the Ge concentration increases becomes narrower compared with Si, as a result CoSi ₂
There is also a feature that the barrier between the layer and Si is lowered and the contact resistance is reduced. When the contact resistance is reduced, the drain current of the transistor is increased, the driving capability is improved, and the operation speed of the semiconductor device can be increased.

Further, according to this embodiment, since the Ge film 19 and the Si film 20 are laminated on the semiconductor substrate 1, even when the cobalt silicide film 18 is finally formed, the surface of the semiconductor substrate 1 It is possible to suppress the consumption of Si, and as a result, even in a semiconductor device having a shallower junction, there is an effect that the junction is not broken.

As in the case of the second embodiment, the fourth embodiment uses a thermal CVD method using GeH ₄ and SiH ₄ as raw materials instead of using pure Ge as the Ge film 19. A similar effect can be obtained by forming a GeSi alloy. It is also effective to remove the natural oxide film and the like by forming the Si film 20 before forming the Co film.

[0075]

According to the present invention, it is possible to suppress the occurrence of junction leak current by forming a film having a smooth interface between the cobalt silicide film (CoSi ₂ ) and the semiconductor substrate with good controllability. . In addition, since a SiGe alloy having a high Ge concentration is located at the interface between the cobalt silicide film and the semiconductor substrate, for example, when a MOS transistor is formed, the contact resistance on the source / drain regions decreases, and The drain current increases and the driving capability improves. This has the effect that the operating speed of the semiconductor device can be increased.

According to the present invention, in addition to the same effects as described above, the Ge film and the cobalt silicide film are formed on the semiconductor substrate, so that the consumption of Si on the surface of the semiconductor substrate 1 can be suppressed. There are effects such as becoming.

Further, according to the present invention, the Ge injection layer has a peak at the same or shallow position as the interface between the cobalt silicide film and the semiconductor substrate (source / drain region).
During the formation of the cobalt silicide film, Ge segregates at the interface between the cobalt silicide film and the semiconductor substrate.
A high concentration SiGe alloy is formed. Since Ge has a narrower band gap than Si, the SiGe alloy layer is formed of S
The band gap at the interface becomes narrower as the Ge concentration increases as compared with i, and as a result, the barrier between the CoSi ₂ layer and Si also decreases, and the contact resistance decreases. When the contact resistance is reduced, the drain current of the transistor is increased, the driving capability is improved, and the operation speed of the semiconductor device can be increased.

According to the present invention, in addition to the same effects as described above, since the Ge film and the cobalt silicide film are laminated on the semiconductor substrate, the Si film on the surface of the semiconductor substrate is formed.
There is an effect that it becomes possible to suppress the consumption of waste.

According to the method of manufacturing a semiconductor device of the present invention, a cobalt silicide film (CoSi
₂ ) It is possible to form a film having a smooth interface between the silicon constituting the semiconductor substrate and the silicon with good controllability. As a result,
A cobalt silicide film having a desired film thickness can be obtained while suppressing the occurrence of junction leakage current. Therefore, according to the present invention, even when a cobalt silicide film is formed on a shallow junction, a cobalt silicide film having a uniform thickness can be formed, and a highly integrated semiconductor device can be formed. There is.

According to the manufacturing method of the present invention, since the Ge film and the Si film are laminated on the semiconductor substrate, even when the cobalt silicide film is finally formed, the consumption of Si on the surface of the semiconductor substrate is reduced. Can be suppressed,
As a result, even if the semiconductor device has a shallower junction, it is possible to form a high-performance semiconductor device without breaking the junction.

Further, according to the manufacturing method of the present invention, G
The e-implanted layer has a peak at the same or shallower position as the interface between the cobalt silicide film and the semiconductor substrate (source / drain region), and Ge segregates at the interface between the cobalt silicide film and the semiconductor substrate during the formation of the cobalt silicide film. Therefore, a SiGe alloy having a high Ge concentration is formed.
Ge has a narrower band gap than Si, so that SiG
The e-alloy layer also has a feature that the band gap at the interface becomes narrower as the Ge concentration becomes higher than that of Si, and as a result, the barrier between the CoSi ₂ layer and Si becomes lower and the contact resistance decreases. When the contact resistance is reduced, the drain current of the transistor is increased, the driving capability is improved, and there is an effect that a semiconductor device capable of increasing the operation speed of the semiconductor device can be formed.

According to the manufacturing method of the present invention, since the Ge film and the Si film are stacked on the semiconductor substrate, even when the cobalt silicide film is finally formed, the consumption of Si on the surface of the semiconductor substrate is reduced. Can be suppressed,
As a result, even if the semiconductor device has a shallower junction, it is possible to form a high-performance semiconductor device without breaking the junction.

Further, according to the manufacturing method of the present invention, silicon and silicon on the surface of the semiconductor substrate are removed and cleaning is performed to remove oxygen and carbon on the outermost surface of the semiconductor substrate. There is an effect that the phenomenon that carbon enters Si can be suppressed.

According to the manufacturing method of the present invention, the temperature at the time of forming the cobalt silicide film is set at 35 ° C.
By adjusting the second temperature in the range of 0 to 550 ° C. and the second temperature in the range of 700 to 900 ° C., an optimum silicidation process can be performed.

Further, according to the manufacturing method of the present invention, the first cobalt silicide film is made of CoSi or Co ₂ S.
The second cobalt silicide film is made of a material in which one or both of them are mixed, and the second cobalt silicide film is made of CoSi _2. It becomes possible to obtain a membrane.

[Brief description of the drawings]

FIG. 1 is a diagram showing a semiconductor device and a method of manufacturing the same according to a first embodiment of the present invention;

FIG. 2 is a view illustrating a method of manufacturing a semiconductor device according to a second embodiment of the present invention;

FIG. 3 is a diagram showing a semiconductor device and a method of manufacturing the same according to a third embodiment of the present invention;

FIG. 4 is a diagram showing a semiconductor device and a method of manufacturing the same according to a fourth embodiment of the present invention;

FIG. 5 is a view showing a method of manufacturing a semiconductor device according to a conventional technique.

[Explanation of symbols]

 1. Semiconductor substrate 2. 2. Element isolation insulating film Impurity region 4, 16. Ge injection layers 5, 5a, 7, 18, 18a. Cobalt silicide film 6, 17. Co film 8,19. Ge layer 9, 20. Si layer 10. Gate oxide film 11. Gate electrode 12. Low concentration impurity region 13. Sidewall 14. High concentration impurity region 15. Source / drain region 10a. Silicon oxide film 11a. Polysilicon film

Claims (11)

[Claims] 1. CoSi formed on a surface of a semiconductor substrate
_Two layers, the CoSi ₂ layer and Si forming the semiconductor substrate
Including a Ge implantation layer having a Ge impurity concentration peak at a position shallower than the interface or the interface, an impurity region formed below the Ge implantation layer, and a surface where the CoSi ₂ layer and the Ge implantation layer are bonded to each other. CoSi
_A semiconductor device, wherein the _two layers are separated from a PN junction surface between the semiconductor substrate and the impurity region. An impurity region formed from a principal surface of the semiconductor substrate to a predetermined depth, a Ge film laminated on the impurity region, a CoSi ₂ film laminated on the Ge film, _A semiconductor device, wherein the _two films are separated from a PN junction surface between the semiconductor substrate and the impurity region. A gate electrode laminated on a region of the semiconductor substrate to be a channel region via a gate insulating film;
A source / drain region formed with the channel region interposed therebetween, a CoSi ₂ layer formed on surfaces of the gate electrode and the source / drain region, an interface between the CoSi ₂ layer and Si constituting the semiconductor substrate, or A MOS transistor including a Ge injection layer having a Ge impurity concentration peak at a position shallower than the interface;
A semiconductor device, wherein the Si ₂ layer is separated from a PN junction surface between the semiconductor substrate and the source / drain region. 4. A gate electrode laminated on a region to be a channel region of the semiconductor substrate via a gate insulating film;
A source / drain region formed with the channel region interposed therebetween, a Ge film stacked on the gate electrode and the source / drain region, a CoSi ₂ layer stacked on the Ge film
A MOS transistor including a film, wherein the CoSi ₂ film and the Ge film are in contact with each other, and the CoSi ₂ film is separated from a PN junction surface between the semiconductor substrate and the source / drain region. Semiconductor device. 5. A step of forming an impurity region from one main surface of the semiconductor substrate to a predetermined depth, wherein the region where the impurity region is formed is located at a position less than the predetermined depth from the one main surface of the semiconductor substrate. Forming a Ge injection layer having a peak, laminating a Co film on the semiconductor substrate to a predetermined thickness, performing a heat treatment at a first temperature to react the Co film with the semiconductor substrate, Forming a first cobalt silicide film that is thinner than the depth from the surface of the semiconductor substrate to the peak position of the Ge injection layer, where the first cobalt silicide film of the Co film is left unreacted after the formation of the first cobalt silicide film Removing the Co that has been removed, and performing a heat treatment at a second temperature to change the first cobalt silicide film into a second cobalt silicide film having a different composition. The peak of the Ge implantation layer is located at the same or shallower position as the cobalt silicide film of Si and the Si constituting the semiconductor substrate, and the second cobalt silicide film has a P-type conductivity between the semiconductor substrate and the impurity region.
A method for manufacturing a semiconductor device, wherein the method is separated from an N junction surface. 6. A step of forming an impurity region from one main surface of a semiconductor substrate to a predetermined depth, forming a Ge film having a predetermined thickness on one main surface of the semiconductor substrate in a region where the impurity region is formed. A step of forming, a step of laminating a Si film of a predetermined thickness on at least the Ge film, a step of laminating a Co film of a predetermined thickness on the Si film, Reacting the film with the Si film
Forming a first cobalt silicide film having a thickness equal to or smaller than the thickness of the film; and forming a first cobalt silicide film of the Co film remaining unreacted after the formation of the first cobalt silicide film.
o, performing a heat treatment at a second temperature, the step of changing the first cobalt silicide film into a second cobalt silicide film having a different composition, the step of forming the second cobalt silicide film A method of manufacturing a semiconductor device, characterized in that the entire Si film is consumed and the second cobalt silicide film is separated from a PN junction surface between the semiconductor substrate and the impurity region. 7. A step of forming a gate electrode on a region to be a channel region of a MOS transistor on a semiconductor substrate via a gate insulating film, a step of forming a sidewall made of an insulating material on a side cross section of the gate electrode, Forming a Ge injection layer having a peak at a position less than a predetermined depth from at least one main surface serving as a source / drain region of the MOS transistor on the semiconductor substrate and an upper surface of the gate electrode; A step of laminating a Co film thereon to a predetermined thickness, performing a heat treatment at a first temperature to cause the Co film to react with the semiconductor substrate located in a region to be the gate electrode and the source / drain region, Ge from the surface of the semiconductor substrate
Forming a first cobalt silicide film having a thickness smaller than the depth of the injection layer up to the peak position, removing the unreacted Co from the Co film after forming the first cobalt silicide film; A step of performing a heat treatment at a second temperature to change the first cobalt silicide film into a second cobalt silicide film having a different composition, wherein the second cobalt silicide film and Si forming the semiconductor substrate are formed. The peak of the Ge injection layer is located at the same or thinner position as the interface with the interface between the semiconductor substrate and the impurity region.
A method for manufacturing a semiconductor device, wherein the method is separated from an N junction surface. 8. A step of forming a gate electrode on a region to be a channel region of a MOS transistor on a semiconductor substrate via a gate insulating film, a step of forming a sidewall made of an insulating material on a side surface of the gate electrode, Forming a Ge film on one main surface serving as a source / drain region of the MOS transistor on the semiconductor substrate and on the upper surface of the gate electrode; laminating a Si film on the Ge film; A step of laminating a Co film to an arbitrary thickness, heat treatment is performed at a first temperature, and the Co film and the Si film are reacted to form a first cobalt silicide film having a thickness smaller than the Si film. A step of removing unreacted Co after the formation of the first cobalt silicide film in the Co film; A step of performing a heat treatment to change the first cobalt silicide film into a second cobalt silicide film having a different composition, wherein the Si film is completely consumed when the second cobalt silicide film is formed, and the second cobalt silicide is A method for manufacturing a semiconductor device, wherein a film is separated from a PN junction surface between the semiconductor substrate and the impurity region. 9. The method according to claim 5, further comprising a step of etching and cleaning the surface of the semiconductor substrate before the Ge implantation step for forming a Ge implantation layer.
8. The method for manufacturing a semiconductor device according to claim 7. 10. The method for manufacturing a semiconductor device according to claim 5, wherein the first temperature is 350 to 550 ° C., and the second temperature is 700 to 900 ° C. 11. The first cobalt silicide film is made of CoS.
9. The semiconductor device according to claim 5, wherein the second cobalt silicide film is made of a material in which one or both of i and Co ₂ Si are mixed, and the second cobalt silicide film is made of CoSi _2. Manufacturing method.