JPH10149382A - Device for designing electronic circuit by program language - Google Patents

Abstract

PROBLEM TO BE SOLVED: To efficiently describe a circuit without complicating the description while executing circuit description by using general program language of which description property, debugging environment and execution environment are superior to that of hardware description language and to attain highly accurate simulation and debugging close to the operation of a real circuit. SOLUTION: A specification processing part 2 specifies parts to be successively controlled from a program 1 in which circuit operation is described by the general program language. Then a conversion processing part 3 converts the description of the parts to be successively controlled by the general program language so as to drive it as a state machine and obtains a converted program 4. Then a program generation processing part 5 extracts parts to be driven in parallel from the converted program 4 and generates a program 6 for accessing all the extracted parts.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an apparatus for designing an electronic circuit using a general-purpose program language such as C language.

[0002]

2. Description of the Related Art Conventionally, when designing an electronic circuit, a circuit description is conventionally made in a hardware description language, the function is verified by a high-speed simulator, and then a gate that directly corresponds to the actual hardware using a logic synthesis tool. A technique of generating a level circuit is used. This technique is
There is an advantage that a large-scale circuit can be designed more efficiently than developing at the gate level from the beginning.

Recently, a tool has been provided which combines a hardware simulator and a program debug tool to debug both a program operating on a microprocessor and hardware.

[0004]

However, the hardware description language manages the time so that the hardware can be simulated, and considers that all the described processes can operate in parallel as time elapses. Has the following disadvantages. That is, the hardware description language is inferior in description when compared with a programming language such as C language. In addition, when debugging a circuit by performing a function simulation of a circuit described in a hardware description language, the debug tool is not as sophisticated as a debug tool of a programming language, and often suffers in debugging methods. Furthermore, simulators that simulate circuits written in hardware description languages are also expensive,
The operating speed of the simulator is often slow. Furthermore,
Even when debugging both a hardware control program operating on a microprocessor and hardware, the hardware evaluation is dependent on the hardware simulator, so the hardware is described in a hardware description language. Therefore, the description of the hardware is not good, and the difficulty of debugging still remains.

Japanese Unexamined Patent Publication No. Hei 4-23076 proposes a method of converting a circuit described in a high-level language into a hardware description language by interactively operating a circuit using a man-machine interface. The technology is a function to delete parts that are not related to the operation of the circuit in the circuit description written in a high-level language, and a technology to generate a circuit that operates sequentially, and its application range is limited. Is done.

On the other hand, conventionally, the operation of a circuit has been described in a program language such as C language, and a simulation has been performed.
There is a technology for evaluating circuits. According to this technique, since the programming language has better descriptiveness than the hardware description language, and a debugging environment, an execution environment, and the like are already prepared, debugging can be easily performed.

However, a programming language, like a hardware description language, represents a circuit operating in parallel or a clock synchronous circuit.
Conventionally, it is necessary to perform a complicated description, and in these points, the efficiency is lower than in the case where the description is performed in a hardware description language. If you do not make complicated descriptions,
Since the programming language is a language that describes sequential processing, a plurality of processes cannot be processed simultaneously, so that the operation is completely different from the actual operation of the circuit, and a highly accurate simulation cannot be performed.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned points, and its object is to use a general-purpose program language which has good descriptiveness and allows easy debugging without complicating the description. It is another object of the present invention to provide a design apparatus which can efficiently describe and perform a highly accurate simulation matching the operation of an actual circuit.

Many systems are composed of circuits and programs for controlling the circuits. When this system is verified by simulation, not only the circuit but also the control program must be simulated simultaneously with the circuit. Furthermore, if a circuit verified by a simulation and described in a general-purpose programming language cannot be accurately converted to an actual circuit, there is no point in verifying by a simulation.

It is a further object of the present invention to provide a circuit description program capable of performing a highly accurate simulation that matches the operation of an actual circuit while using the general-purpose program language, and to control the described circuit. The object of the present invention is to synchronize the operation with the control program, and to convert such a circuit description program into a hardware description language capable of synthesizing the logic of the circuit.

[0011]

In order to achieve the above object, according to the present invention, a concept of sequential control operating in synchronization with a basic clock and a concept of simultaneous and parallel processing of a plurality of processes are described in a description of a program language. And so on.

That is, according to the first aspect of the present invention, a specific processing unit that specifies a part to be sequentially controlled from a program describing circuit operation in a general-purpose program language, and a part specified by the specific processing unit is a general-purpose program language. A conversion processing unit for converting the description into a state machine using the function, and a function for performing a parallel operation in the circuit described in the general-purpose program language in order to operate the circuit described in the general-purpose program language in parallel And a program generation processing unit for additionally generating a program for causing the specified function to operate in parallel.

According to a second aspect of the present invention, in the first aspect of the present invention, the conversion program generated by the conversion program converted by the conversion processing unit and the generation program generated by the program generation processing unit are described. A control program for controlling the extracted circuit, and from the control program, an extraction processing unit for extracting an access part to hardware, and a program for detecting an execution time of the access part extracted by the extraction processing unit ,
A first additional processing unit that inserts a program for measuring an execution time interval between the access part and the immediately preceding access part immediately before the access part; and a first additional processing unit. A second additional processing unit that inserts a program for operating the conversion generation program by the number of clocks corresponding to the execution time interval obtained by the program inserted immediately before the access part, And the control program is synchronized.

Further, according to a third aspect of the present invention, in the first aspect of the present invention, there is provided a program which requires generation of a flip-flop or a latch in a circuit described by a conversion program converted by a conversion processing unit. Searching for a part, obtaining an additional processing unit for adding a description for generating a flip-flop or a latch to the conversion program in a hardware description language, and obtaining a variable used in a circuit described in the conversion program; Determine the characteristics of the variables,
A second additional processing unit that converts the variable into a description of a module input / output terminal in a hardware description language according to the characteristic and adds the description to the conversion program; And a syntax conversion processing unit for converting into a control syntax of a description language description.

With the above configuration, the design apparatus according to the first aspect can debug a circuit described in a general-purpose program language by performing a highly accurate simulation with an operation close to an actual circuit. . It is also possible to convert to actual hardware.

According to a second aspect of the present invention, a circuit program described in a general-purpose program language and a control program for controlling the circuit are synchronized with each other while executing a simulation. Debugging and evaluation can be performed with high accuracy.

Further, in the design apparatus according to the third aspect, it is possible to implement a hardware by converting a circuit described in a general-purpose program language into a general-purpose hardware description language capable of logic synthesis.

[0018]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the design apparatus according to the present invention.

In FIG. 1, reference numeral 1 denotes a program describing an algorithm of a circuit operation using a programming language. Examples in which this program is described in the C language are shown in FIG. 2, FIG. 4, and FIG. If a program that accesses these functions as appropriate is created, the algorithm can be verified even with the description in these figures. These FIGS. 2 and 4
When the description of FIG. 6 is executed, the actual operation of the hardware is greatly different from the actual operation of the hardware. However, a control program for confirming the specifications of the entire system, confirming the algorithm, and controlling the described circuit, It is possible to verify at a very high speed a defect of a specification level and a defect of an algorithm included in an early stage of a system design, such as a check of consistency of the system. The same tools can be used for debugging the circuit part as for debugging the program, so that if the environment allows program debugging, the entire system can be evaluated.

Conventionally, after performing a certain degree of verification at this level, a circuit is redesigned using an input device of a circuit diagram or written in a hardware description language.
Here, design errors often occur. In addition, in the description at this time, there are many parts different from the actual circuit operation as described above, and the accuracy of the simulation is low.
If a description is made to perform the same operation as an actual circuit, a complicated description will be required, and the efficiency will be lower than in the case of performing a simulation using a hardware description language from the beginning.

The descriptions shown in FIGS. 2, 4 and 6 do not include the concept of the operation of the hardware operating in accordance with the change of the basic clock. Operation cannot be simulated. On the other hand, in the case where not all of the operations are performed simultaneously and concurrently, such as the processing inside the function of FIG. 2 or FIG.

Then, next, the program 1 is input to the specific processing unit 2, and the specific processing unit 2 executes the program 1
Are searched for and specified from among the parts to be sequentially controlled, and then, in the conversion processing unit 3, the specified parts to be sequentially controlled are converted into a description for performing an operation of the state machine, and the converted program, that is, the hardware is converted into a description. A program (conversion program) 4 converted so as to perform an operation equivalent to the conversion is obtained. FIG. 3 shows an example in which the description of FIG. 2 is converted.
FIG. 5 shows an example in which the description of FIG. 4 is converted.

Subsequently, the conversion program 4 converted by the conversion processing unit 3 is input to a program generation processing unit 5, and the processing unit 5 extracts, from the program 4, a part that performs simultaneous and parallel operations. , A program 6 for accessing all of the extracted parts. For the part performing the parallel operation, rules are determined in advance, and the rules are searched for by pattern matching. For example, when SUB_ or LiB_ is added to the function name, it is assumed that the circuit is treated as a library-like circuit, and the other functions are substantial and operate in parallel. FIG. 7 shows an example of a program that extracts a part of simultaneous and parallel operations from FIGS. 3, 5 and 6 based on this rule, and generates a program to access all of them.

7 is a conversion program 4 converted by the conversion processing unit 3 to operate as a state machine;
A program language processing system that inputs a program (generation program) 6 for accessing the parallel operation part and processes the program language.

If the conversion program 4 is executed while the program 6 for accessing the parallel operation part is executed every clock change, a cycle-based simulation very similar to the operation of the actual hardware can be performed. For example, once run_hdc () in FIG. 7 is executed, it is executed for one clock. Compared to the original program 1, the simulation speed is slightly reduced and the debug performance is slightly degraded. However, since the circuit description part can be simulated close to the actual hardware operation, a more accurate evaluation can be performed. It is possible. Also,
Since the program language remains at this stage, the debug environment for the circuit description is the same as the debug environment for ordinary programs.

FIG. 8 is a block diagram of a design apparatus according to an embodiment of the present invention. In the present embodiment, a program for describing a circuit is synchronized with a control program for controlling the described circuit.

2, reference numeral 8 denotes a control program for controlling the circuits described in the conversion program 4 and the generation program 6 shown in FIG. As shown in FIG. 9, the control program 8 always includes portions 15a, 15b, and 15c that access the hardware 14.
After the hardware is accessed by the access part 15a, the time until the subsequent access part 15b is reached is:
Except in special cases, it is difficult to know in advance. Therefore, it is difficult to specify how much clock change the hardware has operated during that time. In the present embodiment, the access time at the access portion 15a
The access time at the subsequent access portion 15b is measured, the operation time of the hardware is calculated from the time interval, and the conversion program 4 and the generation program 6 (hereinafter referred to as conversion generation program) are operated for the calculated time. Thus, the conversion generation program and the control program 8 are to be synchronized.

That is, in FIG. 8, the control program 8 is input to the hardware access unit extraction processing unit 9, and the extraction processing unit 9 searches for and extracts the position of the description accessing the hardware. Thereafter, the control program execution time measurement processing additional processing unit (first additional processing unit) 1
0 inserts a program for detecting the execution time immediately before the access part to the hardware searched and extracted by the extraction processing unit 9, and executes the execution time of the previous access part measured last time and the current time. A program for calculating the time from the previous access to the hardware to the current access based on the difference from the execution time of the access part is inserted immediately before the description for accessing the hardware.
The detection of the execution time is realized by a system call or the like to the operating system in which the environment for executing the control program 8 operates.

Next, the circuit operation start program additional processing unit (second additional processing unit) 11 calculates the number of hardware clocks corresponding to the execution time from the execution time obtained by the first additional processing unit 10. Is calculated, and a program for operating the circuit description program (that is, the conversion program 4 and the generation program 6) by the number of clocks is inserted immediately before the description of accessing the hardware in the control program 8. I do. In the present embodiment, the program is a program for operating the program (generation program) 6 for accessing the parallel operation portion shown in FIG. 1 by the number of clocks. The control program 12 thus obtained is a program synchronized with the program 6 of the circuit description.

Therefore, if the control program 12 and the conversion description program of the circuit description are executed, it is possible to accurately evaluate the functions of the entire system including the software and the hardware.

FIG. 10 is a block diagram showing an embodiment of the design apparatus according to the third aspect of the present invention. In this embodiment,
A circuit described in a programming language capable of performing a highly accurate simulation as described above is converted into a hardware description language capable of performing logic synthesis.

That is, in FIG. 10, reference numeral 16 denotes a program converted so as to perform an operation equivalent to that when converted into hardware, and a conversion program 4 whose description is changed so as to operate as a state machine shown in FIG. Are identical.

The additional processing unit (first additional processing unit) 17
In the program 16, a program description for generating a flip-flop or a latch is searched, and a description is added to a description portion for generating the flip-flop or the like so that the flip-flop or the latch is constructed in a hardware description language. . For example, if the program is C language, i
The f sentence is searched, the structure of the if sentence is analyzed, and the
If the portion described in the f statement does not represent the selector function, in other words, if it is necessary to generate a flip-flop circuit or the like with actual hardware, the flip-flop circuit or the like is written in a hardware description language. Is added. For example, when a value is set to a static variable in a portion of an executable statement in an if statement, a flip-flop circuit is necessary, and thus this portion includes Ve
In the rilog-HDL, a description of an always statement is added.

In a hardware description language, it is necessary to clearly define input terminals and output terminals of a hardware module. On the other hand, in a circuit description written in a program language, the concept of an input terminal and an output terminal is used. Absent. From this point,
The additional processing unit (second additional processing unit) 18
6 to obtain the variables used, determine the characteristics of the variables from the usage of the variables, determine the input and output terminals, and add those terminals to the beginning of the description of the module. . Note that a module in the hardware description language corresponds to a function in the programming language. The characteristics of a variable are determined based on whether the variable is a static variable, a global variable, or a local variable, and whether a value is substituted for the variable.

Further, a conversion processing unit (syntax conversion processing unit) 19 of the notation of the control syntax converts the control syntax of the expression peculiar to the programming language into the expression of the hardware description language. This conversion is performed by a pattern matching method and replacement. As a result, the circuit description 20 is generated in the hardware description language. This circuit description can be simulated by a hardware description language simulator, and furthermore, actual hardware can be provided through logic synthesis and layout.

[0037]

As described above, according to the first aspect of the present invention, the specification of hardware and the algorithm are examined using a general-purpose program development environment in which various development tools are already provided at low cost. It is possible to perform high-speed and comfortable examination of the above and debugging in a state close to the actual circuit operation. It is also possible to convert to actual hardware.

According to the second aspect of the present invention, a circuit description program written in a general-purpose program language,
Simulating, debugging, and evaluating both programs can be performed with high accuracy while synchronizing with a control program that controls the circuit.

Further, according to the third aspect of the present invention, a circuit description written in a program language, which has been sufficiently debugged according to the first aspect of the present invention, is converted into a hardware description language capable of logic synthesis. It is possible to realize the final purpose of the hardware. In addition, since much of the hardware development period can be advanced using a programming language that can be executed at high speed, hardware can be developed in a shorter development period than before. At the same time, software can be evaluated in the upstream process.
The development time of the entire system can be significantly reduced. Furthermore,
It is possible to automate everything from circuit description written in a programming language to hardware realization, and reduce design errors.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a design apparatus according to claim 1 of the present invention.

FIG. 2 shows a circuit operation algorithm in a programming language C
It is a figure showing the example described in the language.

FIG. 3 is a diagram showing an example in which the description of FIG. 2 is converted using the design apparatus of the present invention.

FIG. 4 is a diagram illustrating an example in which a circuit operation algorithm is described in C language.

FIG. 5 is a diagram showing an example in which the description of FIG. 4 is converted using the design apparatus of the present invention.

FIG. 6 is a diagram illustrating an example in which a circuit operation algorithm is described in C language.

FIG. 7 is a diagram showing an example of a program for accessing a simultaneous and parallel operation part from the descriptions illustrated in FIGS. 3, 5, and 6 using the design apparatus of the present invention.

FIG. 8 is a block diagram showing an embodiment of a design apparatus according to claim 2 of the present invention.

FIG. 9 is a diagram illustrating a control relationship between hardware (circuit) and a control program of the circuit.

FIG. 10 is a block diagram showing an embodiment of a design apparatus according to claim 3 of the present invention.

[Explanation of symbols]

2 A processing unit that specifies a part to be sequentially controlled (specific processing unit) 3 A processing unit that converts a description so that the part to be sequentially controlled operates as a state machine (a conversion processing unit) 5 Extracts parts that operate in parallel, and so on Processing unit for generating a program that accesses all of the programs (program generation processing unit) 7 processing system of programming language 8 control program 9 hardware access unit extraction processing unit (extraction processing unit) 10 control program execution time measurement processing addition processing unit (claim (1st additional processing unit in item 2) 11 Circuit operation activation program additional processing unit (claim 2)
17) Search for program description that generates flip-flops or latches and additional processing unit for description that generates them (first additional processing unit in claim 3) 18 In program Acquisition of variables to be used, determination of characteristics of variables, and additional processing section for description of variables (second additional processing section in claim 3) 19 Conversion processing section for notation of control syntax (syntax conversion processing section)

Claims (3)

[Claims] 1. A specific processing unit for specifying a part to be sequentially controlled from a program describing a circuit operation in a general-purpose program language, and a state machine for converting the part specified by the specific processing unit into a state machine using a general-purpose program language. A conversion processing unit that converts the description into a description, and a function that performs a parallel operation in the circuit described in the general-purpose program language so that the circuit described in the general-purpose program language operates in parallel. And a program generation processing unit for additionally generating a program for causing the program to operate in parallel. An apparatus for designing an electronic circuit using a program language. 2. A control program for controlling a circuit described by a conversion program converted by the conversion processing unit and a generation program generated by the program generation processing unit is input. An extraction processing unit for extracting an access part to the hardware from the program; a program for detecting the execution time of the access part extracted by the extraction processing unit; A first additional processing unit that inserts a program for measuring an execution time interval between them immediately before an access part thereof, and a clock number corresponding to an execution time interval obtained by the program inserted by the first additional processing unit A program for operating the conversion generation program by the amount immediately before the access portion. And a further processing unit of an apparatus for designing an electronic circuit by a program language according to claim 1, wherein the synchronization between the control program and the conversion generation program. 3. A description of a program that requires generation of a flip-flop or a latch in a circuit described by a conversion program converted by a conversion processing unit, and generates a description that generates a flip-flop or a latch by a hardware description. An additional processing unit to be added to the conversion program in a language; acquiring a variable used in a circuit described in the conversion program; determining a characteristic of the variable; and converting the variable into hardware according to the characteristic. A second additional processing unit that converts the description into a description of a module input / output terminal in a description language and adds the description to the conversion program; and a syntax that converts a description of a control syntax in the conversion program into a control syntax of a hardware description language description. The apparatus for designing an electronic circuit according to the program language according to claim 1, further comprising a conversion processing unit.