JPH10135269A - Glass board semiconductor element, high density mounting board and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make a semiconductor element on which an IC chip is mounted possible to cope with miniaturization, low cost and high heat dissipation, by forming wiring circuits on a glass board and mounting the IC chip on the wiring circuits. SOLUTION: An IC chip 1 is connected with wiring circuits 3 on a glass board 4. Both bumps 2 are thermally fusion-welded. A configuration wherein the IC chip 1 is mounted on a printed board is used usually as a semiconductor element. A printed board wherein a copper foil is used as a base and a part of the copper foil is plated with gold, or a ceramics constituted of a thick film composed of metal and glass is used as the wiring circuit 3. Glass is used as the board 4, and the wiring circuit 3 is formed of compound oxide composed of indium and tin. By using the glass board, the weight can be reduced, thermal conductivity and radiation rate are excellent, and cost reduction is enabled. The board size can be remarkably reduced by using a thin wiring circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-density mounting board in which a semiconductor element having an IC chip mounted on a circuit formed on a glass substrate is mounted on a printed board via an anisotropic conductive film.

[0002]

2. Description of the Related Art With the recent miniaturization, thinning, and high density of electronic equipment, the mounting area of semiconductor elements has been extremely limited. However, the number of output terminals is still increasing due to high integration, such as expansion of the scale of the logic IC chip body and improvement of the functions of the MPU. Actually, there are some which exceed 1000 pins, and mounting of a multi-pin type semiconductor element is still a big problem. Conventionally used quad flat package (hereinafter referred to as QFP)
In order to achieve both multi-terminal and miniaturization, the pitch has been narrowed to 0.8, 0.65, and 0.5 mm, and in recent years, a 0.3 mm pitch QFP has begun to appear. Such advanced fine pitch puts a burden on the mounting, the mounting speed,
This causes a decrease in mounting yield and new capital investment. As a solution to these problems, a conventional pin grid array (hereinafter referred to as PGA) or a ball grid array (hereinafter referred to as an input / output terminal) in which solder balls are arranged in an array form from a multi-density module (hereinafter referred to as MCM) having a higher density. BGA) is attracting attention.

However, even in these new package forms, the IC chip area / I, which is the IC mounting efficiency, is required.
The area of the C package is as low as 50% or less, which causes a reduction in the mounting efficiency of a printed wiring board, a so-called motherboard. In addition, in the case of substrate mounting that accepts a submicron level element group at a level of 100 μm, there is a case where the characteristics in the Si chip cannot be fully utilized at the substrate mounting level, and the speed and noise are particularly greatly affected. . It is sufficient if all the circuits can be accommodated in one chip, but at present, most circuits have to be constituted by a plurality of IC chips, so minimizing inter-chip connection is a major issue.

For example, in the case of a semiconductor device having more than 280 pins, the size of the semiconductor chip is increased from a bare chip to a size capable of wire bonding for electrical connection from the output terminal to the motherboard, and further, a space is provided for providing a through hole land for motherboard connection. Because of the enlargement, there was a limit in reducing the size of the semiconductor element. The practical pitch at which wire bonding from the IC chip to the mounting substrate is possible is 160 to 200 μm pitch. Furthermore, the wiring circuit is efficiently routed to connect to the backside wiring, leading to through-hole lands. It is necessary to make the radius larger than the diameter of the through hole by 200 μm or more, and the through hole pitch is 1000
1500 μm is the actual state.

As a result, the size of a semiconductor device is 40 mm square in QFP, BG
A, PGA is 35mm square, 1 of chip size
Actually, it requires 12 to 16 times the area when viewed from a 0 to 15 mm square. Also, as the number of pins increases, the wiring pitch becomes narrower.
It is inevitable that the yield of the C-chip mounting substrate is reduced and the cost is increased.

In addition, due to the problem of heat radiation accompanying the high integration of IC chips, these semiconductor element mounting substrates form a metal core in which a metal plate is installed in an inner layer, and a cavity called a metal slug which directly contacts the chip. A technology to do this has been proposed. However, since the metal plate and the wiring circuit disposed in the inner layer need to have high insulation properties, it is necessary to further increase the man-hours by separating the resin layer or performing partial plating. The reality is that the cost is high. In addition, since a metal plate is used for the inner layer, the weight becomes heavy, and there is a problem from the viewpoint of weight reduction on the mounting surface.

In a general package, a pass / fail judgment inspection is performed in a state of being sealed with a sealing resin and packaged, and only a good product is mounted on a motherboard on which other electronic components are mounted. It is possible to mount IC chips manufactured by inspecting and sorting several times in the wafer process without any inspection.However, with ordinary IC chips, the pitch between the electrode terminals in the chip is small, and the electrode terminals themselves are also small. Because of the fineness, it is very difficult to check whether the IC chip is good or bad in the state of the IC chip. At present, no method has been established. Therefore, in this case, after mounting the IC chip on the substrate into which the bumps and pins have been inserted, a defect of the chip can be found only by performing a function test on the entire semiconductor element. Therefore, when a chip failure occurs, it takes time and effort to repair and mount a new chip again, and since the repair itself is very difficult, there is a disadvantage that in the worst case, the semiconductor element must be made defective. .

[0008]

SUMMARY OF THE INVENTION The present invention has been made in consideration of the above-mentioned drawbacks and has been made in various studies. It is an object of the present invention to make it easy to reduce the size of a semiconductor device on which an IC chip is mounted. An object of the present invention is to provide a high-density mounting board capable of coping with low cost and high heat radiation and minimizing a mounting area on a motherboard.

[0009]

SUMMARY OF THE INVENTION According to the present invention, a semiconductor element having an IC chip mounted on a glass substrate is provided through an anisotropic conductive film in which conductive particles are dispersed in an insulating adhesive resin and a flat cable. A high-density mounting board characterized by having a configuration for obtaining electrical connection with a circuit formed on the surface of a printed board.

That is, a wiring circuit is formed on a glass substrate,
A glass substrate semiconductor element on which an IC chip is mounted on the wiring circuit. In a further preferred embodiment, the wiring circuit on the glass substrate is a composite oxide of In and Sn or In and Sn.
A thermocompression-bondable metal such as In or Au is wet-plated on the composite oxide of In, Au, and all of the wiring circuits on the glass substrate or a part of the electrical junction is made of In, A
u is a glass substrate semiconductor element made of a metal that can be thermocompression-bonded, such as u, or the same material as the bump material of the bonding portion on the IC chip. Further, a high-density mounting board for electrically connecting the glass substrate semiconductor element to a circuit formed on the surface of the printed board via an anisotropic conductive film and a flat cable, and mounting the glass substrate semiconductor element on the printed board This is a method for manufacturing a high-density mounting substrate using an ultraviolet-curable adhesive resin for temporary fixing.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described in detail.
1 and 2 are schematic views of a glass substrate semiconductor device according to the present invention. Normally, a semiconductor element is used in a form in which an IC chip is mounted on a lead frame in a QFP, and an organic substrate using a ceramic or glass cloth as a base material in PGA, BGA and MCM, a so-called printed board.
The wiring circuit is formed of a copper foil as a base and partially plated with gold, and the ceramic circuit is formed of a thick film made of metal and glass. On the other hand, in the present invention, glass is used as the substrate, and as a wiring circuit, a composite oxide (hereinafter referred to as ITO) made of In (indium) and Sn (tin) which has good adhesion and is inexpensively available as a general-purpose material. It is practically preferable and economical to be formed of Further, if necessary, metal plating such as Au or indium may be applied by wet plating to lower the wiring resistance. In addition, the entire wiring circuit or a part of the bonding portion or the like may be formed of In or Au, and further, the entire wiring circuit or a part of the bonding portion or the like may be formed of the same material as the bonding bump on the IC chip. good. If the above characteristics are satisfied, the metal may be provided by a metal mask or the like.

By adopting a glass substrate, compared to a substrate provided with an inner layer of a ceramic or metal plate, 0.6, 0.
The weight can be reduced by 25. In terms of thermal conductivity, it is 0.05 times worse than ceramics, but the emissivity is 1.24 times more advantageous, and the emissivity is 5 to 5 times compared to printed circuit boards made of organic materials. 6 times improvement. In addition to the above advantages in physical properties, the greatest feature is that it can be obtained at a low price. A glass substrate with ITO using borosilicate glass from which alkali impurities have been removed costs 0.2 times as much as a ceramic substrate represented by alumina. Further, if electroless gold plating of about 1 μm is applied to reduce the wiring resistance, a sheet resistance of 10 mΩ / □ is obtained, which is suitable for practical use.

[0013] Further, the number of ITO used as the wiring circuit is at most 100.
The angle may be about 0 °, which is suitable for producing a fine pattern. At most 300μ for thick film on ceramics
The circuit has an m pitch, and the printed circuit board using a copper foil has a fineness of 160 μm. On the other hand, IT on glass
O can have a pitch of 20 μm, and has a precision of a fine line circuit next to a semiconductor. Here, the circuit / gap is generally 1: 1. In other words, the use of this fine wire circuit enables a significant reduction in the size of the substrate. Although it depends on the method of connecting the IC chip to the ITO or gold plating on the glass substrate and the alignment device, it can sufficiently cope with the bump pitch of the IC chip and has a good yield.

FIG. 1 is a schematic cross-sectional view for explaining a process of connecting an IC chip and a wiring circuit on a glass substrate, in which bumps are fused by heat, and FIG. 2 is an anisotropic conductive connection. FIG. 3 is a schematic cross-sectional view showing a structure using a film. In addition to these connection methods, conductive paste, wire bonding, heat fusion, and the like can be mentioned, but any method can be applied based on the heat resistance, rigidity, and hardness of the glass body. However, the conductive paste has a problem of the transfer rate to the bumps, and is difficult to adapt due to the fineness between the bumps. In addition, wire bonding has the disadvantage of taking up too much space. The heat fusion method is most excellent in terms of space and connection reliability, but has a disadvantage of increasing cost, and connection by an anisotropic conductive film is most economical. On the other hand, the glass substrate semiconductor device of the present invention can check the function as a chip at this stage, can be repaired by using an anisotropic conductive film, and even in the case of connection by another method, the substrate stage is inexpensive. It is economical because it can be manufactured. Of course, IC
After mounting the chip, a sealing resin may be used for protection.

FIG. 3 is a schematic sectional view for explaining the anisotropic conductive film. The conductive particles are dispersed in the adhesive resin, and the electrodes on the glass substrate and the electrode circuits on the motherboard substrate can be electrically connected by pressing or heating and pressing the anisotropic conductive film. become. The anisotropic conductive film used here can be in a temporarily fixed state only for taking a connection by selecting the conditions of pressing or heating, so that the flat cable can be used. It can be easily removed from glass semiconductor elements and motherboard substrates,
Residual resin can be easily removed with a solvent or the like, and repair becomes possible. At this time, the mounting area of the motherboard can be minimized by keeping the flat cable in a minimum form for mounting.

The anisotropic conductive film used here is obtained by dispersing particles obtained by applying a metal coating on the surface of a core material made of a polymer to an adhesive resin having an insulating property. Even in the case of a core material, more reliable connection can be achieved by using a material whose surface is coated with a low melting point metal. Further, if the metal film is the same as the bump material on the wiring circuit or IC chip, the connection reliability is further improved. The core material composed of the polymer used here is not limited in composition and the like, for example, in a polymer such as an epoxy resin, a urethane resin, a melamine resin, a phenol resin, an acrylic resin, a polyester resin, a styrene resin, and a styrene-butadiene copolymer. May be used alone or in combination of two or more.

It is needless to say that it is better to select an optimum particle size, particle size distribution and blending amount for any of the particles according to the adherend to be connected. For example, in general, the particle diameter is about 0.5 to 50 μm, and especially in connection of a fine pitch circuit having a pitch of 0.2 mm or less, 3 to 10 μm.
A degree is desirable. Needless to say, it is preferable that the particle size distribution is sharp, and it is more preferable that the average particle size is within ± 20%. The compounding amount for the adhesive resin is
It is more preferably 0.1 to 10% by volume. If the particle size is smaller than this, or if the compounding amount is small, the connection area will be small and the connection reliability will be reduced. Conversely, if the particle size is large or the compounding amount is large, the insulation between adjacent terminals will be reduced. And the short circuit may occur.

The type of metal coating used in the present invention is not particularly limited. As the composition, conventionally used in this field, for example, gold, silver, copper,
Examples thereof include zinc, tin, lead, indium, palladium, and nickel. These may be used alone or in combination of two or more. Of course, it is needless to say that it is better to select the metal coating in consideration of the adhesion to the polymer core material serving as the central nucleus. The thickness of the metal coating is not particularly limited. However, if it is too thin, the conductivity becomes unstable, and if it is too thick, particle deformation becomes difficult or aggregation occurs, so that the thickness is preferably about 0.01 to 1 μm. It is needless to say that it is desirable to be uniformly coated by electroless plating or the like.

The adhesive resin of the anisotropic conductive film used in the present invention is not particularly limited, such as thermoplasticity, thermosetting property, and photocuring property, as long as it exhibits insulating properties and has practical heat resistance. For example, styrene butadiene resin, styrene resin,
Ethylene vinyl acetate resin, acrylonitrile butadiene rubber, silicone resin, acrylic resin, epoxy resin, urethane resin, phenolic resin, amide resin, acrylate resin such as epoxy methacrylate resin, etc., and two or more as required May be combined. Further, a tackifier, a crosslinking agent, an antioxidant, a coupling agent and the like may be used in combination.

FIG. 4 is a schematic cross-sectional view for explaining a step of mounting a semiconductor element on which an IC chip is mounted on a motherboard. Since the glass substrate, which is a feature of the present invention, is used, the above-described resin can be used, but an ultraviolet-curable adhesive resin is preferably used for temporary fixing. This is to simplify the mounting process and to further enable micro alignment of the semiconductor element. After the temporary fixation, the electrical connection between the glass substrate semiconductor element and the motherboard is connected by a flat cable in which a copper circuit is formed on a polyimide substrate, and then each is permanently fixed with a main curing resin. If a highly reliable ultraviolet curable resin can be used, the adhesive resin can be unified.

The glass substrate used in the present invention is not particularly limited as long as a conductive circuit can be formed on the surface. However, it is preferable that it can be obtained at a low price because it is widely sold as a transparent electrode for liquid crystal. It is most preferable that the material of the electrode on the glass side corresponding to the IC chip electrode is the same material, but it can be used if the work function is as close as possible. In addition, from the viewpoints of easy handling, packaging after inspection, and the like, it is desirable to use a general hard glass type having a small amount of Na ions represented by borosilicate glass. When using the lowest cost soda glass, it is desirable to provide a silicon oxide layer. or,
If necessary, circuits may be formed on both sides of the substrate. or,
A glass may be coated with a heat-resistant resin or a heat-resistant film may be adhered to the glass for reasons such as improvement in adhesion.

The IC chip in the present invention is not particularly limited, and can be applied to all general IC chips in which aluminum wiring is formed on a silicon wafer.
There is no problem even if the electrode terminals of the chip do not have bumps, but it is desirable to have bumps of uniform height formed of solder or gold in order to improve the reliability of connection. IC
The mounting method of the chip on the glass substrate is also face-up,
The face-down method may be used, but the face-down method is more suitable for reducing the size. Further, when a lead frame type is required for mounting reasons, the glass semiconductor element according to the present invention may be electrically connected to the lead frame by a method such as bump connection and then molded with a semiconductor sealing resin.

FIG. 5 is a schematic diagram showing a wiring circuit on a glass substrate. In the case of a conventional printed wiring board having a 35 μm copper foil, only a circuit having a pitch of 200 μm can be formed. Therefore, it is usual to form a radiation wiring in consideration of workability. On the other hand, according to the present invention, the pitch can be up to 20 μm, so that the wiring can be formed linearly in both the vertical and horizontal directions, and the wiring distance can be shortened. This is effective not only in miniaturization but also in measures against signal delay. Here, since it can be formed in a straight line, it is possible to temporarily fix it with an ultraviolet-curing resin using the wiring circuit release part generated at the corner of the board, and it is possible to simplify the process by finalizing the curing after mounting is there. Also, in order to increase the mounting efficiency of the motherboard, the wiring circuit release portion of the glass substrate may be cut except for the portion necessary for temporary fixing.

[0024]

EXAMPLE As a glass substrate, an IT having a sheet resistance of 10Ω was placed on a Corning 7059 glass plate having a thickness of 1.1 mm.
Using a substrate on which O was formed, a pad electrode portion electrically connected to a pad of an IC chip, a wiring circuit portion from the electrode, and a connector electrode portion at the last end of the circuit were all formed with a line width of 50 μm by photolithography. Electroless nickel plating 1 μm was formed as a base metal on the formed ITO wiring circuit, and electroless gold plating 1 μm was further formed to improve conductivity. At this time, the sheet resistance was 0.03Ω. Next, the glass size was cut into a 16 mm square, and a 10 mm square IC chip was formed on the obtained glass substrate by using a SZF-3013 anisotropic conductive film manufactured by Sumitomo Bakelite Co., Ltd. by a thermocompression bonding method with a glass electrode and an IC chip bump. Was electrically connected. Next, a connector electrode portion around the glass substrate and a polyimide-based flat cable (circuit line width 50μ)
m, gold-plated product) and SZF manufactured by Sumitomo Bakelite Co., Ltd.
A similar electrical connection was made using a -3010 anisotropic conductive film.

Next, a light-curable resin LCR0305E manufactured by Toa Gosei Co., Ltd. was applied to the wiring circuit opening (the back surface of the wiring circuit forming surface) at the corner of the glass substrate and mounted on a motherboard. However, a two-part thermosetting resin ERS-2100 / 2810 manufactured by Sumitomo Bakelite Co., Ltd. was applied to the motherboard at the center of the mounting portion of the glass substrate semiconductor element. After the alignment, the LCR0305E applied to the wiring circuit release portion was cured using a spot ultraviolet irradiation device to fix the glass substrate semiconductor element. Next, FIG.
Finally, the flat cable and the motherboard were electrically connected as shown in FIG. The connection was performed in the same manner using SZF-3010 anisotropic conductive film manufactured by Sumitomo Bakelite Co., Ltd. The connection portion on the motherboard side was gold plated and had a circuit width of 50 μm. Furthermore,
In order to finally fix the glass substrate element, a heat treatment was performed at 100 ° C. for 2 hours in a drying furnace, so that the glass substrate element was completely cured.

The obtained glass substrate semiconductor device is 16 mm
The area can be greatly reduced compared to the 35 mm square of the conventional PGA and BGA semiconductor elements. In addition, 85 ° C, 85% R. H. A drive test was performed after the treatment for 1000 hours. The same output waveform as before the treatment was obtained, and the electrical connection reliability was good. Further, the processing yield on the glass substrate is 98%, and the wiring processing is not easy.
The processing yield of PGA with a circuit width of μm was improved as compared with 92%.

[0027]

According to the present invention, it is possible to use a glass substrate, which is a general-purpose material, to thin a circuit by forming a thin film without using an organic multilayer substrate or a high-grade multilayer substrate made of ceramics, and to employ the substrate as an IC chip mounting substrate. As a result, the price and size of the semiconductor device were significantly reduced. This enabled high-density mounting of the motherboard. Further, since the inspection can be performed without forming the pins and the ball bumps, the total cost can be further reduced.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view for explaining a glass substrate semiconductor device according to the present invention.

FIG. 2 is a schematic cross-sectional view for explaining a method for connecting an IC chip and a glass substrate circuit according to the present invention.

FIG. 3 is a schematic cross-sectional view for explaining an anisotropic conductive film in the present invention.

FIG. 4 is a schematic cross-sectional view for explaining a method of mounting a semiconductor element on a motherboard according to the present invention.

FIG. 5 is a schematic front view for explaining a wiring circuit on a glass substrate.

[Explanation of symbols]

 1. IC chip 2. Bump 3. Wiring circuit 4. Glass substrate 5. Anisotropic conductive film 6. Sealing resin 7. Adhesive resin 8. Conductive particles 9. Flat cable 10. UV curable resin 11. Motherboard 12. Pad electrode section 13. Connector electrode section 14. Wiring circuit release unit 15. IC chip mounting section 16. Wiring circuit section

Claims (7)

[Claims] 1. A glass substrate semiconductor device comprising: a wiring circuit formed on a glass substrate; and an IC chip mounted on the wiring circuit. 2. The wiring circuit on the glass substrate comprises In and Sn.
2. The glass substrate semiconductor device according to claim 1, comprising a composite oxide of 3. The wiring circuit on the glass substrate is composed of In and Sn.
The glass substrate semiconductor element according to claim 1, wherein a metal capable of thermocompression bonding, such as In or Au, is wet-plated on the composite oxide of (1). 4. The glass substrate semiconductor device according to claim 1, wherein all of the wiring circuits on the glass substrate or a part of the electrical connection portion is made of a metal capable of thermocompression bonding, such as In or Au. 5. The bonding circuit according to claim 1, wherein all of the wiring circuits on the glass substrate or a part of the electrical bonding portion is made of the same material as the bump material of the bonding portion on the IC chip.
The glass substrate semiconductor element as described in the above. 6. A high-density mounting substrate, wherein the glass substrate semiconductor device according to claim 1 is electrically connected to a circuit formed on a surface of a printed circuit board via an anisotropic conductive film and a flat cable. 7. A method for manufacturing a high-density mounting substrate, comprising using an ultraviolet-curable adhesive resin for temporary fixing when mounting the glass substrate semiconductor element according to claim 1 on a printed circuit board.