JPH10114425A - Boat - Google Patents

Boat

Info

Publication number
JPH10114425A
JPH10114425A JP27085496A JP27085496A JPH10114425A JP H10114425 A JPH10114425 A JP H10114425A JP 27085496 A JP27085496 A JP 27085496A JP 27085496 A JP27085496 A JP 27085496A JP H10114425 A JPH10114425 A JP H10114425A
Authority
JP
Japan
Prior art keywords
boat
semiconductor wafer
groove
supporting
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27085496A
Other languages
Japanese (ja)
Inventor
Eiji Hosaka
英二 保坂
Hironobu Miya
博信 宮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kokusai Electric Corp
Original Assignee
Kokusai Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kokusai Electric Corp filed Critical Kokusai Electric Corp
Priority to JP27085496A priority Critical patent/JPH10114425A/en
Publication of JPH10114425A publication Critical patent/JPH10114425A/en
Pending legal-status Critical Current

Links

Landscapes

  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

PROBLEM TO BE SOLVED: To prevent a transfer failure when a semiconductor wafer is conveyed out from a boat by arranging a wafer supporting block supporting the semiconductor wafer via point contact on a semiconductor wafer supporting face in a groove of a boat supporting column arranged on the inside face of the boat. SOLUTION: On a semiconductor wafer 1 supporting face in a groove 62 of a boat supporting column 61 arranged on the inside face of a boat, a wafer supporting block 64 supporting a semiconductor wafer 1 via point contact is arranged. The wafer supporting block 64 is arranged in the position covered by the semiconductor wafer 1, even when a thick film such as a CVD film 63 and the like is formed, a transfer failure, which is caused when the CVD films 63 are accumulated in the clearance and the semiconductor wafer 1 adheres to the groove 62, can be prevented because there is a sufficient clearance between the semiconductor wafer 1 and the groove 62.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体製造装置に
おける半導体ウェーハの反応炉への搬入と反応炉からの
搬出に使用するボートに関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a boat used for carrying semiconductor wafers into and out of a reactor in a semiconductor manufacturing apparatus.

【0002】[0002]

【従来の技術】図4は、縦型炉を有する半導体製造装置
の概略を示す斜視図である。
2. Description of the Related Art FIG. 4 is a perspective view schematically showing a semiconductor manufacturing apparatus having a vertical furnace.

【0003】この装置において処理を施す半導体ウェー
ハ1は、ウェーハ授受装置2に搬入され、カセットスト
ッカ3に収納された後、移載機4を介してボート6に搭
載される。半導体ウェーハ1を搭載したボート6は、ボ
ートエレベータ5によって反応炉7内へ搬入され、反応
炉7内において半導体ウェーハ1に所定の処理が施され
る。
[0005] A semiconductor wafer 1 to be processed in this apparatus is carried into a wafer transfer device 2, stored in a cassette stocker 3, and then mounted on a boat 6 via a transfer machine 4. The boat 6 on which the semiconductor wafer 1 is mounted is carried into the reaction furnace 7 by the boat elevator 5, and the semiconductor wafer 1 is subjected to a predetermined process in the reaction furnace 7.

【0004】図5は、半導体ウェーハ1を搭載した従来
のボート6の詳細を示す部分断面図である。
FIG. 5 is a partial sectional view showing details of a conventional boat 6 on which the semiconductor wafer 1 is mounted.

【0005】図に示すように、従来のボート6の内側面
にはボート支柱61が設けられており、該ボート支柱6
1には、半導体ウェーハ1の端部を支持するための、支
持面がボート支柱61の長手方向に直角で互いに平行な
複数の溝62が設けられている。処理を施す半導体ウェ
ーハ1は、端部を溝62に挿入してボート6に搭載し、
反応炉7内へ搬入して、所定の処理を施す。
[0005] As shown in the figure, a boat support 61 is provided on the inner surface of a conventional boat 6.
1, a plurality of grooves 62 for supporting the ends of the semiconductor wafer 1 and having a support surface perpendicular to the longitudinal direction of the boat support 61 and parallel to each other are provided. The semiconductor wafer 1 to be processed is mounted on the boat 6 with its end inserted into the groove 62,
It is carried into the reaction furnace 7 and subjected to predetermined processing.

【0006】図6は、このようなボート6に半導体ウェ
ーハ1を搭載して反応炉7内へ搬入し、CVD(化学気
相蒸着)膜63等の厚膜(厚さ100Å以上の多結晶シ
リコン膜等)を成膜した場合の状態を示す図である。図
に示すように、半導体ウェーハ1と溝62の支持面との
接触面積は広く、また、半導体ウェーハ1と溝62との
隙間にもCVD膜63が堆積する。
FIG. 6 shows that a semiconductor wafer 1 is mounted on such a boat 6, loaded into a reaction furnace 7, and a thick film such as a CVD (chemical vapor deposition) film 63 (polycrystalline silicon having a thickness of 100 ° or more). FIG. 4 is a diagram showing a state in which a film or the like is formed. As shown in the figure, the contact area between the semiconductor wafer 1 and the support surface of the groove 62 is large, and the CVD film 63 is deposited in the gap between the semiconductor wafer 1 and the groove 62.

【0007】[0007]

【発明が解決しようとする課題】上記従来のボート6に
おいては、半導体ウェーハ1と溝62との隙間にもCV
D膜63が堆積し、半導体ウェーハ1と溝62の支持面
との接触面積も広いので、半導体ウェーハ1と溝62と
が接着状態となり、ボート6を反応炉7から搬出した
後、半導体ウェーハ1をボート6から取り出すことが困
難になるという問題があった。
In the above-mentioned conventional boat 6, the clearance between the semiconductor wafer 1 and the groove 62 is also CV.
Since the D film 63 is deposited and the contact area between the semiconductor wafer 1 and the support surface of the groove 62 is large, the semiconductor wafer 1 and the groove 62 are in a bonded state, and after the boat 6 is carried out of the reaction furnace 7, From the boat 6 is difficult.

【0008】本発明は上述の課題を解決するためになさ
れたもので、半導体ウェーハを取り出すことが容易なボ
ートを提供することを目的とする。
SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has as its object to provide a boat from which semiconductor wafers can be easily taken out.

【0009】[0009]

【課題を解決するための手段】この目的を達成するた
め、本発明においては、ボートの内側面に設けられたボ
ート支柱の溝の半導体ウェーハ支持面に、半導体ウェー
ハを点接触で支持するウェーハ支持ブロックを設ける。
According to the present invention, there is provided a wafer support for supporting a semiconductor wafer in point contact with a semiconductor wafer support surface of a groove of a boat support provided on an inner surface of a boat. Blocks are provided.

【0010】[0010]

【発明の実施の形態】図1は本発明に係るボートを示す
部分断面図、図2は図1A部の拡大図、図3は図2のB
−B断面図である。
FIG. 1 is a partial cross-sectional view showing a boat according to the present invention, FIG. 2 is an enlarged view of FIG. 1A, and FIG.
It is -B sectional drawing.

【0011】図に示すように、本発明に係るボートにお
いては、ボート支柱61の溝62の半導体ウェーハ1支
持面に、半導体ウェーハ1を点接触で支持するウェーハ
支持ブロック64を設ける。
As shown in the figure, in the boat according to the present invention, a wafer support block 64 for supporting the semiconductor wafer 1 in point contact is provided on the semiconductor wafer 1 support surface of the groove 62 of the boat support 61.

【0012】このような、溝62の支持面にウェーハ支
持ブロック64を設けたボートにおいては、図3に示す
ように、ウェーハ支持ブロック64は半導体ウェーハ1
によって覆われた位置にあるので、CVD等を施して
も、半導体ウェーハ1はウェーハ支持ブロック64によ
って点接触の状態が保たれる。また、図2に示すよう
に、CVD膜63等の厚膜を成膜した場合にも、半導体
ウェーハ1と溝62との間には充分な隙間が存在するの
で、隙間にCVD膜63が堆積して半導体ウェーハ1と
溝62とが接着状態となり取り出しにくくなるというこ
とはない。
In such a boat in which the wafer support block 64 is provided on the support surface of the groove 62, as shown in FIG.
Since the semiconductor wafer 1 is located at a position covered by the semiconductor wafer 1, even if CVD or the like is performed, a point contact state of the semiconductor wafer 1 is maintained by the wafer support block 64. Also, as shown in FIG. 2, even when a thick film such as the CVD film 63 is formed, a sufficient gap exists between the semiconductor wafer 1 and the groove 62, so that the CVD film 63 is deposited in the gap. As a result, the semiconductor wafer 1 and the groove 62 are not bonded to each other and become difficult to take out.

【0013】[0013]

【発明の効果】以上説明したように、本発明に係るボー
トにおいては、半導体ウェーハとボートのボート支柱の
溝とが接着状態となることがないので、半導体ウェーハ
をボートから搬出する際の移載不具合を防止することが
可能となる。このため、半導体ウェーハ及びボートの破
損が防止でき、ボートの整備に要する工数の低減が可能
となり、半導体製造工程の効率と経済性とを向上するこ
とが可能となるという効果がある。
As described above, in the boat according to the present invention, since the semiconductor wafer and the groove of the boat support of the boat do not adhere to each other, the semiconductor wafer is transferred when the semiconductor wafer is unloaded from the boat. Failures can be prevented. Therefore, damage to the semiconductor wafer and the boat can be prevented, the number of steps required for maintenance of the boat can be reduced, and the efficiency and economy of the semiconductor manufacturing process can be improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係るボートを示す部分断面図である。FIG. 1 is a partial sectional view showing a boat according to the present invention.

【図2】図1A部の拡大図である。FIG. 2 is an enlarged view of a portion shown in FIG. 1A.

【図3】図2のB−B断面図である。FIG. 3 is a sectional view taken along line BB of FIG. 2;

【図4】縦型炉を有する半導体製造装置の概略を示す斜
視図である。
FIG. 4 is a perspective view schematically showing a semiconductor manufacturing apparatus having a vertical furnace.

【図5】半導体ウェーハを搭載した従来のボートの詳細
を示す部分断面図である。
FIG. 5 is a partial cross-sectional view showing details of a conventional boat on which a semiconductor wafer is mounted.

【図6】従来のボートを用いて半導体ウェーハにCVD
膜等の厚膜を成膜した場合の状態を示す図である。
FIG. 6 shows CVD on a semiconductor wafer using a conventional boat.
It is a figure which shows the state at the time of forming a thick film, such as a film.

【符号の説明】[Explanation of symbols]

1…半導体ウェーハ 2…ウェーハ授受装置 3…カセットストッカ 4…移載機 5…ボートエレベータ 6…ボート 7…反応炉 61…ボート支柱 62…溝 63…CVD膜 64…ウェーハ支持ブロック REFERENCE SIGNS LIST 1 semiconductor wafer 2 wafer transfer device 3 cassette stocker 4 transfer machine 5 boat elevator 6 boat 7 reactor reactor 61 boat support 62 groove 63 CVD film 64 wafer support block

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】半導体製造装置における半導体ウェーハの
反応炉への搬入と反応炉からの搬出に使用するボートに
おいて、上記ボートの内側面に設けられたボート支柱の
溝の半導体ウェーハ支持面に、上記半導体ウェーハを点
接触で支持するウェーハ支持ブロックを設けることを特
徴とするボート。
1. A boat used for carrying semiconductor wafers into and out of a reactor in a semiconductor manufacturing apparatus, wherein the semiconductor wafer support surface of a groove of a boat support provided on an inner surface of the boat has A boat provided with a wafer support block for supporting a semiconductor wafer by point contact.
JP27085496A 1996-10-14 1996-10-14 Boat Pending JPH10114425A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27085496A JPH10114425A (en) 1996-10-14 1996-10-14 Boat

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27085496A JPH10114425A (en) 1996-10-14 1996-10-14 Boat

Publications (1)

Publication Number Publication Date
JPH10114425A true JPH10114425A (en) 1998-05-06

Family

ID=17491912

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27085496A Pending JPH10114425A (en) 1996-10-14 1996-10-14 Boat

Country Status (1)

Country Link
JP (1) JPH10114425A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004112113A1 (en) * 2003-06-10 2004-12-23 Shin-Etsu Handotai Co., Ltd. Semiconductor wafer heat-treatment method and vertical boat for heat treatment

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004112113A1 (en) * 2003-06-10 2004-12-23 Shin-Etsu Handotai Co., Ltd. Semiconductor wafer heat-treatment method and vertical boat for heat treatment

Similar Documents

Publication Publication Date Title
KR100847888B1 (en) Apparatus for fabricating semiconductor device
US8354001B2 (en) Processing thin wafers
US20020066412A1 (en) Wafer carrier and semiconductor apparatus for processing a semiconductor substrate
JPH10135302A (en) Semiconductor device manufacturing line
US4802842A (en) Apparatus for manufacturing semiconductor device
JPH10114425A (en) Boat
JPH11238785A (en) Substrate-treating device and method therefor
JP4229497B2 (en) Substrate processing apparatus and substrate processing method
JPH0661328A (en) Semiconductor wafer transfer system
KR100566697B1 (en) Multi-chamber system for fabricating semiconductor devices and method of fabricating semiconductor devices using thereof
KR19980043533A (en) Manufacturing equipment for semiconductor thin film formation
JP2740849B2 (en) Vertical heat treatment equipment
JP2683673B2 (en) Vertical heat treatment equipment
JPH10107117A (en) Substrate treating device
JPH10152226A (en) Boat
JP3156398B2 (en) Thin film forming equipment
JPH0646622B2 (en) Method for manufacturing silicon wafer for semiconductor substrate
JPH08130190A (en) Wafer vertically mounted type vertical oven
JPH10107116A (en) Substrate treating device
JPH10301U (en) Wafer holder
JP3244492B2 (en) Vertical CVD equipment
JPS6390146A (en) Transfer system for substrate
JPH11354459A (en) Semiconductor manufacturing device
JPH01230250A (en) Cvd apparatus
KR100196441B1 (en) Wafer convey plate