JPH11354459A - Semiconductor manufacturing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the separation of the exposed surface layer of a quartz jig in a processing chamber and the contamination of a processed wafer, by making bumps and dips on the exposed surface of the quartz jig exposed inside the processing chamber. SOLUTION: In a vertical low pressure CVD device, the exposed surface 21a of quartz jigs 12 such as a quartz plate 12 for heat insulation, a quartz board 13, and an inner tube 14 has bumps and dips. That is, a mask pattern is formed on the exposed surface 21a of the quartz jig 21, and the exposed surface 21a of the quartz jig 21 is etched over the mask pattern using a mixed liquid of hydrofluoric acid and ammonium fluoride to smooth an etched surface layer without damage and to smoothly taper etched side walls. Then, the mask pattern is removed. In this manner, bumps and dips are made on the exposed surface 21a of the quarts jig 21.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor manufacturing apparatus, and more particularly, to a semiconductor manufacturing apparatus having a quartz jig exposed inside a processing chamber for processing a wafer.

[0002]

2. Description of the Related Art Some semiconductor manufacturing apparatuses such as a film forming apparatus and an etching apparatus used for manufacturing a semiconductor device have a quartz jig. For example, vertical type reduced pressure CVD
In a (Chemical Vapor Deposition) apparatus, an inner tube made of quartz is erected in a processing chamber made of quartz, and a quartz plate for heat insulation is arranged on a bottom surface of the inner tube. Then, a quartz boat holding a semiconductor wafer to be processed is arranged on the heat insulating quartz plate. In the semiconductor manufacturing apparatus having such a configuration, the surface of each quartz jig is flattened.

[0003]

However, in a semiconductor manufacturing apparatus, a deposited film is formed on each exposed surface in a processing chamber by repeating the number of times of processing. For example,
In the vertical type reduced pressure CVD apparatus, a deposited film of the same material as a film formed by CVD is formed on an exposed surface in a processing chamber. Then, as shown in FIG. 3A, in a semiconductor manufacturing apparatus provided with a quartz jig, the exposed surface 2 of the quartz jig 1
When a process involving a temperature change such as heating and cooling is repeated while the deposited film 3 is formed on the quartz jig 1 and the deposited film 3
Excessive thermal stress (indicated by an arrow in the figure) is applied to the exposed surface layer of the quartz jig 1 due to the difference in expansion coefficient between the micro-cracks 4 and the exposed surface layer of the quartz jig 1. FIG.
As shown in (2), when a process involving a temperature change is further repeated in this state, the microcracks of the quartz jig 1 are enlarged, and the quartz jig 1 is peeled off from the exposed surface layer of the quartz jig 1 with the deposited film 3 attached. Occurs. The peeled quartz is diffused as dust 5 into the processing chamber and adheres to the surface of the semiconductor wafer being processed, causing a defect in a semiconductor device using the semiconductor wafer and causing a reduction in yield.

For this reason, in a semiconductor manufacturing apparatus having a quartz jig exposed in the processing chamber, it is necessary to replace the quartz jig before the above-mentioned microcracks occur. However, the time at which microcracks occur differs depending on the film quality of the deposited film, so that it is difficult to determine the replacement time of the quartz jig. Further, the quartz jig in which the microcrack has occurred cannot be regenerated and is disposed of, so that the maintenance cost of the apparatus is such.

Accordingly, an object of the present invention is to provide a semiconductor manufacturing apparatus in which an exposed surface layer of a quartz jig is hardly peeled off in a processing chamber, and contamination of a processed wafer can be prevented and maintenance cost can be reduced. .

[0006]

According to the present invention, there is provided a semiconductor manufacturing apparatus provided with a quartz jig exposed inside a processing chamber, wherein the quartz jig exposed inside the processing chamber is provided. It is characterized by having irregularities on the exposed surface.

[0007] In the semiconductor manufacturing apparatus having the above structure, the exposed surface of the quartz jig with respect to the inside of the processing chamber is provided with irregularities. Therefore, if a deposited film is formed on the exposed surface, the deposited film and the quartz jig are formed. Thermal stress applied to the exposed surface layer loses continuity between the concave portion and the convex portion, and easily escapes to the outside of the deposited film. Therefore, thermal stress applied to the exposed surface layer of the quartz jig is reduced, and microcracks are less likely to occur in the exposed surface layer of the quartz jig.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment in which a semiconductor manufacturing apparatus of the present invention is applied to a vertical reduced pressure CVD apparatus will be described below with reference to the drawings.

[0009] As shown in FIG.
The apparatus includes a gantry 11, a heat insulating quartz plate 12, and a quartz boat 1.
3. An inner tube 14 made of quartz and a processing chamber 15 made of quartz are provided.

The gantry 11 incorporates a gas introduction mechanism, an exhaust mechanism, a control mechanism thereof, and the like, not shown here, and various functional means necessary for controlling the processing of the semiconductor manufacturing apparatus. In addition, the heat insulating quartz plate 12
Is the gantry 1 with the upper surface exposed in the processing chamber 15.
1. The upper surface of the heat insulating quartz plate 12 becomes one of the exposed surfaces exposed inside the processing chamber 15. Further, the quartz boat 13 holds about 100 wafers 16 in a state where they are stacked in the same direction at predetermined intervals, and a quartz for heat insulation is used so that the held wafers 16 are kept substantially horizontal. It is erected above the plate 12. The surface of the quartz boat 13 exposed in the processing chamber 15 is one of the exposed surfaces.

Further, the inner tube 14 is erected on the gantry 11 so as to surround the periphery of the quartz boat 13. The inner wall surface of the inner tube 14 is one of the exposed surfaces exposed inside the processing chamber 15. And
The processing chamber 15 has a bell-jar shape, and stands upright on the gantry 11 so as to cover the inner tube 14.

In the vertical type reduced-pressure CVD apparatus having the above-described structure, the quartz plate for heat insulation 12, the quartz boat 13 and the inner tube 14 are quartz jigs exposed inside the processing chamber 15. The exposed surface exposed inside the processing chamber 15 is as follows:
These are the above-mentioned respective surfaces. Then, as shown in FIG. 1 (2), the exposed surface 21a of each of the quartz jigs 21 (ie, the insulating quartz plate 12, the quartz boat 13, and the inner tube 14) is subjected to an unevenness treatment.
These exposed surfaces 21a are in a state where irregularities are provided.

Hereinafter, an example of the above concavo-convex processing will be described with reference to FIG. First, as shown in FIG. 2A, a mask pattern 22 is formed on an exposed surface 21 a of a quartz jig 21.
To form The mask pattern 22 is made of, for example, a resist formed by a lithography technique.

Next, as shown in FIG. 2B, the exposed surface 21a of the quartz jig 21 is etched from above the mask pattern 22. Here, wet etching is performed using a mixed solution of hydrofluoric acid and ammonium fluoride as an etching solution. As a result, the etching surface layer is smoothened without damaging it, and the etching side wall is formed into a gentle taper shape.

After that, the mask pattern 22 is removed, and as a result, as shown in FIG. 2 (3), irregularities are formed on the exposed surface 21a of the quartz jig 21. Partial processing is possible in such unevenness processing.

As described above, as shown in FIGS. 1A and 1B, the quartz jig exposed to the inside of the processing chamber 15 (ie, the quartz plate for heat insulation 12, the quartz boat 13 and the inner tube 14). In the vertical type low pressure CVD apparatus provided with 21), the exposed surface 21a of each of the quartz jigs 21 exposed inside the processing chamber 15 is provided with irregularities. Such a vertical reduced-pressure CVD apparatus does not require a large-scale facility, and can be manufactured using an existing apparatus.

In the vertical type low-pressure CVD apparatus having the above-described structure, a deposited film 31 of the same type as the film formed on the wafer 16 by this apparatus is formed on the exposed surface 21a of the quartz jig 21. Then, in this state, when a process involving a temperature change such as heating and cooling is repeated, the quartz jig 21 and the deposited film 31 are removed.
Due to the difference in expansion coefficient from the above, thermal stress (indicated by an arrow in the figure) is applied to the exposed surface layer of the quartz jig 21. However, since the thermal stress is released by the unevenness provided on the exposed surface 21a, an excessive thermal stress is not applied to the exposed surface layer of the quartz jig 21. For this reason, even if a process involving a temperature change is repeated in the processing chamber 15, microcracks due to thermal stress on the exposed surface layer of the quartz jig 21 are less likely to occur. Therefore, generation of dust due to peeling of the exposed surface layer of the quartz jig 21 is prevented, and contamination of the processed wafer can be prevented. Further, the life of each quartz jig 21 is prolonged, and the maintenance cost of the apparatus can be reduced.

The irregularities provided on the exposed surface 21a of the quartz jig 21 are appropriately selected by performing an evaluation test so that microcracks are hardly generated on the exposed surface layer of the quartz jig 21. , Width, height and shape.

In the wet etching in the concavo-convex treatment for forming the concavities and convexities on the exposed surface 21a, the size of the exposed surface on which the concavo-convex treatment is performed is adjusted so that the etching proceeds uniformly over the entire exposed surface 21a of the quartz jig 21. The intervals and widths of the irregularities are changed according to the shape. For example, the interval and width of the unevenness on the concave exposed surface 21a are made larger than the interval and width of the unevenness on the planar exposed surface 21a. As a result, the effect of alleviating the thermal stress is also equalized.

In the above embodiment, no irregularities are provided on the inner peripheral surface of the processing chamber 15 and the outer peripheral surface of the inner tube 14 where the possibility of forming a deposited film is small. However, these surfaces may also be provided with irregularities. With such a configuration, it is possible to more reliably prevent the exposed surface layer of the quartz jig from peeling off.

Further, in the above embodiment, the embodiment in which the present invention is applied to the vertical type reduced pressure CVD apparatus has been described. However, the present invention can be widely applied to a semiconductor manufacturing apparatus including a quartz jig exposed inside a processing chamber, such as a vertical diffusion apparatus, a dry etching apparatus, and an apparatus for performing plasma processing. When applied to a vertical diffusion device, the exposed surface of a quartz jig similar to the above embodiment is provided with irregularities. When the present invention is applied to a dry etching apparatus, the processing chamber is made of a quartz jig, and the inner peripheral wall thereof is formed as an exposed surface to provide irregularities.

[0022]

As described above, according to the semiconductor manufacturing apparatus of the present invention, the unevenness is provided on the exposed surface of the quartz jig with respect to the inside of the processing chamber, so that the deposited film formed on the exposed surface and the quartz It is possible to reduce thermal stress applied to the exposed surface layer of the jig and prevent the exposed surface layer of the quartz jig from peeling off. As a result, it is possible to prevent contamination of the processing wafer due to generation of dust in the semiconductor manufacturing apparatus, to extend the life of the quartz jig, and to reduce the maintenance cost.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a vertical reduced pressure CVD apparatus to which the present invention is applied.

FIG. 2 is a cross-sectional process diagram for explaining a method of unevenness treatment.

FIG. 3 is a cross-sectional view for explaining a problem of a conventional technique.

[Explanation of symbols]

12: Quartz plate for heat insulation (quartz jig), 13: Quartz boat (quartz jig), 14: Inner tube (quartz jig),
15: Processing chamber, 21: Quartz jig, 21a: Exposed surface

Claims (1)

[Claims] 1. A semiconductor manufacturing apparatus provided with a processing chamber and a quartz jig exposed inside the processing chamber, wherein the quartz jig is provided with irregularities on an exposed surface exposed inside the processing chamber. A semiconductor manufacturing apparatus characterized by the above-mentioned.