JPH10107095A - Mounting structure and repairing method for semiconductor device - Google Patents

Mounting structure and repairing method for semiconductor device

Info

Publication number
JPH10107095A
JPH10107095A JP26038896A JP26038896A JPH10107095A JP H10107095 A JPH10107095 A JP H10107095A JP 26038896 A JP26038896 A JP 26038896A JP 26038896 A JP26038896 A JP 26038896A JP H10107095 A JPH10107095 A JP H10107095A
Authority
JP
Japan
Prior art keywords
semiconductor device
resin
semiconductor
circuit board
mounting structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP26038896A
Other languages
Japanese (ja)
Inventor
Masaki Watanabe
正樹 渡辺
Hirotoshi Watanabe
寛敏 渡辺
Taiji Kikuchi
泰治 菊池
Takeshi Meguro
赳 目黒
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP26038896A priority Critical patent/JPH10107095A/en
Publication of JPH10107095A publication Critical patent/JPH10107095A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/225Correcting or repairing of printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/284Applying non-metallic protective coatings for encapsulating mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3436Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components

Landscapes

  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To repair in mounting of a semiconductor element and a semiconductor device. SOLUTION: At least one of the part between a semiconductor element 2 and a semiconductor carrier 7 and the part between a semiconductor device 1 and a circuit substrate 12 is constituted by employing a structure in which the part is sealed with a thermosetting resin whose tensile shear strength at 200 deg.C or above is 20% or less of the strength at room temperature. In this case, first, the resin 11 is heated for a specified time with hot air at a specified temperature. Then the semiconductor element 2 or the semiconductor device 1 is dismounted. After this the resin 11 remaining on the semiconductor carrier 7 or the circuit substrate 12 is kept at a specified temperature, and it is soaked in glycol ether system cleaning agent and scratched off for removal. Thereby repair is enabled.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、各種機器に内蔵さ
れる半導体素子と半導体装置の実装構造とリペア方法に
関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mounting structure of a semiconductor device and a semiconductor device incorporated in various devices and a repair method.

【0002】[0002]

【従来の技術】従来、回路基板などへのベアチップ実装
やチップサイズパッケージの実装において、熱膨張係数
の大きく異なる材料を接続する際、接続信頼性を向上さ
せる目的で、半導体素子と回路基板との間に樹脂を封止
して補強する構造が提案されている。また、修理交換が
必要になった場合、半導体素子を回路基板から取り外
し、回路基板に残った樹脂を除去する方法が提案されて
いる。
2. Description of the Related Art Conventionally, when connecting materials having greatly different coefficients of thermal expansion in mounting a bare chip or a chip size package on a circuit board or the like, in order to improve connection reliability, a semiconductor element and a circuit board are connected. There has been proposed a structure in which a resin is sealed and reinforced between them. In addition, a method has been proposed in which, when repair and replacement become necessary, the semiconductor element is removed from the circuit board and the resin remaining on the circuit board is removed.

【0003】たとえばUV性の接着剤を用いて、取り外
しの際には再度紫外線を照射させてUV性接着剤を劣化
させる方法が知られている。
For example, a method is known in which a UV adhesive is used, and when detached, ultraviolet rays are again irradiated to deteriorate the UV adhesive.

【0004】また、特開平5−109838号公報で
は、回路基板に残留した樹脂にさらにより高い強度の接
着剤を塗布し、剥離用板を用いて加熱し取り外す方法を
提案している。
Japanese Patent Application Laid-Open No. Hei 5-109838 proposes a method in which an adhesive having higher strength is applied to a resin remaining on a circuit board, and the resin is removed by heating using a peeling plate.

【0005】さらに、特開平6−5664号公報では基
板に残った樹脂を研削カッターで除去する方法を提案し
ている。
Further, Japanese Patent Application Laid-Open No. 6-5664 proposes a method of removing the resin remaining on the substrate with a grinding cutter.

【0006】[0006]

【発明が解決しようとする課題】しかし、UV性の接着
剤を用いる場合は、硬化の際紫外線照射のみでは不十分
で熱による硬化も必要で、処理工程が複雑になるという
欠点がある。
However, in the case of using a UV adhesive, there is a drawback in that the ultraviolet irradiation alone is not sufficient at the time of curing and curing by heat is required, which complicates the treatment process.

【0007】また特開平5−109838号公報の方法
では、最初の樹脂より高い強度の接着剤を塗布するた
め、取り外しの際回路基板の電極やパターンが損傷を受
ける恐れがある。
In the method disclosed in JP-A-5-109838, an adhesive having a higher strength than that of the first resin is applied, so that the electrodes and patterns on the circuit board may be damaged during removal.

【0008】さらに、特開平6−5664号公報ではカ
ッターによる研削の為、カッターの制御が不十分である
と回路基板を損傷させる恐れがある。
Further, in Japanese Patent Application Laid-Open No. 6-5664, the circuit board may be damaged if the control of the cutter is insufficient due to the grinding by the cutter.

【0009】本発明は、このような従来の課題を解決
し、加熱などの一般的な工程で樹脂による補強を行うこ
とができ、回路基板に損傷を与えることなく修理交換可
能な構造を提供するものである。
The present invention solves such a conventional problem, and provides a structure that can be reinforced with a resin in a general process such as heating and can be repaired and replaced without damaging a circuit board. Things.

【0010】[0010]

【課題を解決するための手段】前記課題を解決するため
に、本発明の実装構造は半導体装置と回路基板を分離す
ることができるように、半導体装置と回路基板との間
を、200度における引っ張りせん断強度が室温におけ
る強度の20%になる樹脂で封止することとしたもので
ある。
In order to solve the above-mentioned problems, the mounting structure of the present invention is designed so that the semiconductor device and the circuit board can be separated from each other at a 200 degree angle so that the semiconductor device and the circuit board can be separated. The resin is sealed with a resin having a tensile shear strength of 20% of the strength at room temperature.

【0011】本発明によれば樹脂を封止した後でもリペ
アが可能である。
According to the present invention, repair is possible even after sealing the resin.

【0012】[0012]

【発明の実施の形態】本発明の請求項1に記載の発明は
半導体素子と半導体キャリアの間または半導体装置と回
路基板との間の内少なくとも一方を、200度以上にお
ける引っ張りせん断強度が室温における強度の20%以
下になる熱硬化性樹脂で封止した実装構造としたもので
あり、不良が生じた場合は半導体素子または半導体装置
を半導体キャリアまたは回路基板から取り外すことがで
きるという作用を有する。
DETAILED DESCRIPTION OF THE INVENTION According to the first aspect of the present invention, at least one of between a semiconductor element and a semiconductor carrier or between a semiconductor device and a circuit board has a tensile shear strength at 200 degrees or more at room temperature. The mounting structure is sealed with a thermosetting resin having a strength of 20% or less, and has a function of removing a semiconductor element or a semiconductor device from a semiconductor carrier or a circuit board when a defect occurs.

【0013】また本発明の請求項5に記載の発明は、半
導体キャリアに実装された半導体素子または回路基板に
実装された半導体装置の内少なくとも一方を、樹脂を封
止した後に取り外しを行うリペア方法であって、樹脂を
所定温度の熱風で一定時間加熱する工程と、半導体素子
または半導体装置を取り外す工程と、半導体キャリアま
たは回路基板に残った樹脂を所定温度に保ちグリコール
エーテル系の洗浄剤に浸漬させてかきとることで除去す
る工程を順次おこなうこととしたものであり、新たな半
導体素子または半導体装置もしくは新たな半導体キャリ
アもしくは回路基板を用いて再度実装する事が出来ると
いう作用を有する。
According to a fifth aspect of the present invention, there is provided a repair method for removing at least one of a semiconductor element mounted on a semiconductor carrier or a semiconductor device mounted on a circuit board after sealing a resin. Heating the resin with hot air at a predetermined temperature for a predetermined time, removing the semiconductor element or the semiconductor device, and immersing the resin remaining on the semiconductor carrier or the circuit board at a predetermined temperature in a glycol ether-based cleaning agent. The step of removing by scraping is performed sequentially, and has the effect of being able to be mounted again using a new semiconductor element or semiconductor device or a new semiconductor carrier or circuit board.

【0014】[0014]

【実施例】以下に、本発明の一実施例について、図面を
用いて説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings.

【0015】(実施例)図1は本発明の一実施例におけ
る半導体装置の実装構造の要部断面図を示す。
(Embodiment) FIG. 1 is a sectional view showing a main part of a mounting structure of a semiconductor device according to an embodiment of the present invention.

【0016】図1において、符号1は半導体装置、2は
半導体素子、3はバンプ、4は導電性接着剤、5は半導
体キャリア側の電極、6は封止樹脂(半導体素子〜半導
体キャリア間)、7は半導体キャリア、8は半導体装置
側の電極、9ははんだ、10は回路基板側の電極、11
は封止樹脂(半導体装置〜回路基板間)、12は回路基
板である。本発明の一実施例に用いた部材の詳細を(表
1)に、熱硬化性樹脂の温度−引っ張りせん断強度特性
図を(表2)に示す。なお、本発明実施例における室温
とは摂氏25度〜摂氏30度の範囲を言う。
In FIG. 1, reference numeral 1 denotes a semiconductor device, 2 denotes a semiconductor element, 3 denotes a bump, 4 denotes a conductive adhesive, 5 denotes an electrode on the semiconductor carrier side, and 6 denotes a sealing resin (between the semiconductor element and the semiconductor carrier). , 7 are semiconductor carriers, 8 is an electrode on the semiconductor device side, 9 is solder, 10 is an electrode on the circuit board side, 11
Denotes a sealing resin (between the semiconductor device and the circuit board), and 12 denotes a circuit board. Table 1 shows details of members used in one example of the present invention, and Table 2 shows a temperature-tensile shear strength characteristic diagram of the thermosetting resin. The room temperature in the embodiment of the present invention means a range of 25 degrees Celsius to 30 degrees Celsius.

【0017】[0017]

【表1】 [Table 1]

【0018】[0018]

【表2】 [Table 2]

【0019】半導体装置1は、バンプ3を備えた半導体
素子2を導電性接着剤4(例えば、エポキシ樹脂などに
銀またはカーボン等の粉末粒子を配合したもの。)を介
して電極5を備えた半導体キャリア7の上に搭載し、両
者間とその周囲に封止樹脂6を備えた構造を有してい
る。
The semiconductor device 1 has an electrode 5 on a semiconductor element 2 provided with a bump 3 via a conductive adhesive 4 (for example, an epoxy resin or the like mixed with powder particles of silver or carbon). It has a structure in which it is mounted on a semiconductor carrier 7 and a sealing resin 6 is provided between and around the semiconductor carrier 7.

【0020】この半導体装置1を回路基板12にはんだ
づけ実装し、両者の間に封止樹脂11を塗布する。塗布
量は約50mg程度である。その後、摂氏約100度
(摂氏90度〜摂氏110度)の雰囲気の加熱硬化炉で
1時間硬化させることにより回路基板への実装をおこな
うことができる。
The semiconductor device 1 is mounted on a circuit board 12 by soldering, and a sealing resin 11 is applied between the two. The application amount is about 50 mg. Thereafter, the substrate is cured for 1 hour in a heating and curing furnace in an atmosphere of about 100 degrees Celsius (90 degrees Celsius to 110 degrees Celsius), so that it can be mounted on a circuit board.

【0021】次に回路基板に搭載した半導体装置の修理
交換の必要が生じた場合は、以下の手順でおこなう。
Next, when it becomes necessary to repair or replace the semiconductor device mounted on the circuit board, the following procedure is performed.

【0022】図2は本発明の一実施例における半導体装
置の取り外し過程の概念の説明図である。
FIG. 2 is an explanatory view of the concept of the process of removing a semiconductor device according to one embodiment of the present invention.

【0023】図2(1)に示すようにまず熱風発生装置
を用いて、はんだ9と封止樹脂11を摂氏約250度
(摂氏240度〜摂氏260度)の熱風で約1分間加熱
する。加熱によりはんだ9は溶融する。また、封止樹脂
11も軟化し接着強度が低下する。
As shown in FIG. 2A, first, the solder 9 and the sealing resin 11 are heated with hot air of about 250 degrees Celsius (240 degrees Celsius to 260 degrees Celsius) for about 1 minute using a hot air generator. The heating melts the solder 9. Also, the sealing resin 11 is softened, and the adhesive strength is reduced.

【0024】次に図2(2)に示すように、機械的に不
良の半導体装置1を回路基板12から取り外す。
Next, as shown in FIG. 2B, the mechanically defective semiconductor device 1 is removed from the circuit board 12.

【0025】次に、回路基板12に残った封止樹脂11
を取り除くため、ホットプレートで回路基板12を摂氏
約100度(摂氏90度〜摂氏110度)に保温すると
ともに、洗浄剤を浸漬させて封止樹脂11を膨潤させ接
着強度を低下させる。
Next, the sealing resin 11 remaining on the circuit board 12
In order to remove the heat, the circuit board 12 is kept at a temperature of about 100 degrees Celsius (90 degrees Celsius to 110 degrees Celsius) with a hot plate, and a cleaning agent is immersed to swell the sealing resin 11 to lower the adhesive strength.

【0026】この状態で封止樹脂11をかきとるなどの
手段により、図2(3)に示すように回路基板12から
樹脂11を除去する。
In this state, the resin 11 is removed from the circuit board 12 by means such as scraping off the sealing resin 11 as shown in FIG.

【0027】図2(4)では、回路基板12の電極10
に残ったはんだ9を、はんだ吸い取り用編組線で除去
し、回路基板12を平滑にする。
In FIG. 2D, the electrodes 10 on the circuit board 12 are shown.
The remaining solder 9 is removed by a braided wire for desoldering, and the circuit board 12 is smoothed.

【0028】図2(5)では、回路基板12の電極部に
はんだ9を印刷し、良品の半導体装置1を再度実装す
る。
In FIG. 2 (5), the solder 9 is printed on the electrode portions of the circuit board 12, and the non-defective semiconductor device 1 is mounted again.

【0029】なお、上記手順は不良品の半導体装置を良
品の半導体装置と交換する手順を示したもので、同様に
して不良の回路基板を良品の回路基板と交換することが
できる。その際は半導体装置側の電極面を平滑に処理す
ればよいことはいうまでもない。
The above procedure shows a procedure for replacing a defective semiconductor device with a non-defective semiconductor device. Similarly, a defective circuit board can be replaced with a non-defective circuit board. In this case, it goes without saying that the surface of the electrode on the semiconductor device side may be smoothed.

【0030】以上のように本発明の実施例によれば、熱
硬化性樹脂を用いているので、処理工程が単純で、室温
における引っ張りせん断強度が20N/mm↑2以上で
あれば接続信頼性を確保できることを確認した。
As described above, according to the embodiment of the present invention, since the thermosetting resin is used, the processing step is simple, and if the tensile shear strength at room temperature is 20 N / mm ↑ 2 or more, the connection reliability is improved. We confirmed that we could secure.

【0031】図3に引っ張りせん断強度が16N/mm
↑2であるスリーンボンド社製の樹脂、TB3006B
と比較した熱衝撃試験(−40〜+80度各30分間)
の信頼性試験結果を示す。
FIG. 3 shows that the tensile shear strength is 16 N / mm.
# 2 Resin bond resin, TB3006B
Shock test (-40 to +80 degrees for 30 minutes each)
2 shows the results of the reliability test.

【0032】また、本発明の実施例における樹脂は摂氏
200度以上における引っ張りせん断強度が室温におけ
る強度の20%以下になるので半導体装置を容易に回路
基板から取り外すことが出来る。
Further, since the resin in the embodiment of the present invention has a tensile shear strength at 200 ° C. or more of 20% or less of the strength at room temperature, the semiconductor device can be easily removed from the circuit board.

【0033】さらに、摂氏100度における樹脂の引っ
張りせん断強度が15N/mm↑2以下であり、なおか
つ樹脂が洗浄剤で膨潤し接着強度が低下するので回路基
板に損傷を与えることなく樹脂を除去することができ
る。
Furthermore, the resin has a tensile shear strength of 15 N / mm @ 2 or less at 100 degrees Celsius, and the resin swells with a cleaning agent to lower the adhesive strength, so that the resin is removed without damaging the circuit board. be able to.

【0034】[0034]

【発明の効果】以上のように本発明によれば、接続信頼
性を向上させる目的で半導体素子と半導体キャリアとの
間もしくは半導体装置と回路基板との間に樹脂を封止し
た後でも、半導体キャリアや回路基板に損傷を与えるこ
となく半導体素子や半導体装置を取り外し交換修理する
ことができ、不良が生じた場合のロスが大きく減少す
る。
As described above, according to the present invention, even after a resin is sealed between a semiconductor element and a semiconductor carrier or between a semiconductor device and a circuit board for the purpose of improving connection reliability, a semiconductor The semiconductor element and the semiconductor device can be removed and replaced and repaired without damaging the carrier and the circuit board, and the loss when a defect occurs is greatly reduced.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例における半導体装置の実装構
造の要部断面図
FIG. 1 is a sectional view of a main part of a mounting structure of a semiconductor device according to an embodiment of the present invention.

【図2】本発明の一実施例における半導体装置の取り外
し過程の概念の説明図
FIG. 2 is an explanatory diagram of a concept of a process of removing a semiconductor device according to an embodiment of the present invention.

【図3】信頼性試験特性図FIG. 3 is a reliability test characteristic diagram.

【符号の説明】[Explanation of symbols]

1 半導体装置 2 半導体素子 3 バンプ 4 導電性接着剤 5 電極(半導体キャリア側) 6 封止樹脂(半導体素子〜半導体キャリア間) 7 半導体キャリア 8 電極(半導体装置側) 9 はんだ 10 電極(回路基板側) 11 封止樹脂(半導体装置〜回路基板間) 12 回路基板 Reference Signs List 1 semiconductor device 2 semiconductor element 3 bump 4 conductive adhesive 5 electrode (semiconductor carrier side) 6 sealing resin (between semiconductor element and semiconductor carrier) 7 semiconductor carrier 8 electrode (semiconductor device side) 9 solder 10 electrode (circuit board side) 11) sealing resin (between semiconductor device and circuit board) 12 circuit board

───────────────────────────────────────────────────── フロントページの続き (72)発明者 目黒 赳 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Takeshi Meguro 1006 Kazuma Kadoma, Kadoma City, Osaka Matsushita Electric Industrial Co., Ltd.

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 半導体素子と半導体キャリアの間、また
は半導体装置と回路基板との間の内少なくとも一方を、
200度以上における引っ張りせん断強度が室温におけ
る強度の20%以下になる熱硬化性樹脂で封止したこと
を特徴とする半導体装置の実装構造。
At least one of between a semiconductor element and a semiconductor carrier, or between a semiconductor device and a circuit board,
A semiconductor device mounting structure characterized by being sealed with a thermosetting resin having a tensile shear strength at 200 degrees or more of 20% or less of the strength at room temperature.
【請求項2】 室温における引っ張りせん断強度が20
N/mm2以上である熱硬化性樹脂としたことを特徴とす
る請求項1記載の半導体装置の実装構造。
2. A tensile shear strength at room temperature of 20.
2. The mounting structure of a semiconductor device according to claim 1, wherein the thermosetting resin is N / mm 2 or more.
【請求項3】 100度における引っ張りせん断強度が
15N/mm2以下である熱硬化性樹脂としたことを特徴
とする請求項1記載の半導体装置の実装構造。
3. The mounting structure of a semiconductor device according to claim 1, wherein the thermosetting resin has a tensile shear strength at 100 degrees of 15 N / mm 2 or less.
【請求項4】 グリコールエーテル系の洗浄剤に浸漬さ
せると膨潤し接着強度が低下する熱硬化性樹脂としたこ
とを特徴とする請求項1記載の半導体装置の実装構造。
4. The semiconductor device mounting structure according to claim 1, wherein said thermosetting resin is a thermosetting resin that swells and reduces adhesive strength when immersed in a glycol ether-based cleaning agent.
【請求項5】 半導体キャリアに実装された半導体素
子、または回路基板に実装された半導体装置の内少なく
とも一方を、樹脂を封止した後に取り外しを行うリペア
方法であって、樹脂を所定温度の熱風で一定時間加熱す
る工程と、半導体素子または半導体装置を取り外す工程
と、半導体キャリアまたは回路基板に残った樹脂を所定
温度に保ちグリコールエーテル系の洗浄剤に浸漬させて
除去する工程とを備えたことを特徴とする半導体装置の
リペア方法。
5. A repair method for removing at least one of a semiconductor element mounted on a semiconductor carrier or a semiconductor device mounted on a circuit board after sealing the resin, wherein the resin is heated with a hot air having a predetermined temperature. And a step of removing the semiconductor element or the semiconductor device, and a step of removing the resin remaining on the semiconductor carrier or the circuit board by immersing the resin in a glycol ether-based cleaning agent at a predetermined temperature. A method for repairing a semiconductor device.
【請求項6】 熱風の温度を摂氏240度〜摂氏260
度の範囲とし、回路基板の加熱温度を摂氏90度〜摂氏
110度の範囲としたことを特徴とする請求項5記載の
半導体装置のリペア方法。
6. The temperature of the hot air is set to 240 degrees Celsius to 260 degrees Celsius.
6. The repair method for a semiconductor device according to claim 5, wherein the heating temperature of the circuit board is in a range of 90 degrees Celsius to 110 degrees Celsius.
JP26038896A 1996-10-01 1996-10-01 Mounting structure and repairing method for semiconductor device Pending JPH10107095A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP26038896A JPH10107095A (en) 1996-10-01 1996-10-01 Mounting structure and repairing method for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP26038896A JPH10107095A (en) 1996-10-01 1996-10-01 Mounting structure and repairing method for semiconductor device

Publications (1)

Publication Number Publication Date
JPH10107095A true JPH10107095A (en) 1998-04-24

Family

ID=17347231

Family Applications (1)

Application Number Title Priority Date Filing Date
JP26038896A Pending JPH10107095A (en) 1996-10-01 1996-10-01 Mounting structure and repairing method for semiconductor device

Country Status (1)

Country Link
JP (1) JPH10107095A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0970520A4 (en) * 1997-01-17 2000-08-30 Loctite Corp Mounting structure and mounting process from semiconductor devices
JP2000260912A (en) * 1999-03-05 2000-09-22 Fujitsu Ltd Method and structure for mounting semiconductor device
US6274389B1 (en) 1997-01-17 2001-08-14 Loctite (R&D) Ltd. Mounting structure and mounting process from semiconductor devices
US6316528B1 (en) 1997-01-17 2001-11-13 Loctite (R&D) Limited Thermosetting resin compositions
US6590287B2 (en) 2000-08-01 2003-07-08 Nec Corporation Packaging method and packaging structures of semiconductor devices
US6829818B2 (en) 2000-09-12 2004-12-14 Tdk Corporation Manufacturing method of a head gimbal assembly
US6870248B1 (en) 1999-06-07 2005-03-22 Rohm Co., Ltd. Semiconductor chip with external connecting terminal
US8217275B2 (en) 2006-12-04 2012-07-10 Panasonic Corporation Sealing material and mounting method using the sealing material

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0970520A4 (en) * 1997-01-17 2000-08-30 Loctite Corp Mounting structure and mounting process from semiconductor devices
US6274389B1 (en) 1997-01-17 2001-08-14 Loctite (R&D) Ltd. Mounting structure and mounting process from semiconductor devices
US6316528B1 (en) 1997-01-17 2001-11-13 Loctite (R&D) Limited Thermosetting resin compositions
JP2000260912A (en) * 1999-03-05 2000-09-22 Fujitsu Ltd Method and structure for mounting semiconductor device
US6870248B1 (en) 1999-06-07 2005-03-22 Rohm Co., Ltd. Semiconductor chip with external connecting terminal
US7138298B2 (en) 1999-06-07 2006-11-21 Rohm Co., Ltd. Semiconductor chip with external connecting terminal
US7262490B2 (en) 1999-06-07 2007-08-28 Rohm Co., Ltd. Semiconductor chip with external connecting terminal
US7339264B2 (en) 1999-06-07 2008-03-04 Rohm Co., Ltd. Semiconductor chip with external connecting terminal
US6590287B2 (en) 2000-08-01 2003-07-08 Nec Corporation Packaging method and packaging structures of semiconductor devices
US6829818B2 (en) 2000-09-12 2004-12-14 Tdk Corporation Manufacturing method of a head gimbal assembly
US8217275B2 (en) 2006-12-04 2012-07-10 Panasonic Corporation Sealing material and mounting method using the sealing material

Similar Documents

Publication Publication Date Title
CN102034747B (en) Method and apparatus for separating protective tape
JPH05251516A (en) Exchange method for semiconductor chip
JPH10107095A (en) Mounting structure and repairing method for semiconductor device
JPWO2008001695A1 (en) Thermosetting resin composition and circuit board mounting method and repair process using the same
JP4637652B2 (en) Soldering method and electronic component
US6139661A (en) Two step SMT method using masked cure
US5722579A (en) Bottom-surface-metallurgy rework process in ceramic modules
JPH0121620B2 (en)
KR102171374B1 (en) Method of reworking micro device
CN1265424C (en) Method for reprocessing power device
KR20080100400A (en) Process for recovering printed circuit board
JP2000100873A (en) Bare chip mounting method
JP3055193B2 (en) Circuit connection method and liquid crystal device manufacturing method
JPS5985394A (en) Cream solder
JP5619479B2 (en) Method for reworking mounted semiconductor elements
JPH05109838A (en) Repair method for bare chip
JPS61214530A (en) Wire bonding method and device therefor
JP3353366B2 (en) Die bonding method
CN114364157B (en) Patch with double-sided welding pad for PCB and packaging method
JP2706405B2 (en) Semiconductor chip mounting method
JP2007324237A (en) Method and apparatus for repairing semiconductor module
JP4633895B2 (en) Manufacturing method of semiconductor device
CN112582288A (en) Routing method, flexible circuit board preparation method and flexible circuit board
JPH04252093A (en) Method for repairing pad
JPH06151477A (en) Semiconductor device