JPH10104595A - Display device and manufacture therefor - Google Patents
Display device and manufacture thereforInfo
- Publication number
- JPH10104595A JPH10104595A JP8258057A JP25805796A JPH10104595A JP H10104595 A JPH10104595 A JP H10104595A JP 8258057 A JP8258057 A JP 8258057A JP 25805796 A JP25805796 A JP 25805796A JP H10104595 A JPH10104595 A JP H10104595A
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- gate electrode
- source
- film
- semiconductor layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Liquid Crystal (AREA)
- Surface Treatment Of Optical Elements (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、電子部品のアレイ
及び製法に関するものである。さらに詳しくは、表示装
置を構成する薄膜トランジスタアレイ(以下TFT)の
表面に、ブラックマトリックス(以下BM)を直接配し
た構成のTFTアレイ及びその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an array of electronic components and a method of manufacturing the same. More specifically, the present invention relates to a TFT array having a structure in which a black matrix (hereinafter, referred to as BM) is directly disposed on a surface of a thin film transistor array (hereinafter, referred to as TFT) constituting a display device, and a method of manufacturing the same.
【0002】[0002]
【従来の技術】従来のこの分野における先行例として
は、例えば特開平7−45836号公報または特開平7
−64112号公報等に記載があるように、絶縁性透明
基板1上に遮光膜2をパターン形成し、次に基板全面に
層間絶縁膜3を形成する(図3a)。次に、画素電極
4、ソース・ドレイン電極5を順次パターン形成する
(図3b)。次に、半導体層構成膜6及びゲート電極膜
7を積層製膜する(図3c)。次に、フォトリソグラフ
ィによりゲート電極7をエッチングした後、前記ゲート
電極7下以外の半導体層構成膜6をエッチング除去し、
TFTアレイ8aを完成させる(図3d)。2. Description of the Related Art As a prior art example in this field, for example, Japanese Patent Application Laid-Open No.
As described in JP-A-64112, a light-shielding film 2 is patterned on an insulating transparent substrate 1, and then an interlayer insulating film 3 is formed on the entire surface of the substrate (FIG. 3A). Next, the pixel electrode 4 and the source / drain electrode 5 are sequentially patterned (FIG. 3B). Next, the semiconductor layer constituting film 6 and the gate electrode film 7 are formed by lamination (FIG. 3C). Next, after etching the gate electrode 7 by photolithography, the semiconductor layer constituting film 6 other than under the gate electrode 7 is removed by etching.
The TFT array 8a is completed (FIG. 3D).
【0003】[0003]
【発明が解決しようとする課題】従来の構成によれば、
ゲート電極は通常低抵抗であるアルミニウムまたはアル
ミニウム合金が用いられる。しかしながら、アルミニウ
ム配線を用いたTFTで表示装置を構成した場合のコン
トラスト比は、アルミニウムの光反射率が約90%と大
きいため、液晶表示装置の正面から入射した光が反射し
て、実質的に黒の輝度を増加させ、実験的に作成したア
ルミニウムのない液晶表示装置のコントラスト比に比べ
て大幅に劣化する課題がある。According to the conventional configuration,
The gate electrode is usually made of low resistance aluminum or aluminum alloy. However, when a display device is configured with a TFT using aluminum wiring, the light reflected from aluminum is as large as about 90% because the light reflectance of aluminum is as large as about 90%. There is a problem that the luminance of black is increased and the contrast ratio is significantly deteriorated as compared with the contrast ratio of a liquid crystal display device without aluminum which is experimentally created.
【0004】本発明は、上記従来の課題を克服するた
め、コントラスト比が高く、表面反射率が小さく、見易
い表示特性を得る表示装置及びその製造方法を提供する
ことを目的とする。SUMMARY OF THE INVENTION An object of the present invention is to provide a display device having a high contrast ratio, a small surface reflectivity, and a display characteristic which is easy to see, and a method of manufacturing the same, in order to overcome the above-mentioned conventional problems.
【0005】[0005]
【課題を解決するための手段】上記目的を達成するた
め、本発明は配線電極材の反射防止処理に、電着法によ
り暗色膜を形成した表示装置、及び当該表示装置を達成
するため、画素電極をパターン形成する工程と、ソース
・ドレイン電極をパターン形成する工程と、半導体層、
絶縁膜を順次被着する工程と、ゲート電極をパターン形
成する工程と、前記半導体層、絶縁膜の不要部をエッチ
ング除去する工程と、前記ゲート電極の表面または、前
記ゲート電極とエッチング後に露出した前記ソース電極
の両方の表面に反射防止処理を施す工程とを有する製造
方法である。In order to achieve the above object, the present invention provides a display device in which a dark film is formed by an electrodeposition method in an anti-reflection treatment of a wiring electrode material, and a pixel in order to achieve the display device. Patterning an electrode, patterning a source / drain electrode, a semiconductor layer,
A step of sequentially applying an insulating film, a step of patterning a gate electrode, a step of etching and removing unnecessary portions of the semiconductor layer and the insulating film, and a surface of the gate electrode or exposed after etching with the gate electrode. Performing an antireflection treatment on both surfaces of the source electrode.
【0006】電着法によれば、黒色顔料または有色顔料
を複数種混合し無彩色とした顔料と高分子樹脂を有する
塗料にTFTアレイを浸漬し、ソース電極もしくはゲー
ト電極に陽極を印加することで、陽極上に顔料含有樹脂
粒子が析出して反射防止膜となる。[0006] According to the electrodeposition method, a TFT array is immersed in a paint containing an achromatic pigment and a polymer resin by mixing a plurality of black pigments or colored pigments, and applying an anode to a source electrode or a gate electrode. Thus, the pigment-containing resin particles precipitate on the anode to form an antireflection film.
【0007】[0007]
【発明の実施の形態】以下実施の形態により具体的に本
発明を説明する。BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be specifically described below with reference to embodiments.
【0008】本発明は絶縁性透明基板1上に遮光膜2を
パターン形成し、次に基板全面に層間絶縁膜3を形成す
る(図1a)。次に、画素電極4、ソース・ドレイン電
極5を順次パターン形成する(図1b)。次に、半導体
層構成膜6及びゲート電極膜7を積層製膜する(図1
c)。次に、一般的なポジレジストを用いてゲート電極
膜7をパターン形成した後、前記ゲート電極下以外の半
導体層構成膜6をエッチング除去する。これによってソ
ース・ドレイン電極膜5は露出し、導電膜面が得られ
る。そして、ゲート電極膜7のポジレジストを除去する
ことで導電膜面を露出させる(図1d)。In the present invention, a light-shielding film 2 is patterned on an insulating transparent substrate 1, and then an interlayer insulating film 3 is formed on the entire surface of the substrate (FIG. 1a). Next, the pixel electrode 4 and the source / drain electrode 5 are sequentially patterned (FIG. 1B). Next, the semiconductor layer constituting film 6 and the gate electrode film 7 are formed by lamination (FIG. 1).
c). Next, after patterning the gate electrode film 7 using a general positive resist, the semiconductor layer constituting film 6 other than under the gate electrode is removed by etching. As a result, the source / drain electrode film 5 is exposed, and a conductive film surface is obtained. Then, the conductive film surface is exposed by removing the positive resist of the gate electrode film 7 (FIG. 1D).
【0009】次に、黒色顔料(例えばカーボンブラッ
ク)と、架橋性高分子樹脂(例えばメラミン樹脂、エポ
キシ樹脂、アクリレート樹脂等)とを有する電着塗料9
を入れた電着槽にTFTアレイ8aを浸漬し、ソース電
極5もしくはゲート電極7に陽極を印加することで、陽
極上に黒色含有樹脂粒子を析出させて反射防止膜を設け
る(図2)。その後、析出した電着塗装膜を乾燥により
熱架橋させ、焼成・非導電化させて反射防止膜10を得
る。この様にしてTFTアレイ8bを完成させる(図1
e)。Next, an electrodeposition paint 9 containing a black pigment (for example, carbon black) and a crosslinkable polymer resin (for example, melamine resin, epoxy resin, acrylate resin, etc.)
The TFT array 8a is immersed in the electrodeposition bath containing the, and an anode is applied to the source electrode 5 or the gate electrode 7, thereby depositing black-containing resin particles on the anode to provide an antireflection film (FIG. 2). Thereafter, the deposited electrodeposition coating film is thermally crosslinked by drying, and is baked and rendered non-conductive to obtain the antireflection film 10. Thus, the TFT array 8b is completed (FIG. 1).
e).
【0010】なお、本実施例では反射防止膜形成工程に
於いてレジスト保護膜は設けていないが、必要に応じて
画素電極を保護するも良い。また、電着塗料に黒色顔料
を用いているが、有色顔料を複数種混合し無彩色化した
顔料等低反射率が得られるならばその限りでない。In this embodiment, a resist protective film is not provided in the anti-reflection film forming step, but the pixel electrode may be protected if necessary. Further, a black pigment is used for the electrodeposition paint, but this is not a limitation as long as a low reflectance such as an achromatic pigment is obtained by mixing a plurality of colored pigments.
【0011】[0011]
【発明の効果】本発明によると、ゲート配線電極及びソ
ース配線電極の側壁を含む露出部全面に反射防止処理を
施すことができる。その結果、ゲート電極やソース電極
からの光の反射を低減する効果を有し、これを用いた液
晶表示装置はコントラスト比の低下がない。そして、表
面反射が小さく、見やすい表示特性を得ることができる
効果を有する。これら効果を持って表示画質の向上効果
を得ることができる。According to the present invention, antireflection treatment can be performed on the entire exposed portion including the side walls of the gate wiring electrode and the source wiring electrode. As a result, it has an effect of reducing the reflection of light from the gate electrode and the source electrode, and the liquid crystal display device using the same does not lower the contrast ratio. And there is an effect that surface reflection is small and easy-to-see display characteristics can be obtained. With these effects, the effect of improving the display image quality can be obtained.
【図1】本発明のTFTアレイ工程断面図FIG. 1 is a sectional view of a TFT array process of the present invention.
【図2】本発明の電着塗装概念図FIG. 2 is a conceptual diagram of electrodeposition coating according to the present invention.
【図3】従来法のTFTアレイ工程断面図FIG. 3 is a sectional view of a conventional TFT array process.
【符号の説明】 1 透明基板 2 遮光膜 3 層間絶縁膜 4 画素電極 5 ソース・ドレイン電極 6 半導体層構成膜 7 ゲート電極 8 TFTアレイ 9 電着塗料 10 反射防止膜[Description of Signs] 1 Transparent substrate 2 Light-shielding film 3 Interlayer insulating film 4 Pixel electrode 5 Source / drain electrode 6 Semiconductor layer constituent film 7 Gate electrode 8 TFT array 9 Electrodeposition paint 10 Anti-reflection film
Claims (3)
付着させ、反射防止膜を形成したことを特徴とする表示
装置。1. A display device wherein a pigment is attached to the surface of a wiring electrode material by an electrodeposition method to form an antireflection film.
電極を少なくとも有し、それぞれが絶縁膜を介して形成
されて成る順スタガ型薄膜トランジスタをスイッチング
素子とし、露出したゲート配線またはソース配線の少な
くとも何れか一方の表面に、電着法によって反射防止処
理を施したことを特徴とする表示装置。2. A switching element comprising a forward staggered thin film transistor having at least a source / drain electrode, a semiconductor layer and a gate electrode, each of which is formed with an insulating film interposed therebetween, and at least one of an exposed gate wiring and a source wiring. A display device, wherein one surface is subjected to an antireflection treatment by an electrodeposition method.
ス・ドレイン電極をパターン形成する工程と、半導体
層、絶縁膜を順次被着する工程と、ゲート電極をパター
ン形成する工程と、前記半導体層、絶縁膜の不要部をエ
ッチング除去する工程と、前記ゲート電極の表面また
は、前記ゲート電極とエッチング後に露出した前記ソー
ス電極の両方の表面に反射防止処理を施す工程とを有す
る表示装置の製造方法。A step of patterning a pixel electrode; a step of patterning a source / drain electrode; a step of sequentially depositing a semiconductor layer and an insulating film; a step of patterning a gate electrode; A method for manufacturing a display device, comprising: a step of etching and removing unnecessary portions of an insulating film; and a step of performing an antireflection treatment on the surface of the gate electrode or on both surfaces of the gate electrode and the source electrode exposed after etching. .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8258057A JPH10104595A (en) | 1996-09-30 | 1996-09-30 | Display device and manufacture therefor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8258057A JPH10104595A (en) | 1996-09-30 | 1996-09-30 | Display device and manufacture therefor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH10104595A true JPH10104595A (en) | 1998-04-24 |
Family
ID=17314944
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8258057A Pending JPH10104595A (en) | 1996-09-30 | 1996-09-30 | Display device and manufacture therefor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH10104595A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100403150C (en) * | 2004-03-03 | 2008-07-16 | 鸿富锦精密工业(深圳)有限公司 | Active matrix type liquid crystal display device |
SG147270A1 (en) * | 2000-12-11 | 2008-11-28 | Semiconductor Energy Lab | Semiconductor device, and manufacturing method thereof |
JP2010250005A (en) * | 2009-04-14 | 2010-11-04 | Seiko Epson Corp | Electrooptical device and electronic equipment |
JP2012230326A (en) * | 2011-04-27 | 2012-11-22 | Dainippon Printing Co Ltd | Active matrix substrate, method for manufacturing active matrix substrate and liquid crystal display device |
US9231044B2 (en) | 2000-12-21 | 2016-01-05 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device and method of manufacturing the same |
-
1996
- 1996-09-30 JP JP8258057A patent/JPH10104595A/en active Pending
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
SG147270A1 (en) * | 2000-12-11 | 2008-11-28 | Semiconductor Energy Lab | Semiconductor device, and manufacturing method thereof |
US9059216B2 (en) | 2000-12-11 | 2015-06-16 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, and manufacturing method thereof |
US9666601B2 (en) | 2000-12-11 | 2017-05-30 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, and manufacturing method thereof |
US10665610B2 (en) | 2000-12-11 | 2020-05-26 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, and manufacturing method thereof |
US9231044B2 (en) | 2000-12-21 | 2016-01-05 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device and method of manufacturing the same |
US9793335B2 (en) | 2000-12-21 | 2017-10-17 | Semiconductor Energy Laboratory Co., Ltd. | Light emitting device and method of manufacturing the same |
CN100403150C (en) * | 2004-03-03 | 2008-07-16 | 鸿富锦精密工业(深圳)有限公司 | Active matrix type liquid crystal display device |
JP2010250005A (en) * | 2009-04-14 | 2010-11-04 | Seiko Epson Corp | Electrooptical device and electronic equipment |
JP2012230326A (en) * | 2011-04-27 | 2012-11-22 | Dainippon Printing Co Ltd | Active matrix substrate, method for manufacturing active matrix substrate and liquid crystal display device |
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Legal Events
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A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20040302 |