JPH0992803A - Manufacture of semiconductor substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the number of voids and the number of detects at a lamination interface in a non-porous crystals silicon layer by removing a porous silicon layer by using etching solution having an etching speed lower than a specified value for both a non-porous monocrystal silicon layer and a silicon oxide layer. SOLUTION: A porous silicon layer 101 is formed by anodic formation of a monocrystal silicon substrate 100. On this porous silicon layer 101, a non- porous monocrystal silicon layer 102 is subjected to epitaxial growth. The surface of this epitaxial layer 102 is oxidized and a silicon oxide layer 103 is formed. Next, a substrate 110 as a bearing substrate having a silicon oxide layer 104 on the surface is adhered, and a substrate 100 and a porous silicon layer 101 are removed by using an etching solution having an etching speed of less than 10 angstrom per minute for both non-porous monocrystal silicon layer 102 and silicon oxide layer 103. Therefore, the occurrence of voids can be suppressed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a manufacturing method particularly excellent in uniformity and controllability in obtaining an SOI substrate having a single crystal layer having excellent crystallinity on an insulator as well as a single crystal wafer. Is.

[0002]

2. Description of the Related Art The formation of a single crystal silicon semiconductor layer on an insulator is performed by using a Silicon on Insulator (S).
Much research has been done because this substrate has a number of advantages that are widely known as OI) technology and cannot be reached by a bulk silicon substrate for producing a normal silicon integrated circuit.

Among the SOI formation methods reported recently, the one called "bonded SOI" is particularly known as having excellent quality.
There is. This is because the mirror surfaces of two wafers, at least one of which has an insulating film formed by oxidation or the like, are brought into close contact with each other, and a heat treatment is performed to strengthen the bond at the close contact interface. This is a technique of leaving a silicon single crystal thin film having an arbitrary thickness on the insulating film by polishing or etching. The most important step in this technology is the step of thinning the silicon substrate. That is, a silicon substrate having a thickness of several hundred μm must be uniformly polished or etched to a thickness of several μm or 1 μm or less, which is technically extremely difficult in terms of controllability and uniformity.

There are roughly two methods for thinning silicon. One is a method of polishing only (BPSO
I: Bonding and Polishing S
The other is a method (BESOI: Bond) in which the etching stop layer is provided immediately above the silicon thin film to be left (immediately below when a single substrate is manufactured), and the etching is performed on the substrate and the etching stop layer.
and Etchback SOI).

Focusing on the uniformity of the remaining silicon film thickness, it is extremely difficult to control the BPSOI as described above. That is, in the case of polishing, since the surface of the polishing machine on which the sample is placed serves as the reference surface, if there is a slight thickness distribution in the wafer itself, which becomes the supporting substrate, that will directly affect the thickness distribution of the active layer. Is. Usually, the active layer of a thin film SOI substrate needs to control the distribution of several tens of angstroms, so it is practically impossible to obtain such controllability of the substrate itself, and therefore it is difficult to control the film thickness of BPSOI. I have no choice. On the other hand, in BESOI, the silicon active layer is often epitaxially grown on the previously formed etching stop layer, so that BESOI is currently considered to be advantageous for ensuring the uniformity of the film thickness. However, the etching stop layer often contains a high concentration of impurities, and in most cases, the etching selectivity is obtained due to the difference in concentration. In other words, this includes the possibility that the etching characteristics may be changed if the impurities diffuse during the heat treatment such as annealing after the bonding. Further, generally, the etching rate ratio, that is, the etching selection ratio due to the difference in the concentration of impurities is at most several tens to several hundreds, and the over-etching of the active layer or the occurrence of the distribution cannot be avoided.

In an example in which the film thickness of the active layer is uniform as in BESOI and the etchback selectivity is several orders of magnitude better than in conventional BESOI, there is one proposed by the present applicant.
In this method, the surface of a silicon substrate is made porous by anodization, a silicon active layer is epitaxially grown on this, and then the silicon layer is transferred to the other substrate by bonding to manufacture an SOI substrate. (Japanese Patent Laid-Open No. 5-21338). This method
It utilizes the fact that porous silicon has a much higher etching rate for an etching solution than non-porous single crystal silicon, and is an excellent method for producing a good-quality SOI substrate at low cost. The present inventors have also proposed an etchant applicable to the above method (JP-A-6-342784, etc.).

According to the research conducted by the present inventors, the highly selective etching property of porous silicon can be obtained by a hydrofluoric acid type etchant such as a mixed solution of hydrofluoric acid and hydrogen peroxide.

[0008]

However, it has recently been reported that a hydrofluoric acid-based etching solution selectively etches crystal defects contained in the active layer (Proceedins 1944 IEEE I).
international SOI Conferen
ce, pllll). As a result of the study by the present inventors, according to this action, depending on the conditions, the formation of micropores (pinholes) in the active layer, and further erosion of the underlying oxide film through the pinholes and the like, voids at the bonding interface of the bonded substrate (V
It has been found that it may be a factor in the formation of oid).

An object of the present invention is to significantly reduce the generation of voids due to the etching of crystal defects during the etching of the porous layer in the SOI substrate forming method using the technique for selectively etching the porous layer. To keep it low.

Another object of the present invention is to provide a method of manufacturing a semiconductor substrate capable of controlling the number of voids at the bonding interface and the number of defects in the non-porous single crystal silicon layer to an extremely low value.

[0011]

A method of manufacturing a semiconductor substrate according to the present invention, which achieves the above-mentioned object, has a structure described below. That is, the semiconductor substrate manufacturing method of the present invention comprises the steps of preparing a first substrate in which a non-porous single crystal silicon layer is epitaxially grown on a porous silicon layer obtained by making a silicon substrate porous, So that the non-porous single crystal silicon layer is located inside the substrate having the silicon oxide layer on the bonding surface of at least one of the substrate and the second substrate. In a method for manufacturing a semiconductor substrate, which includes a step of bonding and a step of etching and removing the porous silicon layer, etching in which the etching rates of the non-porous single crystal silicon layer and the silicon oxide layer are both 10 angstroms / minute or less. It is characterized in that the porous silicon layer is removed using a liquid.

According to the present invention having the above-described structure, the above-mentioned problems to be solved can be solved, and an extremely high-quality SOI substrate can be manufactured.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION The method for manufacturing a semiconductor substrate of the present invention has the above-described structure.

The present invention is an example in which a non-porous single crystal silicon layer is epitaxially grown on a porous single crystal silicon layer obtained by partially making the surface layer of a non-porous single crystal silicon substrate porous. After being used as the first substrate and bonding the first substrate and the second substrate, a part of the region of the first substrate that remains as non-porous single crystal silicon without being made porous or It also includes a mode in which the whole is removed by a mechanical removal method such as grinding or polishing.

In the present invention, the non-porous single crystal silicon substrate is made porous by anodization.
n). The porous silicon layer thus obtained has a large number of pores having an average diameter of about 600Å,
In addition, the layer maintains single crystallinity.

The selective etching mechanism of the porous single crystal silicon layer is as follows. First, the etching solution permeates into the pores by the capillary phenomenon, and at the same time, etching of the porous wall surface is started. At this time, if the etching rate for the single crystal silicon is sufficiently slow, the etching solution is activated by the capillary phenomenon before the inner wall of the porous layer is completely etched (a non-porous single crystal epitaxially grown on the porous layer. It reaches the interface between the silicon layer) and the porous layer. Then, when the thickness of the inner wall becomes zero, it disappears like the entire porous layer collapses.
At this time, the active layer will be slightly etched,
Actually, only about 1/2 of the thickness of the porous inner wall is etched. That is, several tens of angstroms. Therefore, even if all of the thick porous layer is etched,
The active layer remains almost unetched.

On the other hand, when the etching rate of the etching liquid with respect to the single crystal silicon is high, the etching from the surface of the porous layer becomes predominant faster than the liquid permeates into the pores due to the capillary phenomenon, and before the inner wall of the porous layer collapses. The porous layer will be etched from the surface layer at a constant rate. The active layer is also continuously etched at the same rate, and good selectivity does not appear.

That is, good selective etching is established.
Is the amount of etching from the porous surface at a certain time t
(Thickness) is y_s, Staining of liquid into the porous material at the same time
Included distance is y_pAnd y_s<Y_pMeet the conditions in
It was when I did. Furthermore, y _sIs the etching rate a
To y_pIs dependent on the permeation rate k of the liquid into the porosity.
Exist. y_pThe value of is determined by the pore size of the porous material.
Epitaxially grow a high quality single crystal thin film on the ordinary porosity.
In order to make it possible, the porosity of certain limited conditions (such as porosity)
Only quality is used. Therefore, the k value becomes almost constant, and a
The etching selectivity is determined by the value of
You.

It has been experimentally determined that the value is about 10 Å / min or less, preferably about 2 Å / min. On the other hand, a value smaller than 1 angstrom / min is not suitable because the total etching time becomes enormous although the selectivity is obtained. On the other hand, if it is higher than 10 Å / min, the etching selectivity is deteriorated and the etching amount of the single crystal thin film to be left is increased, so that the film thickness distribution is increased, which is not suitable.

Conventionally, porous selective etching has been carried out by using a hydrofluoric acid-based solution, which is prepared so that the etching rate for single crystal silicon is sufficiently slow. For example, hydrofluoric acid (49%) and hydrogen peroxide solution (30%) 1: 5
A typical example is a mixed solution.

However, this is a condition for satisfying only that the selective etching is established. That is, the conventional selective etching solution does not consider the etching rate for various defects contained in the active layer and the etching rate for the underlying oxide film.

Therefore, the present inventors prefer to selectively etch porous silicon by using an etching solution which has a sufficiently low etching rate for single crystal silicon and a low etching rate for underlying SiO ₂ . did.

As an example of this, TMAH which is an organic alkali
(Tetramethylammonium hydroxide). At room temperature, the TMAH aqueous solution exhibits a solution concentration dependence of the silicon etching rate as shown in FIG. Further, the etching rates for SiO ₂ were all below the detection limit regardless of the solution concentration.

Therefore, TMA is used for the selective etching of the porous material.
When using an aqueous solution of H, the solution concentration is about 50 pp in order to keep the etching rate at 10 angstroms / minute or less.
It is only necessary to use those of m or less.

As another example, a mixed solution of hydrofluoric acid and hydrogen peroxide solution is shown in FIG. This solution is the opposite of TMAH
The etching rate for silicon is constant at about 2 to 3 angstroms / minute over a wide concentration range, and the etching rate for SiO ₂ shows concentration dependency.

Therefore, in order to reduce the etching rate of both porous silicon and SiO ₂ to 10 angstroms or less using this solution, the concentration of hydrofluoric acid in the hydrogen peroxide solution should be about 0.5% or less. . It is also known that even if 80% of the hydrogen peroxide solution is replaced with water, the same etching characteristics are exhibited.

Further, examples of the alkaline type include KOH aqueous solution, NaOH aqueous solution, ammonia water (NH ₄ OH) and the like. Similar to TMAH, the etching rate for SiO ₂ is almost constant and extremely small regardless of the solution concentration.

Examples of the hydrofluoric acid system include a hydrofluoric acid / nitric acid / (water) mixed solution, a hydrofluoric acid / nitric acid / acetic acid / (water) mixed solution, and the like. It exhibits the same concentration / etching characteristics as the hydrogen oxide aqueous solution.

The present invention is characterized by what kind of etchant is used to etch the porous layer as described above, but there are several embodiments in obtaining a good quality SOI substrate.

The method of the present invention will be described below with reference to the drawings.

(Mode 1) First, description will be made with reference to FIGS. 1 and 8.

A single crystal silicon substrate 100 is anodized to form porous silicon 101 (FIG. 1A). At this time, the thickness to be porous is several μm to several tens μ of the surface layer on one side of the substrate.
m. Further, the entire silicon substrate 100 may be anodized.

A method of forming porous silicon will be described with reference to FIG. First, a P-type single crystal silicon substrate 600 is prepared as a substrate. Although it is not impossible even with an N-type, in that case, it is necessary to limit the substrate to a low-resistance substrate, or to irradiate light to the substrate surface to promote generation of holes. The substrate 600 is set in the device as shown in FIG. That is, one side of the substrate is in contact with the hydrofluoric acid-based solution 604, and the negative electrode 60 is provided on the solution side.
6 is taken, and the opposite side is in contact with the positive metal electrode 605. Separately from this, as shown in FIG.
05 'may also have an electric potential via the solution 604'. In any case, porosity occurs from the negative electrode side in contact with the hydrofluoric acid-based solution. As the hydrofluoric acid solution 604,
Generally, concentrated hydrofluoric acid (49% HF) is used. Pure water (H
Diluting with ₂ O) is not preferable because etching will occur from a certain concentration, although it depends on the value of the flowing current. Bubbles are generated from the surface of the substrate 600 during the anodization, and alcohol can be added as a surfactant for the purpose of efficiently removing the bubbles. As alcohol, methanol, ethanol, propanol,
Isopropanol or the like is used. Alternatively, anodizing may be performed while stirring the solution using a stirrer instead of the surfactant. Regarding the negative electrode 606, a material such as gold (A) which is not corroded by the hydrofluoric acid solution is used.
u), platinum (Pt), etc. are used. Positive electrode 605
The material may be a commonly used metal material, but since the hydrofluoric acid-based solution 604 reaches the positive electrode 605 when the anodization is performed on all the substrates 600, the positive electrode 605
It is advisable to coat the surface of the above with a metal film resistant to hydrofluoric acid. The maximum current value for anodization is several hundred mA / c
m ² and the minimum value should not be zero. This value is determined within a range where good quality epitaxial growth can be performed on the surface of the porous silicon. Usually, when the current value is large, the rate of anodization increases, and at the same time, the density of the porous silicon layer decreases. That is, the volume occupied by the holes becomes large. This changes the conditions for epitaxial growth.

The porous layer 101 formed as described above
A non-porous single crystal silicon layer 102 is epitaxially grown thereon (FIG. 1B). The epitaxial growth is performed by general thermal CVD, low pressure CVD, plasma CVD, molecular beam epitaxy, sputtering, or the like. The grown film thickness may be the same as the design value of the SOI layer.

The surface of the epitaxial layer 102 is oxidized to form a SiO ₂ layer 103 (including thermal oxidation) (FIG. 1).
C). This is because when the epitaxial layer is directly bonded to the supporting substrate in the next step, impurities tend to segregate at the bonding interface, and the number of dangling bonds of atoms at the interface increases, resulting in thin film device characteristics. It becomes a factor that makes the instability. However, this step is not necessarily essential, and may be omitted if a device configuration that does not cause the above phenomenon to be considered is considered. Where S
The iO ₂ layer 103 functions as an insulating layer of the SOI substrate, but the insulating layer needs to be formed on at least one surface of the substrates to be bonded, and there are various modes in forming the insulating layer.

In the case of oxidation, it is sufficient that the oxide film thickness is such that it is not affected by contamination from the atmosphere taken into the bonding interface.

The substrate 100 having the epitaxial surface whose surface is oxidized, and the SiO ₂ layer 104 serving as a supporting substrate.
A substrate 110 having a surface of is prepared. Support substrate 110
Is a silicon substrate surface that has been oxidized (including thermal oxidation),
Examples thereof include quartz glass, crystallized glass, and SiO ₂ deposited on an arbitrary substrate.

The two substrates thus prepared are washed and then attached (FIG. 1D). The cleaning method is performed in accordance with a general step of cleaning a semiconductor substrate (for example, before oxidation).

If the substrates are pressed over the entire surface after they are bonded together, it has the effect of increasing the strength of bonding.

Then, the bonded substrates are heat-treated.
The heat treatment temperature is preferably high, but if it is too high, the porous layer 101 may change its structure or impurities contained in the substrate may diffuse into the epitaxial layer. You need to choose a time. Specifically, about 600 to 1100 ° C. is preferable. Some substrates cannot be heat-treated at high temperatures. For example, when the support substrate 110 is made of quartz glass, a temperature difference of 200 ° C.
It can be heat-treated only at a temperature below a certain level. If the temperature is exceeded, the bonded substrates are peeled off or broken by stress. However, the heat treatment needs only to withstand the stress at the time of grinding or etching the bulk silicon 100 performed in the next step. Therefore, the process can be performed by optimizing the surface treatment conditions for activation even at a temperature of 200 ° C. or lower.

Next, the silicon substrate portion 100 and the porous portion 101 are selectively removed, leaving the epitaxial growth layer 102 (FIG. 1E). First, the silicon substrate portion 100 is ground or polished by a surface grinder or the like, or an alkaline solution such as potassium hydroxide or ammonia water, or TMAH.
Etching is performed using an organic alkaline solution such as. In the case of etching, it is effective to perform the etching in a warm solution of 100 ° C. or lower. Since the alkaline solution hardly etches SiO ₂ , if the supporting substrate is glass or a silicon substrate covered with an oxide film, only the silicon substrate portion can be selectively etched. It is also possible to remove by etching with hydrofluoric acid and nitric acid, or an acid mixture obtained by adding acetic acid or the like thereto. However, since the hydrofluoric-nitric acid-based etchant also slightly etches the supporting substrate, it is better to avoid using it for a long time.

The silicon substrate portion 100 is removed by mechanical polishing or etching, and the etching is once terminated when the porous portion 101 is exposed. Then, the exposed porous portion 101 is removed by etching using a solution such that the etching rates for the single crystal silicon and SiO ₂ are both 10 angstroms / minute or less. In order to make the film uniform during etching,
An ultrasonic cleaning device may be used. However, care must be taken because the etching rate is slightly increased by the ultrasonic wave.

Further, the steps described below can be added to the steps described above.

(1) Oxidation of inner walls of pores of porous layer The thickness of the wall between the adjacent pores of the porous silicon layer is several n.
It is very thin, from m to several tens of nm. For this reason, when the porous layer is subjected to a high-temperature treatment, such as during the formation of the epitaxial silicon layer or during the heat treatment after bonding, the pore walls agglomerate, the pore walls become coarse and block the pores, and the etching rate decreases. There are cases. Therefore, after forming the porous layer, it is possible to suppress the coarsening of the pores by forming a thin oxide film on the pore walls.
However, since it is necessary to epitaxially grow a non-porous single crystal silicon layer on the porous layer, only the surface of the inner wall of the pore is oxidized so that single crystallinity remains inside the pore wall of the porous layer. There is a need to. The oxide film formed here preferably has a thickness of several Å to several tens of Å. The oxide film having such a film thickness is 200 ° C. to 700 ° C. in an oxygen atmosphere.
Is formed, and more preferably, it is formed by heat treatment at a temperature of 250 ° C. to 500 ° C.

(2) Hydrogen Annealing Treatment The inventors of the present invention previously disclosed in EP553852A2 that heat treatment in a hydrogen atmosphere removes minute roughness of the silicon surface to obtain a very smooth silicon surface. I showed that. Also in the present invention, annealing in a hydrogen atmosphere can be applied. The hydrogen annealing can be performed, for example, after the formation of the porous silicon layer and before the formation of the epitaxial silicon layer, and separately can be performed on the SOI substrate obtained after the removal of the porous silicon layer by etching. Depending on the hydrogen annealing treatment performed before the formation of the epitaxial silicon layer, a phenomenon occurs in which the outermost surface of the pores is blocked by the migration of hydrogen atoms forming the surface of the porous silicon. If the epitaxial silicon layer is formed with the outermost surface of the hole closed, an epitaxial silicon layer with fewer crystal defects can be obtained. On the other hand, depending on the hydrogen anneal performed after the etching of the porous silicon layer, the effect of smoothing the roughened epitaxial silicon surface by etching and the skipping of boron in the clean room which is inevitably taken into the bonding interface at the time of bonding is called. It has an effect.

(Mode 2) The mode shown in FIG. 2 will be described. 1 to 1110 in FIG. 2 are 10 in FIG.
It corresponds to 0 to 110. In the aspect 1, the surfaces of the _two substrates to be bonded together have the SiO ₂ layer 103 and the Si
Although it was the O ₂ layer 104, it is not absolutely necessary that both surfaces are SiO ₂ layers, and at least one surface may be made of SiO ₂ . The embodiment shown here is an epitaxial silicon layer 1102 formed on a porous silicon layer.
(B1) the surface of which is bonded to the surface of the oxide film 1104 formed on the silicon substrate 1110 (C1), and the surface of the oxide film 1103 formed by thermally oxidizing the surface of the epitaxial silicon layer 1102 (B2) is oxidized. Bonding with the surface of the silicon substrate 1110 that has not been performed (C2)
Things. Also in the embodiment shown here, the other steps are
It can be performed in the same manner as in the first aspect.

(Mode 3) The mode shown in FIG. 3 will be described. 2 that are the same as those in FIG. 2 represent the same parts as those in FIG. In the embodiment shown here, the substrate (B
It is characteristic that a glass material 1210 (C1, C2) such as quartz glass or soda lime glass is used for the substrate to be bonded to the substrate 1, 2). As this mode, the epitaxial silicon layer 1102 (B1) is bonded to the glass substrate 1210 (C1) mode, and the oxide film 1103 formed by thermally oxidizing the surface of the epitaxial silicon layer 1102.
(B2) and the glass substrate 1210 are attached (C2)
An embodiment is shown. In the embodiment shown here, other steps can be performed in the same manner as in the first embodiment.

The present invention will be described in detail below with reference to specific examples.

(Example 1) A 5-inch P-type (100) single crystal silicon substrate (0.1
.About.0.2 .OMEGA.cm) was prepared and set in the apparatus shown in FIG. 8 (A) to perform anodization. As a result, the porous silicon layer 10 having a thickness of 20 μm is formed on the surface of the silicon substrate 100.
1 was formed (FIG. 1 (A)). A 49% HF solution was used as the solution 604 at this time, and the current density was 1 mA / cm ² . The porosification rate at this time was about 1 μm / min, and a porous layer having a thickness of 20 μm was obtained in about 20 minutes.

The porous silicon layer 101 thus obtained
The single crystal silicon layer 102 is formed on the
It was epitaxially grown to a thickness of 5 μm (Fig. 1
(B)). The deposition conditions are as follows.

Gas used: SiH ₄ / H ₂ gas flow rate: 0.62 / 140 (l / min) Temperature: 850 ° C. Pressure: 80 Torr Growth rate: 0.12 μm / min The substrate prepared by the above method in a water vapor atmosphere The oxide film 103 having a thickness of 0.1 μm was obtained by processing at 900 ° C. (FIG. 1).
(C)).

Then, a substrate having the above-mentioned surface oxidized and a 0.5 μm-thick oxide film 104 on the surface prepared separately from the substrate.
The 5-inch substrate 110 having the above was washed with a system using acid / ammonia and spin-dried, and then the treated surfaces were attached to each other (FIG. 1D). After that, heat treatment was performed at 800 ° C. for 6 hours.

After the heat treatment, the side of the silicon substrate 100 was ground to 610 μm by a surface grinding machine to expose the porous silicon 101.

This substrate was subsequently immersed in a selective etching solution, and only the porous portion 101 was selectively etched while applying ultrasonic waves (FIG. 1 (E)). At this time, the composition of the selective etching solution, the etching rate for single crystal silicon, and the etching rate for SiO ₂ were as follows.

Selective etching solution = TMAH aqueous solution (24 ppm) vs. silicon etching rate = 5 angstroms / minute vs. SiO ₂ etching rate = 1 angstroms / minute or less As a result, about 0.2 μm on a silicon oxide film of 0.6 μm
An SOI substrate having a single crystal silicon film of m is completed, and the void density of the SOI film is reduced to about 1/100 as compared with the conventional one in which the porous layer is etched with an etchant having a high etching rate of SiO _2. did.

(Embodiment 2) This will be described with reference to FIG.

Resistivity 0.01 with a thickness of 300 μm
Ω · cm 4-inch P-type (100) silicon substrate 200
Was prepared, and the surface layer was made into a porous silicon layer 201 by 20 μm in the same manner as in Example 1 (FIG. 4 (A)).

An epitaxial layer 202 having a thickness of 0.15 μm was formed on the obtained porous surface in the same manner as in Example 1 (FIG. 4 (B)).

The substrate produced by the above method was oxidized in water vapor at 1000 ° C. to a thickness of 0.1 μm (FIG. 4 (C)).

The substrate 200 whose surface was oxidized and a 4-inch quartz substrate 210 prepared separately from the substrate were cleaned and then mirror surfaces of them were bonded together (FIG. 4D).
Subsequently, heat treatment was performed at 180 ° C. for 24 hours.

Next, a silicon substrate portion 2 having a thickness of 280 μm
00 was etched with a 1:10:10 mixed solution of hydrofluoric acid / nitric acid / acetic acid to expose the porous silicon layer 201 on the surface.

Next, the porous layer 201 was selectively etched with a 1: 300 mixture of hydrofluoric acid / hydrogen peroxide solution (FIG. 4 (E)). The etching rates of the solution used for the selective etching with respect to single crystal silicon and SiO ₂ are as follows.

Silicon = 3 angstrom / min. SiO ₂ = 6 angstrom / min As a result, an SOI substrate having a silicon single crystal thin film of 0.1 μm on a quartz substrate is completed, and the void density of SOI is the conventional SiO ₂ It was reduced to about 1/100 as compared with the case of using a solution having a high etching rate.

(Embodiment 3) This will be described with reference to FIG.

Resistivity 0.01 with a thickness of 400 μm
Ω · cm 5 inch P type (100) silicon substrate 300
Is prepared, and the porous layer 3 having a thickness of 20 μm from the surface is prepared.
01 was formed (FIG. 5 (A)).

An epitaxial layer 302 having a thickness of 0.5 μm was formed on the porous surface of the obtained substrate in the same manner as in Example 1 (FIG. 5 (B)).

The surface of the epitaxial layer 302 of the above substrate was oxidized to 0.2 μm in water vapor at 1000 ° C. to obtain a SiO ₂ layer 303 (FIG. 5 (C)). As a result, the thickness of the silicon single crystal portion of the epitaxial layer was 0.4 μm and the thickness of the oxide film portion was 0.2 μm.

In order to activate the bonding surface of the substrate 300 prepared by the above method and the synthetic quartz substrate 310 prepared separately from the substrate 300, both substrates were subjected to RF plasma treatment (FIG. 5). (D)). The processing conditions are as follows.

Gas used: CF ₄ / O ₂ gas Flow rate: 70/6 (sccm) Pressure: 30 (pa.) RF output: 350 W Treatment time: 30 seconds The above-mentioned treated substrate was washed with 10% hydrogen peroxide solution. Then, the substrate was further rinsed with pure water and then dried to bond the substrates to each other (FIG. 5E). Then, a pressure of 70 tons was applied to the bonded substrates for 10 minutes.

The silicon substrate side was directly etched with a solution without heat-treating the substrate. First, the thermal oxide film covering the silicon substrate was removed with dilute hydrofluoric acid, then immersed in a 2.4% aqueous solution of TMAH and treated at 90 ° C. for about 5 hours. As a result, the bulk silicon portion 300 on the silicon substrate side was entirely etched, and the porous layer 301 was exposed.

Subsequently, the porous portion 301 was removed at room temperature by T
It was selectively etched with a 24 ppm aqueous solution of MAH (FIG. 5 (F)).

The single crystal silicon thin film 302 on the quartz substrate 310 obtained by the above process was patterned into an island shape in the portion corresponding to the active layer of the designed element in accordance with the area, shape and arrangement (FIG. 5 (G )). After patterning, each island region is heated to 1000 ° C. as a first step of forming an element.
In an oxygen atmosphere of 0.05 μm. Therefore, this oxidation step is also combined with heat treatment, and as a result, the SOI having the single crystal silicon thin film with a thickness of about 0.4 μm on the transparent substrate is obtained.
A substrate was obtained. No void was observed.

(Embodiment 4) This will be described with reference to FIG.

Resistivity 0.01 with a thickness of 400 μm
Ω · cm 5-inch P-type (100) silicon substrate 400
Prepared, and the porous layer 4 having a thickness of 20 μm from the surface thereof is prepared.
01 was formed (FIG. 6 (A)).

An epitaxial layer 402 having a thickness of 0.5 μm was formed on the porous surface of the obtained substrate in the same manner as in Example 1 (FIG. 6 (B)).

The surface of the epitaxial layer 402 of the above substrate was oxidized (thermally oxidized) by 0.05 μm in water vapor at 900 ° C. to obtain a SiO ₂ layer 403 (FIG. 6 (C)).

The substrate 400 prepared by the above method and a 5-inch synthetic quartz substrate 410 prepared separately therefrom.
Were washed and then attached (FIG. 6 (D)). Further, the substrate was heat-treated at 180 ° C. for 24 hours.

From the silicon substrate side of the above-mentioned substrate, a surface grinding machine was used to grind the silicon substrate to a position where 100 μm was left (FIG. 6 (E)). Then add 300 ℃, 24
Heat treatment was performed for a time.

The remaining bulk portion 400 was subsequently ground by a surface grinder to expose the porous silicon portion 401.

Subsequently, the porous layer was selectively etched with 0.04% ammonia water (FIG. 6 (F)). The etching rates of the solution used for selective etching with respect to single crystal silicon and SiO ₂ were as follows.

Silicon = 4 angstrom / min. SiO ₂ = 1 angstrom / min or less As a result, an SOI substrate having a single crystal silicon thin film 402 having a thickness of about 0.4 μm on a quartz substrate is completed.
The void density of was reduced to about 1/100 as compared with the case of using the conventional solution having a high etching rate for SiO ₂ .

(Fifth Embodiment) A description will be given with reference to FIG.

Resistivity 0.01 having a thickness of 300 μm
4 inch P type (100) silicon substrate 500 of Ω · cm
Was prepared, and the surface layer was made into porous silicon 501 by 20 μm in the same manner as in Example 1 (FIG. 7 (A)).

An epitaxial layer 502 having a thickness of 0.15 μm was formed on the obtained porous surface in the same manner as in Example 1 (FIG. 7 (B)).

The surface of the epitaxial layer 502 of the above substrate was thermally oxidized in water vapor at 1000 ° C. to a thickness of 0.1 μm to obtain a SiO ₂ layer 503 (FIG. 7C). As a result, the thickness of the silicon single crystal portion of the epitaxial layer was 0.1 μm and the thickness of the oxide film portion was 0.1 μm.

The epitaxial surface of the above-mentioned substrate and a bare silicon substrate 510 prepared separately from the above-mentioned substrate were bonded together after acid / alkali cleaning (FIG. 7).
(D)). Further, the substrate was annealed at 1000 ° C. for 30 minutes.

Substrate 5 on the epitaxially grown side
00 is ground by a surface grinder to form a porous silicon part 5
01 was exposed.

Subsequently, hydrofluoric acid (49%) / nitric acid (70
%) / Acetic acid (100%) / water each 1: 80: 80/3
The porous layer was selectively etched using the solution mixed in 40 (FIG. 7 (E)). The etching rates for the single crystal silicon and SiO ₂ of the solution used for the selective etching are as follows.

Silicon = 4 Å / min. SiO ₂ = 3 Å / min As a result, 0.1 μm was formed on the silicon oxide film of 0.1 μm.
The SOI substrate with the single crystal silicon film of
The void density of the SOI film is about 1 / th compared to the case of using a conventional solution having a high etching rate for SiO ₂ .
It decreased to 100.

(Embodiment 6) This will be described with reference to FIG.

Resistivity 0.01 with a thickness of 300 μm
4 inch P type (100) silicon substrate 500 of Ω · cm
Was prepared, and the surface layer was made into porous silicon 501 by 20 μm in the same manner as in Example 1 (FIG. 7 (A)).

The substrate thus obtained was placed in an oxygen atmosphere for 4 hours.
The temperature was held at 00 ° C for 1 hour to perform heat treatment. By this heat treatment, a very thin oxide film was formed on the surface of the porous silicon layer 501 and the pore walls.

Next, the oxide film formed on the outermost surface of the porous silicon layer 501 is left as it is by immersing the surface of the porous layer 501 in the HF solution, leaving the oxide film formed on the pore walls of the porous layer 501 as it is. The porous single crystal silicon layer was exposed by removing. Then, the substrate was subjected to 1100 in a hydrogen atmosphere.
After heat treatment is performed at a temperature of 7 ° C. for 7 minutes to close the pores on the surface of the porous silicon layer, dichlorosilane is introduced into the film forming chamber as a raw material gas for the epitaxial silicon layer to form the epitaxial silicon layer 502.
Was formed to a thickness of 0.15 μm (FIG. 7 (B)). Then, the surface of the epitaxial silicon layer 502 was thermally oxidized to form a thermal oxide film 503 (FIG. 7C). After this,
The surface of the thermal oxide film 503 and a silicon substrate 510 prepared separately from the surface of the thermal oxide film 503 which has not been oxidized are treated with an acid.
After performing alkali cleaning, they were attached (Fig. 7).
(D)). Further, the substrate was annealed at 1000 ° C. for 30 minutes.

Then, the substrate 500 on the side on which the epitaxial layer was formed was ground by a surface grinder with a part left, and the remaining part was removed by etching to expose the porous silicon part 501.

Subsequently, hydrofluoric acid (49%) / nitric acid (70
%) / Acetic acid (100%) / water each 1: 80: 80: 3
The porous layer was selectively etched using the solution mixed in 40 (FIG. 7 (E)). The etching rates for the single crystal silicon and SiO ₂ of the solution used for the selective etching are as follows.

To silicon = 4 angstrom / min. To SiO ₂ = 3 angstrom / min.
Heat treatment was performed at a temperature of ° C.

As a result, an SOI substrate having a 0.1 μm single crystal silicon film on a 0.1 μm silicon oxide film is completed, and the void density of the SOI film is the same as that of a conventional SiO film.
_It was reduced to about 1/200 as compared with the case of using a solution having a high etching rate for ₂ .

[Brief description of drawings]

FIG. 1 is a schematic view showing an example of a process of the present invention.

FIG. 2 is a schematic view showing an example of a process of the present invention.

FIG. 3 is a schematic view showing an example of a process of the present invention.

FIG. 4 is a schematic view showing one example of the process of the present invention.

FIG. 5 is a schematic view showing an example of a process of the present invention.

FIG. 6 is a schematic view showing an example of a process of the present invention.

FIG. 7 is a schematic view showing an example of a process of the present invention.

FIG. 8 is a schematic view of an apparatus for making a silicon substrate porous.

FIG. 9 is a graph showing the solution concentration dependence of the etching rate of TMAH with respect to single crystal silicon and SiO ₂ .

FIG. 10 is a graph showing the hydrofluoric acid concentration dependence of the etching rate of hydrofluoric acid / hydrogen peroxide mixture solution with respect to single crystal silicon and SiO ₂ .

[Explanation of symbols]

100 single crystal silicon substrate 101 porous silicon 102 non-porous single crystal silicon layer 103 SiO ₂ layer 104 SiO ₂ layer 110 supporting substrate 1102 epitaxial silicon layer 1110 silicon substrate 1104 oxide film 1103 oxide film 1210 glass material

 ─────────────────────────────────────────────────── ─── Continued Front Page (72) Inventor Takao Yonehara 3-30-2 Shimomaruko, Ota-ku, Tokyo Canon Inc.

Claims (20)

[Claims] 1. A step of preparing a first substrate in which a non-porous single crystal silicon layer is epitaxially grown on a porous silicon layer obtained by making a silicon substrate porous, the first substrate and the second substrate A step of bonding the substrate and a substrate with a silicon oxide layer on a bonding surface of at least one of the substrates so that the non-porous single crystal silicon layer is located inside the bonded substrate; In a method for manufacturing a semiconductor substrate, which comprises a step of etching and removing a porous silicon layer, the porous substrate is formed by using an etching solution having an etching rate of 10 angstroms / minute or less for both the non-porous single crystal silicon layer and the silicon oxide layer. A method of manufacturing a semiconductor substrate, which comprises removing a silicon layer. 2. The method for manufacturing a semiconductor substrate according to claim 1, wherein the porosification is performed by anodization. 3. The method of manufacturing a semiconductor substrate according to claim 1, wherein the silicon oxide layer is formed on the side of the first substrate. 4. The method for manufacturing a semiconductor substrate according to claim 3, wherein the silicon oxide layer is obtained by thermally oxidizing the surface of the epitaxially grown non-porous single crystal silicon layer. 5. The method of manufacturing a semiconductor substrate according to claim 3, wherein the second substrate is a single crystal silicon substrate. 6. The method of manufacturing a semiconductor substrate according to claim 5, wherein an oxide layer is formed on a bonding surface of the second substrate. 7. The method of manufacturing a semiconductor substrate according to claim 5, wherein the bonding surface of the second substrate is made of single crystal silicon. 8. The method of manufacturing a semiconductor substrate according to claim 3, wherein the second substrate is made of glass. 9. The method of manufacturing a semiconductor substrate according to claim 1, wherein the silicon oxide layer is formed on the side of the second substrate. 10. The method of manufacturing a semiconductor substrate according to claim 9, wherein the silicon oxide layer is formed by thermally oxidizing a single crystal silicon substrate. 11. The method of manufacturing a semiconductor substrate according to claim 9, wherein the silicon oxide layer constitutes a glass substrate. 12. The bonding surface of the first substrate comprises:
The method for manufacturing a semiconductor substrate according to claim 9, wherein the epitaxially grown non-porous single crystal silicon layer is present. 13. The method of manufacturing a semiconductor substrate according to claim 1, wherein the non-porous single crystal silicon layer is obtained by oxidizing an inner wall of a hole of the porous layer and then epitaxially growing the inner wall. 14. The method of manufacturing a semiconductor substrate according to claim 13, wherein the non-porous single crystal silicon layer is obtained by heat-treating the porous layer in a hydrogen atmosphere and then epitaxially growing the layer. 15. The method of manufacturing a semiconductor substrate according to claim 1, wherein the etching of the porous silicon layer is performed with a mixed etching solution of hydrofluoric acid and hydrogen peroxide solution. 16. The method of manufacturing a semiconductor substrate according to claim 1, wherein the etching of the porous silicon layer is performed with hydrofluoric acid, nitric acid, or a mixed etching solution obtained by adding acetic acid thereto. 17. The method of manufacturing a semiconductor substrate according to claim 1, wherein the etching of the porous silicon layer is performed with an alkaline or organic alkaline etchant. 18. The method of manufacturing a semiconductor substrate according to claim 1, wherein the etching of the porous silicon layer is performed with a TMAH aqueous solution having a liquid concentration of about 50 ppm or less. 19. The etching of the porous silicon layer is performed using a mixed solution of hydrofluoric acid and hydrogen peroxide as a solution having a hydrofluoric acid concentration of about 0.5% or less relative to the hydrogen peroxide. A method for manufacturing a semiconductor substrate according to claim 1. 20. The method of manufacturing a semiconductor substrate according to claim 1, wherein after the etching removal, heat treatment is performed in a hydrogen atmosphere.