JPH06216027A - Manufacture of semiconductor substrate - Google Patents

Manufacture of semiconductor substrate

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Publication number
JPH06216027A
JPH06216027A JP2163893A JP2163893A JPH06216027A JP H06216027 A JPH06216027 A JP H06216027A JP 2163893 A JP2163893 A JP 2163893A JP 2163893 A JP2163893 A JP 2163893A JP H06216027 A JPH06216027 A JP H06216027A
Authority
JP
Japan
Prior art keywords
porous
etching
semiconductor substrate
substrate
single crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2163893A
Other languages
Japanese (ja)
Other versions
JP3337735B2 (en
Inventor
Shunsuke Inoue
俊輔 井上
Akira Okita
彰 沖田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP02163893A priority Critical patent/JP3337735B2/en
Publication of JPH06216027A publication Critical patent/JPH06216027A/en
Application granted granted Critical
Publication of JP3337735B2 publication Critical patent/JP3337735B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To obtain a highly reliable semiconductor substrate by effectively removing particles by a method wherein the semiconductor substrate is brought into a porous state, the surface layer is removed to the specific thickness by etching, and non-porous semiconductor single crystal is grown. CONSTITUTION:A porous Si layer 2 is formed by providing multiple holes on the surface of a semiconductor Si substrate 1. Then, after the surface layer is thinned off by etching to the thickness of 30Angstrom or more and less than three times of hole diameter using an etchant of 20 to 60 deg.C, a single crystal Si 3 is epitaxially grown on the porous surface. An alkaline solution, especially NH4OH or KOH, and trimethyl aluminum hydrate are considered desirable as the etchant. Thus, by using a low etching temperature and by limiting the amount of etching, the particles on the surface can be removed by etching.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は薄膜トランジスタ等半導
体素子基板において活性層となる半導体薄膜の製造方法
に関する発明である。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor thin film which becomes an active layer in a semiconductor element substrate such as a thin film transistor.

【0002】[0002]

【従来の技術】絶縁層上に単結晶Si層を形成してなる
SOI(シリコンオンインシュレータ)の技術は、半導
体素子基板において、単結晶Siがα(アモルファス)
−Siや多結晶Siに比べて多くの優位点を有している
ことから広く研究され、近年注目されている薄膜トラン
ジスタ(TFT)等への利用が期待されている。
2. Description of the Related Art In the technology of SOI (silicon on insulator) in which a single crystal Si layer is formed on an insulating layer, in a semiconductor element substrate, single crystal Si is α (amorphous).
Since it has many advantages over -Si and polycrystalline Si, it has been widely studied and is expected to be used for a thin film transistor (TFT) or the like which has been attracting attention in recent years.

【0003】一方、半導体分野においては、非常に微細
な加工を行ない、原子レベルでの動作を取り扱うため
に、その形状のわずかな違いが、最終的な装置の特性を
決定づけることになる。従って、通常のSiウエハの場
合には、ウエットエッチングによりウエハ表面層を除去
する等の洗浄操作によりパーティクルや傷の存在しない
Si基板を得ている。
On the other hand, in the semiconductor field, since very fine processing is performed and operation at the atomic level is handled, a slight difference in the shape determines the characteristics of the final device. Therefore, in the case of a normal Si wafer, a Si substrate free from particles and scratches is obtained by a cleaning operation such as removing the wafer surface layer by wet etching.

【0004】半導体基板の洗浄工程において、NH4
22 /H2 O溶液を用いた洗浄は俗に「SC−1」
洗浄と呼ばれ(小川、小林、中嶋:ウエット洗浄技術−
パーティクル対策を中心として−、月刊Semicon
ductor World1992,3月号 p.11
1〜p.115)、1970年にRCA(Radio
Corporation of America)のW
erner Kernらにより考案された[W.Ker
n,D.A.Puotiner:”Cleaning
Solutions Based on Hydrog
en Peroxide for use in Si
licon Semiconductor Techn
ology”,RCA Review,vol.46,
p.81(1983)]。Kernらは、NH4 OH:
22 :H2 O=1:1:5又は1:2:7の溶液を
75〜80℃に加温し、10分程クリーニングすること
を推奨している。
In the process of cleaning the semiconductor substrate, NH 4 /
Cleaning using H 2 O 2 / H 2 O solution is commonly called “SC-1”.
Called cleaning (Ogawa, Kobayashi, Nakajima: Wet cleaning technology-
Focusing on particle measures-, Monthly Semicon
doctor World 1992, March issue p. 11
1-p. 115), 1970 in RCA (Radio
W of Corporation of America)
Invented by Erner Kern et al. [W. Ker
n, D. A. Putiner: "Cleaning
Solutions Based on Hydrog
en Peroxide for use in Si
licon Semiconductor Techn
"," RCA Review, vol.46,
p. 81 (1983)]. Kern et al., NH 4 OH:
It is recommended that a solution of H 2 O 2 : H 2 O = 1: 1: 5 or 1: 2: 7 be heated to 75 to 80 ° C. and cleaned for about 10 minutes.

【0005】SC−1は、機械的な力を用いずに、パー
ティクルを除去できる優れた処理法であり、最も一般的
に用いられている。SC−1のクリーニング機構は未だ
十分には解明されていないが、NH4 OHによるSiの
エッチングとpH大によるゼータ電位の低下が考えられ
る。即ち、各成分は、Siと以下のような反応を行なっ
ている。
SC-1 is an excellent processing method capable of removing particles without using mechanical force, and is most commonly used. Although the cleaning mechanism of SC-1 has not been fully clarified yet, it is considered that the etching of Si by NH 4 OH and the decrease of zeta potential due to the increase of pH are performed. That is, each component reacts with Si as follows.

【0006】 H2 O,NH4 OH: Si+2OH- +H2 O→SiO3 2- +2H2 ……(1) H22 : Si+2H22 →SiO2 +2H2 O ……(2) 溶液中では、(1)の反応によりSiがエッチングされ
ることで表面のパーティクルを除去し、(2)の反応に
よりSiを酸化して表面をNH4 OHによりエッチング
されないSiO2 にしている。即ち、(1)、(2)の
反応が競合していて、Siのエッチングが極端に進行し
ない様にしている。また、OH- により液のpHは7よ
り大となり(1:1:5溶液でpHは約10)、Si表
面のゼータ電位を低下させることにより、一度除去され
たパーティクルが再び表面に付着しない様にしている。
H 2 O, NH 4 OH: Si + 2OH + H 2 O → SiO 3 2− + 2H 2 (1) H 2 O 2 : Si + 2H 2 O 2 → SiO 2 + 2H 2 O (2) In solution Then, Si is etched by the reaction of (1) to remove particles on the surface, and Si is oxidized by the reaction of (2) to make the surface SiO 2 which is not etched by NH 4 OH. That is, the reactions of (1) and (2) are competing with each other so that the etching of Si does not proceed extremely. Further, OH - pH of the liquid by large becomes than 7 (1: 1: 5 pH in the solution of about 10), by lowering the zeta potential of the Si surface, once removed particles as not to adhere to the surface again I have to.

【0007】従って原理的には、Siエッチング作用を
有するアルカリ性溶液が有れば良く、NH4 OHの代わ
りにKOHを用いることもできる。H22 は原理的に
は不要であるが、NH4 OHのエッチング反応をコント
ロールする働きを有する。
Therefore, in principle, it suffices to have an alkaline solution having a Si etching action, and KOH can be used instead of NH 4 OH. H 2 O 2 is not necessary in principle, but has a function of controlling the etching reaction of NH 4 OH.

【0008】バルクのSi、SiO2 のNH4 OHによ
るエッチングの速度及びH22 濃度の影響は、小川、
小林らにより測定されている。それによると、H22
の濃度が高い程NH4 OHによるSiのエッチング速度
は低下し、また、SiO2 のエッチングレートはH2
2 の濃度に関わらずNH4 OH濃度で決まる。また、パ
ーティクル除去能力は、H2 O=1に対しH22
0.1ではNH4 OH≧0.1で実用上十分なパーティ
クル除去能力が得られることがわかっている[中嶋、小
林、小川:”NH4 OH/H22 洗浄液の混合比率と
その洗浄効果”,平2春季応用物理学会講演予稿集
p.665(1990)]。
The effects of the etching rate of bulk Si and SiO 2 by NH 4 OH and the concentration of H 2 O 2 are as follows.
Measured by Kobayashi et al. According to it, H 2 O 2
The higher the concentration of Si, the lower the etching rate of Si by NH 4 OH, and the etching rate of SiO 2 is H 2 O.
It is determined by the NH 4 OH concentration regardless of the concentration of 2 . In addition, the particle removal capability is H 2 O = 1 ≤ H 2 O 2
When 0.1, NH 4 OH ≧ 0.1 is known to be sufficient for practical particle removal [Nakajima, Kobayashi, Ogawa: “NH 4 OH / H 2 O 2 cleaning solution mixture ratio and its cleaning Effect ”, Hei 2 Spring Society of Applied Physics
p. 665 (1990)].

【0009】[0009]

【発明が解決しようとする課題】本出願人は上記したS
OI技術の一つとして多孔質Siを用い、その表面に単
結晶Siをエピタキシャル成長させる方法を達成した。
この方法によると、ほとんど欠陥の無い単結晶Si基板
が得られる。本方法を簡単に説明する。
The applicant of the present invention has the above-mentioned S
As one of the OI techniques, a method has been achieved in which porous Si is used and single crystal Si is epitaxially grown on the surface thereof.
According to this method, a single crystal Si substrate having almost no defects can be obtained. The method will be briefly described.

【0010】図1に多孔質Siを用いた単結晶Si基板
の製造工程を示した。先ず第1のSi基体(バルク)1
表面を多孔質化し、多孔質Si層2を形成する(a)、
(b)。この多孔質表面に単結晶Si3をエピタキシャ
ル成長させる(c)。一方、第2のSi基体4を用意
し、その表面に絶縁層5を形成し、該絶縁層5と上記単
結晶Si3を貼り合わせ(d)、第1のSi基体側をエ
ッチング除去しSi基板を得る(e)。
FIG. 1 shows a manufacturing process of a single crystal Si substrate using porous Si. First, the first Si substrate (bulk) 1
The surface is made porous to form a porous Si layer 2 (a),
(B). Single-crystal Si3 is epitaxially grown on this porous surface (c). On the other hand, a second Si substrate 4 is prepared, an insulating layer 5 is formed on the surface thereof, the insulating layer 5 and the single crystal Si3 are bonded (d), and the first Si substrate side is removed by etching to obtain a Si substrate. (E).

【0011】しかしながら、実際には多孔質Si表面に
微細なパーティクルが存在し、該パーティクル部分で単
結晶Siのエピタキシャル成長が阻害され、図4(a)
に示した様に、欠陥を生じ、最終的なSi基板にボイド
を生じてしまう。該ボイド等単結晶Si基板に生じた欠
陥は直接半導体素子の特性に影響し、半導体素子基板の
信頼性を低下させる原因となる。従って、多孔質Si表
面のパーティクルを除去することが良質な単結晶Si基
板を製造する上で必須要件となっている。
However, in reality, fine particles are present on the surface of the porous Si, and the epitaxial growth of the single crystal Si is hindered by the particles, so that FIG.
As shown in (1), defects are generated and voids are generated in the final Si substrate. The defects such as the voids generated in the single crystal Si substrate directly affect the characteristics of the semiconductor element, and cause the reliability of the semiconductor element substrate to be deteriorated. Therefore, removal of particles on the surface of porous Si is an essential requirement for producing a good-quality single crystal Si substrate.

【0012】しかしながら多孔質基板の表面積は、多孔
質の程度によっても異なるが、5インチウエハ表面で2
00m2 〜400m2 にも及ぶ。そのため、Siのエッ
チングレート、酸化Siのエッチングレートはバルクの
場合に比べて10〜100倍にも及ぶ。従って、バルク
Siに対して有効な洗浄法が、多孔質上でも有効とは限
らず、表面を荒らす等のマイナス効果を考慮する必要が
有る。
However, the surface area of the porous substrate varies depending on the degree of porosity, but the surface area of the 5-inch wafer is 2
It extends from 00 m 2 to 400 m 2 . Therefore, the etching rate of Si and the etching rate of oxidized Si are 10 to 100 times as high as those in the case of bulk. Therefore, a cleaning method effective for bulk Si is not always effective even for porous materials, and it is necessary to consider a negative effect such as roughening the surface.

【0013】本発明者等の実験によれば、NH4 OH:
22 :H2 O=0.05:1:5の溶液で80℃、
10分間の洗浄を、多孔質度=30%の基板に施した後
にエピタキシャル成長を行なったところ、エピタキシャ
ル層に1×106 個/cm2の面密度の欠陥が観測され
た。これは本来上記条件では30nm程度のSiが除去
されているはずであるのに、多孔質基板上の高反応性の
ために、10〜100倍(300〜3000nm)のS
iが除去されてしまったために、多孔質の孔径(約60
nm)が著しく変化したためである。
According to experiments conducted by the present inventors, NH 4 OH:
H 2 O 2 : H 2 O = 0.05: 1: 5 solution at 80 ° C.,
When a substrate having a porosity of 30% was washed for 10 minutes and then epitaxially grown, defects having an areal density of 1 × 10 6 / cm 2 were observed in the epitaxial layer. This is because although about 30 nm of Si should have been originally removed under the above conditions, it is 10 to 100 times (300 to 3000 nm) of S due to the high reactivity on the porous substrate.
Since i has been removed, the pore size of the porous (about 60
nm) has changed significantly.

【0014】従来、このような反応性の違いによる問題
を回避するために、希HF溶液及び純水で洗浄を行なう
方法が取られていた。希HF溶液を用いれば、単結晶S
i基板の作製工程において要となっているエピタキシャ
ル成長直前の表面自然酸化膜除去効果が得られ、都合の
良い洗浄方法であった。
Conventionally, in order to avoid such a problem due to the difference in reactivity, a method of cleaning with a diluted HF solution and pure water has been used. If a dilute HF solution is used, single crystal S
This is a convenient cleaning method because the effect of removing the surface natural oxide film immediately before the epitaxial growth, which is essential in the i substrate manufacturing process, is obtained.

【0015】しかしながら、希HFのみの洗浄では多孔
質表面のパーティクルは約20%しか除去できず、パー
ティクル除去の機能を十分に果たしているとは言えなか
った。
However, only about 20% of the particles on the porous surface can be removed by washing only with diluted HF, and it cannot be said that the particle removing function is sufficiently fulfilled.

【0016】本発明は上記問題点に鑑み、半導体基板の
製造方法において、パーティクルを効率良く除去し、信
頼性の高い半導体基板を提供することを目的としてい
る。
In view of the above problems, it is an object of the present invention to provide a highly reliable semiconductor substrate by efficiently removing particles in a method of manufacturing a semiconductor substrate.

【0017】[0017]

【課題を解決するための手段】本発明は、半導体基体を
多孔質化し、20〜60℃のエッチング溶液で表面層を
30Å以上孔径の3倍以下の厚さまでエッチング除去し
た後、非多孔質の半導体単結晶を成長させることを特徴
とする半導体基板の製造方法である。本発明において、
上記エッチング溶液としては、アルカリ性溶液、特にN
4OH或いはKOH、TMAH(トリメチルアルミニ
ウムハイドレイト)が好ましく用いられ、更に、HN4
OH、H22、H2Oの混合溶液、KOH、H22、H2
Oの混合溶液、TMAH、H22、H2Oの混合溶液が
好ましく用いられる。以下、半導体分野において最も広
く用いられているSiを例に本発明を詳細に説明する。
According to the present invention, a semiconductor substrate is made porous, and after the surface layer is removed by etching with an etching solution at 20 to 60 ° C. to a thickness of 30 Å or more and 3 times or less of the pore diameter, a non-porous material is obtained. A method of manufacturing a semiconductor substrate, which comprises growing a semiconductor single crystal. In the present invention,
The etching solution is an alkaline solution, especially N 2.
H 4 OH or KOH or TMAH (trimethylaluminum hydrate) is preferably used, and further HN 4
OH, H 2 O 2 , H 2 O mixed solution, KOH, H 2 O 2 , H 2
A mixed solution of O and a mixed solution of TMAH, H 2 O 2 and H 2 O are preferably used. Hereinafter, the present invention will be described in detail by taking Si, which is most widely used in the semiconductor field, as an example.

【0018】先ず本発明に係る多孔質Siについて説明
する。多孔質Siは、Uhlir等によって1956年
に半導体の電解研磨の研究過程において発見された
[A.Uhlir,Bell Syst.Tech.
J.,vol 35,333(1956)]。また、ウ
ナガミ等は、陽極化成におけるSiの溶解反応を研究
し、HF溶液中のSiの陽極反応には正孔が必要であ
り、その反応は、次の様であると報告している[T.ウ
ナガミ:J.Electrochem.Soc.,vo
l.127,476(1980)]。
First, the porous Si according to the present invention will be described. Porous Si was discovered by Uhir et al. In 1956 in the course of research on electrolytic polishing of semiconductors [A. Uhir, Bell System. Tech.
J. , Vol 35, 333 (1956)]. In addition, Unami et al. Studied the dissolution reaction of Si in anodization and reported that the anodic reaction of Si in HF solution requires holes, and the reaction is as follows [T. . Unagami: J. Electrochem. Soc. , Vo
l. 127, 476 (1980)].

【0019】Si+2HF+(2−n)e+ →SiF2
+2H+ +ne- SiF2 +2HF→SiF4 +H2 SiF4 +2HF→H2 SiF6 又は、 Si+4HF+(4−λ)e+ →SiF4 +4H+ +λ
- SiF4 +2HF→H2 SiF6 ここで、e+ 及びe- はそれぞれ、正孔と電子を表して
いる。また、n及びλは夫々Si1原子が溶解するため
に必要な正孔の数であり、n>2又はλ>4なる条件が
満たされた場合に多孔質Siが形成されるとしている。
Si + 2HF + (2-n) e + → SiF 2
+ 2H + + ne - SiF 2 + 2HF → SiF 4 + H 2 SiF 4 + 2HF → H 2 SiF 6 or Si + 4HF + (4-λ) e + → SiF 4 + 4H + + λ
e SiF 4 + 2HF → H 2 SiF 6 Here, e + and e respectively represent a hole and an electron. Further, n and λ are the numbers of holes necessary for dissolving Si1 atoms, respectively, and porous Si is formed when the condition of n> 2 or λ> 4 is satisfied.

【0020】このように、多孔質Siを作成するために
は、正孔が必要であり、N型Siに比べてP型Siの方
が多孔質Siに変質し易い。しかし、N型Siも正孔に
注入があれば、多孔質Siに変質することが知られてい
る。[R.P.Holmstrom and J.Y.
Chi.Appl.Phys.Lett.vol.4
2,386(1983)]。
As described above, holes are required to form porous Si, and P-type Si is more easily transformed into porous Si than N-type Si. However, it is known that N-type Si is also transformed into porous Si if holes are injected. [R. P. Holmstrom and J. Y.
Chi. Appl. Phys. Lett. vol. Four
2, 386 (1983)].

【0021】このようにして作成された多孔質Siは、
単結晶Siの密度2.33g/cm3 に比べて、HF溶
液濃度を50〜20%に変化させることで、その密度を
1.1〜0.6g/cm3 の範囲に変化させることがで
きる。この多孔質Si層は、透過型電子顕微鏡による観
察によれば、平均約600Å程度の径の孔が形成され
る。その密度は単結晶Siに比べると、半分以下になる
にも関わらず、単結晶性は維持されており、多孔質層の
上部へ単結晶Siをエピタキシャル成長させることがで
きる。
The porous Si produced in this way is
By changing the HF solution concentration to 50 to 20% as compared with the density of single crystal Si of 2.33 g / cm 3 , the density can be changed to the range of 1.1 to 0.6 g / cm 3. . According to observation with a transmission electron microscope, pores having an average diameter of about 600 Å are formed in this porous Si layer. Despite its density being less than half that of single crystal Si, single crystallinity is maintained, and single crystal Si can be epitaxially grown on the upper part of the porous layer.

【0022】一般に単結晶Siを酸化すると、その体積
は約2.2倍に増大するが、多孔質の密度を制御するこ
とにより、その体積膨張を抑制することが可能となり、
基体の反りと、表面残留単結晶層に導入されるクラック
を回避できる。単結晶Siの多孔質Siに対する酸化後
の体積比Rは次の様に表すことができる。
Generally, when single-crystal Si is oxidized, its volume is increased about 2.2 times, but it is possible to suppress the volume expansion by controlling the density of the porous material.
Warpage of the substrate and cracks introduced into the surface residual single crystal layer can be avoided. The volume ratio R of single crystal Si after being oxidized to porous Si can be expressed as follows.

【0023】R=2.2×(A/2.33) ここで、Aは多孔質Siの密度である。もし、R=1、
即ち酸化後の体積膨張がない場合には、A=1.06
(g/cm3 )となり、多孔質Siの密度を1.06に
すれば、体積膨張を抑制することができる。
R = 2.2 × (A / 2.33) where A is the density of porous Si. If R = 1,
That is, if there is no volume expansion after oxidation, A = 1.06
(G / cm 3 ), and if the density of porous Si is set to 1.06, volume expansion can be suppressed.

【0024】また、多孔質層はその内部に大量の空隙が
形成されているために、密度が半分以下に減少する。そ
の結果、体積に比べて表面積が飛躍的に増大するため、
その化学エッチング速度は、非多孔質Si層のエッチン
グ速度に比べて、著しく増速される。
Further, since the porous layer has a large amount of voids formed therein, its density is reduced to less than half. As a result, the surface area increases dramatically compared to the volume,
Its chemical etching rate is significantly enhanced compared to the etching rate of the non-porous Si layer.

【0025】本発明の製造方法は、上記多孔質Si基体
の表面をエッチング処理する工程に特徴を有する。即
ち、ウエットエッチングに用いるエッチング溶液の温度
を従来よりも低い温度に設定し、エッチング量を特定の
範囲内に限定することにより、孔のエッチング量を単結
晶Siのエピタキシャル成長に影響を及ぼさない程度に
抑えて表面のパーティクルをエッチング除去し、半導体
基板の欠陥を防止したものである。
The manufacturing method of the present invention is characterized by the step of etching the surface of the porous Si substrate. That is, by setting the temperature of the etching solution used for wet etching to a temperature lower than that of the conventional method and limiting the etching amount within a specific range, the etching amount of the holes is set to an extent that does not affect the epitaxial growth of single crystal Si. It suppresses and removes particles on the surface by etching to prevent defects in the semiconductor substrate.

【0026】本発明において、第1のSi基体の多孔質
化の条件は特に限定されない。例えば下記の条件が好ま
しく用いられる。
In the present invention, the conditions for making the first Si substrate porous are not particularly limited. For example, the following conditions are preferably used.

【0027】電流密度J=10-3〜100 A/cm2 好ましくは10-2〜10-1A/cm2 溶液=HF(49%):C25 OH:H2 O 多孔質層の膜厚=0.1〜100μm 好ましくは1〜10μm Porosity=20〜50% 本発明の特徴である、多孔質Si基体の表面エッチング
処理において、上記した溶液の温度及びエッチング量以
外の条件は、最終的に多孔質Si基体をエッチング除去
する際の条件と同じで構わない。例えば次のような条件
が好ましく用いられる。
Current density J = 10 -3 to 10 0 A / cm 2 preferably 10 -2 to 10 -1 A / cm 2 solution = HF (49%): C 2 H 5 OH: H 2 O porous layer Film thickness of 0.1 to 100 μm, preferably 1 to 10 μm Porosity = 20 to 50% In the surface etching treatment of the porous Si substrate, which is a feature of the present invention, the conditions other than the temperature of the solution and the etching amount are: The conditions may be the same as those used when finally removing the porous Si substrate by etching. For example, the following conditions are preferably used.

【0028】 エッチング液=NH4 OH:H22 :H2 O H2 O=1に対して、NH4 OH=10-4〜10-122 =0〜1 望ましくは、NH4 OH=10-3〜0.05 H22 =10-3〜0.5 本発明において、溶液の温度は20〜60℃、好ましく
は30〜50℃である。また、本発明においてエッチン
グ量は30Å以上孔径の3倍以下、即ち前記した通り孔
径が約600Åであるから、1800Å以下になるよう
にエッチング時間等を設定する。好ましくは、40Å以
上で孔径の2倍以下である。
Etching solution = NH 4 OH: H 2 O 2 : H 2 OH With respect to H 2 O = 1, NH 4 OH = 10 −4 to 10 −1 H 2 O 2 = 0 to 1 Desirably, NH 4 OH = 10 −3 to 0.05 H 2 O 2 = 10 −3 to 0.5 In the present invention, the temperature of the solution is 20 to 60 ° C., preferably 30 to 50 ° C. Further, in the present invention, the etching amount is 30 Å or more and 3 times or less of the hole diameter, that is, since the hole diameter is about 600 Å as described above, the etching time and the like are set so as to be 1800 Å or less. Preferably, it is not less than 40Å and not more than twice the hole diameter.

【0029】[0029]

【実施例】【Example】

(実施例1)SC−1エッチング溶液(NH4 OH:H
22 :H2 O=0.05:1:5)を用い、該溶液に
よるエッチング、純水洗浄10分間、温水(90℃)洗
浄10分間、純水洗浄10分間の工程において、上記溶
液の温度を変えて0.5μm径以上のパーティクル除去
率、及び多孔質表面に成長したエピタキシャル層の過剰
エッチングによる欠陥密度との関係を測定した(図
2)。本実施例では、20〜60℃の温度範囲におい
て、パーティクル除去効果を持ちながら、多孔質表面に
は大きな影響を与えていないことがわかる。尚、温水洗
浄を行なうことにより、アンモニウム洗浄後に付着し易
いAlを除去することができる。
(Example 1) SC-1 etching solution (NH 4 OH: H
2 O 2 : H 2 O = 0.05: 1: 5), and using the above solution in the steps of etching with the solution, washing with pure water for 10 minutes, washing with warm water (90 ° C.) for 10 minutes, and washing with pure water for 10 minutes. The temperature was changed to measure the relationship between the removal rate of particles having a diameter of 0.5 μm or more and the defect density due to excessive etching of the epitaxial layer grown on the porous surface (FIG. 2). In this example, it can be seen that in the temperature range of 20 to 60 ° C., it has a particle removing effect but does not significantly affect the porous surface. Note that washing with warm water can remove Al that tends to adhere after washing with ammonium.

【0030】次にこの多孔質基体上に800℃〜110
0℃でエピタキシャル成長を行った。反応ガスはSiH
2Cl2(ジクロロシラン)を用いたが、本発明において
はこの限りではない。成長した膜厚は3μmである。そ
の後、エピタキシャル層面と、表面を500〜1000
0Å酸化したSiを貼りあわせた。このときに赤外顕微
鏡で貼りあわせ界面を観察したが、ボイドは観測できな
かった。
Next, 800 ° C. to 110 ° C. is applied on the porous substrate.
Epitaxial growth was performed at 0 ° C. Reaction gas is SiH
2 Cl 2 (dichlorosilane) was used, but it is not limited to this in the present invention. The grown film thickness is 3 μm. After that, the epitaxial layer surface and the surface are 500 to 1000.
0Å Oxidized Si was stuck. At this time, the bonding interface was observed with an infrared microscope, but no void was observed.

【0031】またその後、多孔質Siと接するSi基
体、多孔質Siを順次H22系のエッチング液で除去
し、SOI基板を完成させた。得られたSOI基板の単
結晶層は、エピタキシャル成長中に発生、付着した数個
/ウエハのパーティクルに起因する微小ボイド(1〜1
0μm)以外はほぼ無欠陥であり、従来のウエハ当り数
個発生していた大きなボイド(≧1mmφ)や、数百個
/ウエハ発生していた微小ボイドを大幅に低減すること
ができた。 (実施例2)次に実施例1と同じ工程で、同じ溶液を用
い、エッチング量を変えてパーエティクル除去率の変化
を測定した。その結果を図3に示す。バルクSiと同様
に40Å以上でほぼ完全にパーティクル除去効果が得ら
れる。そこで、NH4OH:H22:H2O=0.01:
1:5の溶液を40℃に温め、孔系600Åの多孔質S
i基体を10分間エッチングした。エッチング量はSi
量で約600Åでパーティクルは>0.3μmの範囲で
完全(99.9%)に除去できた。
After that, the Si substrate in contact with the porous Si and the porous Si were sequentially removed with an H 2 O 2 -based etching solution to complete the SOI substrate. The single crystal layer of the obtained SOI substrate is a minute void (1 to 1) caused by particles of several particles / wafer generated and attached during epitaxial growth.
Other than 0 μm), it is almost defect-free, and large voids (≧ 1 mmφ) that have been generated in the past by several wafers and microscopic voids that have been generated by several hundred wafers / wafer can be significantly reduced. (Example 2) Next, in the same process as in Example 1, the same solution was used and the etching amount was changed to measure the change in the particle removal rate. The result is shown in FIG. Similar to bulk Si, a particle removal effect is almost completely obtained at 40 Å or more. Therefore, NH 4 OH: H 2 O 2 : H 2 O = 0.01:
The 1: 5 solution is warmed to 40 ° C, and the pore system 600 Å porous S
The i substrate was etched for 10 minutes. Etching amount is Si
With the amount of about 600Å, particles were completely removed (99.9%) in the range of> 0.3 μm.

【0032】次に、SiH4ガス、減圧下(0.1〜1
00Torr)、低温下(750〜900℃)で0.5
〜5μmのエピタキシャル成長を行った。重クロム酸カ
リウム溶液によるエッチングでは、単結晶層の欠陥は見
つからなかった。更に表面を500Å酸化した後、表面
を500〜10000Å酸化したSi基板と貼りあわせ
た後、950℃の熱処理を行うことで貼りあわせ界面の
大きなボイドを無くすことができた。また微小ボイドも
数個/ウエハに減少した。
Next, SiH 4 gas is depressurized (0.1 to 1).
00 Torr), 0.5 at low temperature (750-900 ° C)
Epitaxial growth of ˜5 μm was performed. No defects in the single crystal layer were found by etching with the potassium dichromate solution. Furthermore, after the surface was oxidized by 500 Å, it was bonded to a Si substrate whose surface was oxidized by 500 to 10000 Å, and then heat treatment at 950 ° C. was performed, whereby a large void at the bonding interface could be eliminated. Also, the number of minute voids was reduced to a few / wafer.

【0033】以上、NH4OHを用いた例を示したが、
純度が高いアルカリ性溶液であれば同様な効果が得られ
るので、KOHを用いることもできる。しかしこの場
合、濃度を適正化する必要がある。また他の候補として
は、TMAHが有る。
The example using NH 4 OH has been described above.
KOH can also be used because a similar effect can be obtained with an alkaline solution of high purity. However, in this case, it is necessary to optimize the concentration. Another candidate is TMAH.

【0034】また、多孔質Siの孔径もこの限りではな
い。
The pore size of the porous Si is not limited to this.

【0035】更に実施例では、気相反応を用いたエピタ
キシャル成長について記述したが、他にもMBE(Mo
leculer Beam Epitaxy)などのビ
ームを用いる方法、2周波励起を用いたバイアススパッ
タなどのPVD(Physical Vapor De
position)法を用いた方法などが可能であり、
本発明の効果を損うものではない。
Further, in the embodiment, the epitaxial growth using the vapor phase reaction is described, but in addition, MBE (Mo
method using a beam such as a laser beam epitaxy (PVD) or a PVD (Physical Vapor De) method such as bias sputtering using dual frequency excitation.
The method using the position method is possible,
It does not impair the effects of the present invention.

【0036】[0036]

【発明の効果】本発明の製造方法によると、ウエットエ
ッチングによる孔径の拡大等エピタキシャル成長への大
きな影響を与えることなく、多孔質層の多孔質Si層表
面のパーティクルを除去し、高品質のSOI基板を安定
して供給することができ、製造歩留を著しく高めること
ができる。更にこのSOI基板を用いた集積回路は高性
能、高歩留、高信頼性を示し、SOI基板を用いる妥当
性を充分保証するものである。本発明によりSOI基板
が工業的に多用される原動力が得られた。
According to the manufacturing method of the present invention, the particles on the surface of the porous Si layer of the porous layer are removed without significantly affecting the epitaxial growth such as the enlargement of the pore size by wet etching and the high quality SOI substrate. Can be stably supplied, and the manufacturing yield can be significantly increased. Further, the integrated circuit using this SOI substrate shows high performance, high yield, and high reliability, and sufficiently guarantees the validity of using the SOI substrate. INDUSTRIAL APPLICABILITY The present invention provides a driving force for industrially frequently using SOI substrates.

【図面の簡単な説明】[Brief description of drawings]

【図1】多孔質Siを用いた単結晶Si基板の製造工程
を示す図である。
FIG. 1 is a diagram showing a manufacturing process of a single crystal Si substrate using porous Si.

【図2】本発明の実施例1の結果を示す図である。FIG. 2 is a diagram showing the results of Example 1 of the present invention.

【図3】本発明の実施例2の結果を示す図である。FIG. 3 is a diagram showing the results of Example 2 of the present invention.

【図4】単結晶Si基板におけるボイドの発生の説明図
である。
FIG. 4 is an explanatory diagram of generation of voids in a single crystal Si substrate.

【符号の説明】[Explanation of symbols]

1 Si基体 2 多孔質Si 3 単結晶Si 4 Si基体 5 絶縁層 6 パーティクル 7 ボイド 1 Si substrate 2 Porous Si 3 Single crystal Si 4 Si substrate 5 Insulating layer 6 Particle 7 Void

Claims (10)

【特許請求の範囲】[Claims] 【請求項1】 半導体基体を多孔質化し、20〜60℃
のエッチング溶液で表面層を30Å以上孔径の3倍以下
の厚さまでエッチング除去した後、非多孔質の半導体単
結晶を成長させることを特徴とする半導体基板の製造方
法。
1. A semiconductor substrate is made porous to 20 to 60 ° C.
A method for manufacturing a semiconductor substrate, comprising: removing a surface layer by etching with the etching solution up to a thickness of 30 Å or more and 3 times or less of a pore diameter, and then growing a non-porous semiconductor single crystal.
【請求項2】 上記エッチング溶液がアルカリ性溶液で
あることを特徴とする請求項1記載の半導体基板の製造
方法。
2. The method of manufacturing a semiconductor substrate according to claim 1, wherein the etching solution is an alkaline solution.
【請求項3】 上記アルカリ性溶液がNH4OHを含ん
でいることを特徴とする請求項2記載の半導体基板の製
造方法。
3. The method of manufacturing a semiconductor substrate according to claim 2, wherein the alkaline solution contains NH 4 OH.
【請求項4】 上記アルカリ性溶液がKOHを含んでい
ることを特徴とする請求項2記載の半導体基板の製造方
法。
4. The method of manufacturing a semiconductor substrate according to claim 2, wherein the alkaline solution contains KOH.
【請求項5】 上記アルカリ性溶液がTMAHを含んで
いることを特徴とする請求項2記載の半導体基板の製造
方法。
5. The method of manufacturing a semiconductor substrate according to claim 2, wherein the alkaline solution contains TMAH.
【請求項6】 上記アルカリ性溶液が、NH4OH、H2
2、H2Oの混合溶液であること特徴とする請求項3記
載の半導体基板の製造方法。
6. The alkaline solution is NH 4 OH, H 2
The method for manufacturing a semiconductor substrate according to claim 3, wherein the mixed solution is O 2 and H 2 O.
【請求項7】 上記アルカリ性溶液が、KOH、H
22、H2Oの混合溶液であること特徴とする請求項4
記載の半導体基板の製造方法。
7. The alkaline solution is KOH, H
5. A mixed solution of 2 O 2 and H 2 O. 5.
A method for manufacturing a semiconductor substrate according to claim 1.
【請求項8】 上記アルカリ性溶液が、TMAH、H2
2、H2Oの混合溶液であること特徴とする請求項5記
載の半導体基板の製造方法。
8. The alkaline solution is TMAH, H 2
The method for manufacturing a semiconductor substrate according to claim 5, wherein the method is a mixed solution of O 2 and H 2 O.
【請求項9】 半導体がSiであることを特徴とする請
求項1記載の半導体基板の製造方法。
9. The method of manufacturing a semiconductor substrate according to claim 1, wherein the semiconductor is Si.
【請求項10】 上記半導体単結晶を成長させた多孔質
半導体基体を、もう一つの半導体基板表面に絶縁層を形
成してなる第2の基体と、上記半導体単結晶と絶縁層と
が接触するように貼りあわせてSOI基板を作製するこ
とを特徴とする請求項1記載の半導体基板の製造方法。
10. A porous semiconductor substrate on which the semiconductor single crystal is grown and a second substrate having an insulating layer formed on the surface of another semiconductor substrate are in contact with the semiconductor single crystal and the insulating layer. 2. The method for manufacturing a semiconductor substrate according to claim 1, wherein the SOI substrate is manufactured by pasting together as described above.
JP02163893A 1993-01-18 1993-01-18 Semiconductor substrate manufacturing method Expired - Lifetime JP3337735B2 (en)

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Application Number Priority Date Filing Date Title
JP02163893A JP3337735B2 (en) 1993-01-18 1993-01-18 Semiconductor substrate manufacturing method

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Publication Number Publication Date
JPH06216027A true JPH06216027A (en) 1994-08-05
JP3337735B2 JP3337735B2 (en) 2002-10-21

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ID=12060618

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Country Status (1)

Country Link
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005059985A1 (en) * 2003-12-17 2005-06-30 Kansai Technology Licensing Organization Co., Ltd. Process for producing silicon substrate with porous layer
JP5433567B2 (en) * 2008-04-01 2014-03-05 信越化学工業株式会社 Manufacturing method of SOI substrate

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005059985A1 (en) * 2003-12-17 2005-06-30 Kansai Technology Licensing Organization Co., Ltd. Process for producing silicon substrate with porous layer
JP5433567B2 (en) * 2008-04-01 2014-03-05 信越化学工業株式会社 Manufacturing method of SOI substrate

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