JPH098062A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE: To make it possible for a metal electrode and a substrate to form an ohmic junction of high performance, by a method wherein, after the second main surface of a semiconductor substrate is ground, impurities of the same conductivity type as the second main surface of the substrate are ion-implanted, and a thin oxide film is formed on the second main surface of the substrate by oxygen plasma treatment. CONSTITUTION: An active region composed of an N-type diffusion layer 3, a P-type diffusion layer 4, a field oxide film 2, aluminum wiring 5, etc., is formed in a specified position on a P-type semiconductor substrate 1. The back of the P-type semiconductor substrate 1 is mechanically ground. Impurities of the same conductivity type as the P-type semiconductor substrate 1 are ion-implanted in the back of the P-type semiconductor substrate 1. A plasma oxide film 7 is formed on the back of the P-type semiconductor substrate 1 by oxygen plasma treatment or the like. Thin metal films 8, 9, 10 turning to electrodes are evaporated on the back of the P-type semiconductor substrate 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a high breakdown voltage or power semiconductor device.

[0002]

2. Description of the Related Art As a conventional example, for example, FIG.
(C) and a semiconductor device manufactured in the steps shown in FIGS. 6D to 6F. First, a p-type semiconductor substrate (for example, a p-type impurity concentration of 1.0 × 10 ¹⁵ / c shown in FIG.
m ³ ) at a predetermined position on the n-type diffusion layer 23, p
The type diffusion layer 24 and the field oxide film 22 are formed [FIG. 5 (b)]. Next, the back surface of the p-type semiconductor substrate 21 is
A predetermined thickness is mechanically ground by a grinder or the like [FIG. 5 (c)]. Then, impurity ions of the same conductivity type as the p-type semiconductor substrate 21 are implanted into the back surface of the p-type semiconductor substrate 21 (for example, boron ions, 40 keV, 5.0 × 10 ^15).
/ Cm ² ) 25 (FIG. 6D). Next, a heat treatment for diffusing the impurities (in an N ₂ atmosphere, about 9
50 ° C., about 20 minutes) to form a highly doped p-type diffusion layer 26 on the back surface of the p-type semiconductor substrate 21 (FIG. 6).
(E)]. Thereafter, aluminum wiring 27 is formed at a predetermined position on the front surface of the p-type semiconductor substrate 21, and finally, a metal thin film [rear surface metal electrode (T
i)] 28, metal thin film [backside metal electrode (Ni)] 29,
A metal thin film [backside metal electrode (Ag)] 30 is formed [FIG. 6 (f)]. By the above method, the p-type semiconductor substrate 21
And ohmic characteristics can be obtained in the bonding of the metal thin films 28, 29, 30 on the back surface.
9, 30 can be used as the back surface metal electrode. Here, the metal-semiconductor junction will be briefly described. For example, a Schottky barrier is formed at the junction between a p-type semiconductor substrate having a p-type impurity concentration of about 1.0 × 10 ¹⁵ / cm ³ and a metal thin film, and the resistance at the interface between the semiconductor and the metal thin film becomes high. The ohmic contact of resistance is not obtained, and the characteristics of Schottky contact are exhibited. Therefore, it is not preferable to use this metal thin film as the back electrode. Therefore, as a method for improving the junction characteristics between the semiconductor substrate and the metal thin film, that is, one method for obtaining ohmic characteristics (contact) and reducing the resistance, the impurity concentration on the back surface of the semiconductor substrate is increased to improve the tunnel effect. There is a method of obtaining ohmic characteristics with low resistance by utilizing it. The above-mentioned conventional example utilizes this tunnel effect. But,
In this conventional example, there is a step of grinding the back surface of the semiconductor substrate [FIG. 5 (c)]. This step is performed to reduce the thermal resistance of the substrate by reducing the thickness of the semiconductor substrate. However, the ground semiconductor substrate has a problem that cracks or warpage of the substrate easily occur due to the thin thickness of the substrate in each step after the grinding step. Furthermore, after the semiconductor substrate grinding process, the temperature of the semiconductor substrate in the dry etching process is likely to rise. Therefore, in the dry etching process, the stage is cooled in order to suppress the temperature rise of the semiconductor substrate. However, the semiconductor substrate after grinding is thin and easily warped, and the unevenness on the ground surface reduces the adhesion to the stage and reduces the cooling efficiency. For this reason, the substrate cannot be cooled sufficiently, so that, for example, a resist pattern for forming a wiring pattern or the like is easily burnt or deformed. In particular, there is a problem that a dense and highly reliable wiring pattern cannot be formed in the formation of the wiring pattern. Further, in order to obtain the ohmic characteristics of the back surface metal electrode, it is necessary to implant impurity ions and to perform a high temperature heat treatment at 950 ° C. to diffuse the impurity ions. There was a problem that could not be done.

[0003]

In the above-mentioned conventional example,
In the manufacturing process of a semiconductor device, the thickness of the substrate is reduced due to the grinding process of the back surface of the semiconductor substrate, which easily causes the substrate to crack or warp, and the adhesion to the stage having a cooling function in the dry etching process is poor. However, since the cooling efficiency is lowered, the resist pattern such as wiring is liable to be scorched or deformed, which makes it difficult to form a precise and highly reliable wiring pattern. The semiconductor device disclosed in Japanese Patent Application No. 6-96321, which is the invention of the prior application, is shown in FIGS. 7 (a) to 7 (c) and 8 (d).
It is produced by the steps shown in to (e). First, an n-type semiconductor substrate (for example, an n-type impurity concentration of 5.0 × 10 ¹⁸ / c) is used.
m ³ ) 31 [FIG. 7 (a)] at predetermined positions, the p-type diffusion layer 33, the n-type diffusion layer 34, and the field oxide film 32.
And aluminum wiring 35 is formed [FIG.7 (b)]. Next, the back surface of the n-type semiconductor substrate 31 is ground by a predetermined thickness [FIG. 7 (c)]. Then, a plasma oxide thin film 36 containing electric charges is formed on the back surface of the n-type semiconductor substrate 31 by oxygen plasma treatment or the like [FIG. 8 (d)]. Then, on the back surface of the n-type semiconductor substrate 31, a metal thin film [back surface metal electrode (T
i)] 37, metal thin film [backside metal electrode (Ni)] 38,
A metal thin film [backside metal electrode (Ag)] 39 is formed [FIG. 8 (e)]. By doing so, the metal thin film 3
Ohmic characteristics can be obtained in the junction between the 7, 38, 39 and the n-type semiconductor substrate 31. The above-mentioned prior invention is
Unlike the above-mentioned conventional example, since the step of implanting impurity ions is not used, high-temperature heat treatment for diffusing impurities is unnecessary, and the substrate may be ground in the final step of semiconductor device manufacturing. Therefore, it is possible to prevent the substrate from being cracked or warped, or the resist from being burnt or deformed due to a temperature rise during dry etching. However, the method according to the above-mentioned prior invention has a problem that it can be applied only when the impurity concentration of the substrate is high. For example, the technical paper “Contact resistance of Si and Cr / NiCr / Ni three-layer structure” published in Practical Surface Technology vol.32, No.2,1985, p.17-p.21 (written by Kitamura, Harada, Yokosawa) According to Si substrate and C
In the r / NiCr / Ni junction, when the impurity concentration is 2.5 × 10 ¹⁸ / cm ³ or less in the case of n-type and the impurity concentration is 3.0 × 10 ¹⁸ / cm ³ or less in the case of p-type, the junctions are respectively performed. It has been reported that the characteristics of are not ohmic. As described above, since the ohmic characteristics cannot be obtained between the semiconductor substrate and the metal unless the impurity concentration in the semiconductor substrate is equal to or higher than a predetermined value, the invention of the prior application cannot be applied in the case of a semiconductor substrate having a low impurity concentration. There was a problem.

An object of the present invention is to solve the above problems in the prior art and the invention of the prior application. In the method of manufacturing a semiconductor device, the substrate grinding step is performed as the final step of the semiconductor device manufacturing step. This will cause the board to crack,
In addition to suppressing the warp, the temperature rise of the substrate during dry etching can be suppressed to prevent the resist pattern from being deformed or burnt, and a dense and highly reliable wiring pattern can be formed.
Further, it is an object of the present invention to provide a method of manufacturing a semiconductor device capable of forming a high-performance ohmic contact between a metal electrode and a substrate even if the semiconductor substrate has a low impurity concentration.

[0005]

In order to achieve the above-mentioned object of the present invention, the present invention has a constitution as set forth in the claims. That is, according to the present invention, as described in claim 1, the step of forming the active region of the semiconductor device on the first main surface side of the semiconductor substrate and the second main surface side of the semiconductor substrate are ground by a predetermined thickness. And a step of forming a metal thin film to be a back surface electrode of the semiconductor device on the second main surface side of the semiconductor substrate, the second main surface side of the semiconductor substrate being ground. And the step of forming an oxide thin film on the second main surface side of the semiconductor substrate by oxygen plasma treatment after the step of performing an ion implantation of impurities of the same conductivity type as the second main surface of the semiconductor substrate. This is a method for manufacturing a semiconductor device. Further, according to the present invention, as described in claim 2, the step of forming the active region of the semiconductor device on the first main surface side of the semiconductor substrate and the second main surface side of the semiconductor substrate are ground by a predetermined thickness. And a step of forming a metal thin film to be a back surface electrode of the semiconductor device on the second main surface side of the semiconductor substrate, the second main surface side of the semiconductor substrate is ground. After the step, a step of ion-implanting impurities of the same conductivity type as the second main surface of the semiconductor substrate, a step of forming an oxide thin film on the second main surface side of the semiconductor substrate by oxygen plasma treatment, and the oxide thin film And a step of removing the semiconductor device.

[0006]

The present inventors solve the problems in the prior art by using the method of manufacturing a semiconductor device according to claim 1 or 2 of the claims, and at the same time, the semiconductor substrate and the metal thin film are formed. As a result of various studies, it has been found that high-performance ohmic characteristics can be obtained in the joining. That is, as described in claim 1, after forming a predetermined active region on the front surface of the semiconductor substrate, the back surface of the semiconductor substrate is removed by a predetermined thickness, and impurities of the same conductivity type as the substrate are ion-deposited on the back surface of the semiconductor substrate. Injection, without high temperature heat treatment,
By continuously using a manufacturing process of forming an oxide thin film on the back surface of the semiconductor substrate by oxygen plasma treatment or the like, and then forming a metal thin film on the back surface of the semiconductor substrate, in the bonding between the metal thin film to be the back surface electrode and the semiconductor substrate. High-performance ohmic characteristics can be obtained. This is because when an oxide thin film is formed by the above-mentioned oxygen plasma treatment, a trap (crystal defect) is formed on the extreme surface of the back surface of the semiconductor substrate, and when the above-mentioned ion implantation is performed, the implanted ions are activated. Although the ratio is low, the carrier concentration on the back surface of the semiconductor substrate is high, so that the probability of tunnel current increases at the junction between the semiconductor and the metal on the back surface of the substrate, and it is thought that a high-performance ohmic junction with low resistance will be realized. To be Therefore, since ohmic characteristics can be obtained without performing heat treatment in the process of manufacturing the semiconductor device, it becomes possible to perform the grinding process of the semiconductor substrate in the final process of the manufacturing process of the semiconductor device, and the cracking due to the thinning of the substrate. Since the problem that the substrate cannot be sufficiently cooled because the adhesion with the stage with a cooling function in the dry etching process is reduced, the resist pattern due to heat during dry etching can be solved. It is possible to prevent charring and deformation of the wiring, and in particular, it is possible to obtain a dense and highly reliable wiring pattern in the formation of wiring. Further, as described in claim 2, after forming a predetermined active region on the front surface of the semiconductor substrate, the back surface of the semiconductor substrate is removed by a predetermined thickness, and impurities of the same conductivity type as the substrate are ion-implanted into the back surface of the semiconductor substrate. Then, without heat treatment at high temperature, an oxide thin film is continuously formed on the back surface of the semiconductor substrate by oxygen plasma treatment, etc., the oxide thin film is removed using dilute hydrofluoric acid, and then a metal thin film is formed on the back surface of the semiconductor substrate. Since the manufacturing process is used, in addition to the common effect described in claim 1, by removing the oxide thin film formed by oxygen plasma treatment or the like, the junction resistance between the metal thin film to be the back surface electrode and the semiconductor substrate is increased. Can be made even lower, and high-performance and highly reliable ohmic contact with extremely low resistance can be realized. As in the case of claim 1, since the ohmic characteristics can be obtained without performing heat treatment in the manufacturing process of the semiconductor device, the grinding step of the semiconductor substrate is performed in the final step of the manufacturing process of the semiconductor device. It is possible to prevent the substrate from cracking or warping. Furthermore, since the problem that the adhesion to the stage with a cooling function in the dry etching process is deteriorated and the substrate cannot be cooled sufficiently, it is possible to prevent thermal effects such as scorching and deformation of the resist pattern, Particularly in the formation of wiring, a dense and highly reliable wiring pattern can be obtained.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below in more detail with reference to the drawings. <Example 1> FIGS. 1A to 1C and 2D to 2F.
FIG. 4A is a process diagram showing a manufacturing process of a semiconductor device exemplified in the present embodiment. First, a p-type semiconductor substrate shown in FIG. 1A (for example, in the case of p-type silicon, an impurity concentration of 1.0 × 10
¹⁵ / cm ³ ) at a predetermined position on the n-type diffusion layer 3,
An active region including the p-type diffusion layer 4, the field oxide film 2, the aluminum wiring 5 and the like is formed [FIG. 1 (b)]. then,
The back surface of the p-type semiconductor substrate 1 is mechanically ground [Fig. 1
(C)]. Next, on the back surface of the p-type semiconductor substrate 1, impurity ion implantation (for example, boron ions, 40 keV, 5.0 × 10 ¹⁵ / cm ² ) 6 of the same conductivity type as the p-type semiconductor substrate 1 is performed [FIG. )]. Then, on the back surface of the p-type semiconductor substrate 1, an oxygen plasma treatment (for example, O ₂ , 1 Torr, 40
The plasma oxide thin film 7 is formed by, for example, processing under conditions of 0 W and 5 minutes (FIG. 2E). Next, on the back surface of the p-type semiconductor substrate 1, a metal thin film [back surface metal electrode (Ti)] 8, a metal thin film [back surface metal electrode (Ni)] 9, and [back surface metal electrode (Ag)] 10 are vapor-deposited. To do. In this way, since ohmic characteristics can be obtained without performing heat treatment in the manufacturing process of the semiconductor device, it becomes possible to perform the grinding process for thinning the semiconductor substrate in the final process of the manufacturing process of the semiconductor device. The process after grinding the back surface can be shortened, and cracks and warpage of the substrate can be suppressed. Furthermore, since the problem that the adhesion to the stage with a cooling function in the dry etching process is deteriorated and the substrate cannot be cooled sufficiently, it is possible to prevent thermal effects such as scorching and deformation of the resist pattern, Particularly in the formation of wiring, a dense and highly reliable wiring pattern can be obtained.

<Embodiment 2> FIGS. 3 (a) to 3 (d) and FIG.
(E)-(g) is process drawing which shows the manufacturing process of the semiconductor device illustrated by a present Example. In this embodiment, an active region is formed, the back surface of the p-type semiconductor substrate 11 is ground, and p
Ion implantation of the same conductivity type as the semiconductor substrate 11
Then, the semiconductor substrate 1 is subjected to oxygen plasma treatment or the like.
1. A plasma oxide thin film 17 is formed on the back surface of FIG.
Up to the step (e)], the same steps as in Example 1 were performed. Then, the plasma oxide thin film 17 formed on the back surface of the p-type semiconductor substrate 11 is removed by dilute hydrofluoric acid [FIG. 4 (f)], and then a metal thin film [back surface metal electrode (T
i)] 18, metal thin film [backside metal electrode (Ni)] 19,
A metal thin film [backside metal electrode (Ag)] 20 was vapor-deposited to form each backside metal electrode [FIG. 4 (g)]. As described above, since the back surface metal electrode is formed after removing the plasma oxide thin film 17 formed on the back surface of the p-type semiconductor substrate 11, the bonding resistance between the back surface metal electrode and the substrate is larger than that in the first embodiment. And high resistance ohmic characteristics with low resistance. As shown in the above embodiments of the present invention, high temperature heat treatment is performed by ion-implanting a semiconductor substrate surface, forming an oxide thin film on the substrate surface by oxygen plasma treatment, and forming a metal thin film on the oxide thin film. Without it, ohmic characteristics can be obtained in the joining of the semiconductor substrate and the metal thin film. The reason is not clear, but it is considered as follows. First, when an oxide thin film is formed by oxygen plasma treatment, traps (crystal defects) are formed on the extreme surface of the semiconductor substrate. When ion implantation is performed, the carrier concentration of the semiconductor substrate increases although the activation rate by the implanted ions is low. It is considered that these two phenomena combine to increase the probability of tunnel current at the junction between the semiconductor on the substrate surface and the metal. FIG. 9 (a)
Shows an energy band diagram of metal (electrode) -semiconductor substrate (p-type) contact when conventional ion implantation and oxygen plasma treatment are not performed, and FIG. 9B is an ion implantation which is an embodiment of the present invention. 9B shows an energy band diagram of metal (electrode) -semiconductor substrate (p-type) contact when oxygen plasma treatment is performed, and as shown in FIG. 9B, traps (crystal defects x marks) are formed on the extreme surface of the semiconductor substrate. ) Is formed, and as a result, the probability of tunneling current increases at the junction between the semiconductor substrate and the metal, and it is considered that good ohmic characteristics are obtained. Here, the formation of the oxide thin film by the oxygen plasma treatment was performed after the step of implanting the impurity ions, but it may be performed before that. FIG.
Is a summary of experimental results regarding the characteristics of bonding between the semiconductor substrate and the metal thin film in each of the steps of ion implantation, oxygen plasma treatment, and heat treatment. Here, a p-type substrate having a specific resistance of 10 Ωcm was used as the semiconductor substrate. The implanted ions are boron ions, and the implantation energy is 40 ke.
The conditions were V and a concentration of 5.0 × 10 ¹⁵ / cm ² . In FIG. 10, the mark ∘ indicates that ohmic characteristics were obtained by performing ion implantation, oxygen plasma treatment, and heat treatment, and the mark × indicates that ohmic characteristics were not obtained because neither ion implantation nor heat treatment was performed. It means that. And
Condition No. 1 shows that ohmic characteristics were obtained when ion implantation, oxygen plasma treatment, and heat treatment were performed, and condition No. 2 showed that ion implantation, oxygen plasma treatment was performed, and heat treatment was not performed. It is shown that ohmic characteristics can be obtained in the bonding between the semiconductor substrate and the metal thin film without performing high temperature heat treatment. Condition No. 3
Indicates that when only oxygen plasma treatment is performed and ion implantation and heat treatment are not performed, ohmic characteristics cannot be obtained without ion implantation. 11 to 13 show
11 shows current (I) -voltage (V) characteristics in the junction region between the semiconductor substrate and the metal thin film when the treatment of condition No. 1, 2 or 3 shown in FIG. 10 is performed. FIG.
10 shows current-voltage characteristics when ion implantation, oxygen plasma treatment, and heat treatment are performed under condition No. 1 in FIG. 10, the IV characteristics are linear and symmetrical with respect to positive and negative voltages. And shows ideal ohmic characteristics. Further, FIG. 12 shows the condition No. 2 in FIG.
In the case where the ion implantation and the oxygen plasma treatment are performed and the heat treatment is not performed, an ideal ohmic contact is obtained in the bonding between the semiconductor substrate and the metal thin film without performing the high temperature heat treatment, as in the case of FIG. It shows that the characteristics can be obtained. Further, FIG. 13 shows the condition No. 3 in FIG.
2 shows that only the oxygen plasma treatment is performed and the ion implantation and the heat treatment are not performed, and the IV characteristics showing ohmic contact cannot be obtained without ion implantation.

[0009]

As described in detail above, the method of manufacturing a semiconductor device of the present invention has the following effects. That is, as described in claim 1, after forming a predetermined active region on the front surface of the semiconductor substrate, the back surface of the semiconductor substrate is removed by a predetermined thickness, and impurities of the same conductivity type as the substrate are ion-deposited on the back surface of the semiconductor substrate. By using a manufacturing process in which a thin oxide film is formed on the back surface of the semiconductor substrate by oxygen plasma treatment, etc., and then a metal thin film is formed on the back surface of the semiconductor substrate without performing heat treatment at high temperature, a metal thin film serving as a back electrode is formed. High-performance ohmic characteristics can be obtained in the junction between the semiconductor substrate and the semiconductor substrate. This is because when an oxide thin film is formed by the above-mentioned oxygen plasma treatment, a trap (crystal defect) is formed on the extreme surface of the back surface of the semiconductor substrate, and when the above-mentioned ion implantation is performed, the implanted ions are activated. Although the ratio is low, the carrier concentration on the back surface of the semiconductor substrate is high, so that the probability of tunnel current increases at the junction between the semiconductor and the metal on the back surface of the substrate, and it is thought that a high-performance ohmic junction with low resistance will be realized. To be Therefore, since ohmic characteristics can be obtained without performing heat treatment in the manufacturing process of the semiconductor device, the grinding process of the semiconductor substrate can be performed in the final process of the manufacturing process of the semiconductor device. , The warp, etc. can be suppressed, and further, the problem that the adhesion with the stage with a cooling function in the dry etching process deteriorates and the substrate cannot be cooled sufficiently, so there is no thermal effect such as burning or deformation of the resist pattern. Can be prevented, and a dense and highly reliable wiring pattern can be obtained especially in the formation of wiring. Further, as described in claim 2, after forming a predetermined active region on the front surface of the semiconductor substrate, the back surface of the semiconductor substrate is removed by a predetermined thickness, and impurities of the same conductivity type as the substrate are ion-implanted into the back surface of the semiconductor substrate. Then
A manufacturing process in which an oxide thin film is continuously formed on the back surface of a semiconductor substrate by oxygen plasma treatment, etc. without high-temperature heat treatment, the oxide thin film is removed using dilute hydrofluoric acid, and then a metal thin film is formed on the back surface of the semiconductor substrate. In addition to the common effect described in claim 1, since the oxide thin film formed by the oxygen plasma treatment or the like is removed, the resistance of the junction between the metal thin film to be the back electrode and the semiconductor substrate is further improved. High performance and highly reliable ohmic contact with low resistance can be realized. As in the case of claim 1, since the ohmic characteristics can be obtained without performing heat treatment in the manufacturing process of the semiconductor device, the grinding step of the semiconductor substrate is performed in the final step of the manufacturing process of the semiconductor device. Therefore, it is possible to prevent the substrate from cracking, warping, and the like, and the problem that the adhesion with the stage with a cooling function in the dry etching process deteriorates and the substrate cannot be cooled sufficiently is eliminated. It is possible to prevent thermal effects such as scorching and deformation of the pattern, and a dense and highly reliable wiring pattern can be obtained especially in the formation of the wiring.

[Brief description of drawings]

FIG. 1 is a process drawing showing a manufacturing process of a semiconductor device exemplified in a first embodiment of the present invention.

2A to 2C are process diagrams showing a manufacturing process of the semiconductor device illustrated in the first embodiment of the present invention.

3A to 3D are process diagrams showing a manufacturing process of the semiconductor device illustrated in the second embodiment of the present invention.

4A to 4C are process diagrams showing a manufacturing process of the semiconductor device illustrated in the second embodiment of the present invention.

5A to 5C are process diagrams showing a manufacturing process of a conventional semiconductor device.

6A to 6C are process diagrams showing a manufacturing process of a conventional semiconductor device.

FIG. 7 is a process drawing showing a process for manufacturing a semiconductor device of the prior invention (Japanese Patent Application No. 6-96321).

FIG. 8 is a process drawing showing a process of manufacturing a semiconductor device of a prior invention (Japanese Patent Application No. 6-96321).

FIG. 9 is an energy band diagram of a metal (electrode) -semiconductor substrate (p-type) contact of the semiconductor device (b) illustrated in the example of the present invention and a metal (electrode) -semiconductor substrate of the conventional semiconductor device (a). Energy band diagram of (p-type) contact.

FIG. 10 is a diagram showing ohmic contact characteristics between a semiconductor substrate and a metal thin film under each processing condition exemplified in the example of the present invention.

FIG. 11 is a graph showing current-voltage characteristics (ohmic characteristics) at the junction between the semiconductor substrate and the metal thin film exemplified in the example of the present invention.

FIG. 12 is a graph showing current-voltage characteristics (ohmic characteristics) at the junction between the semiconductor substrate and the metal thin film exemplified in the example of the present invention.

FIG. 13 is a graph showing current-voltage characteristics in a junction between a semiconductor substrate and a metal thin film shown as a comparative example.

[Explanation of symbols]

1 ... p-type semiconductor substrate 2 ... field oxide film 3
... n-type diffusion layer 4 ... p-type diffusion layer 5 ... aluminum wiring 6 ... impurity ion (boron ion) implantation 7 ... plasma oxide thin film 8 ... metal thin film [backside metal electrode (Ti)] 9 ... metal thin film [backside metal electrode ( Ni)] 10 ... Metal thin film [Backside metal electrode (Ag)] 11
... p-type semiconductor substrate 12 ... field oxide film 13 ... n-type diffusion layer 14
... p-type diffusion layer 15 ... aluminum wiring 16 ... impurity ion (boron ion) implantation 17 ... plasma oxide thin film 18 ... metal thin film [rear surface metal electrode (Ti)] 19 ... metal thin film [rear surface metal electrode (Ni)] 20 ... metal Thin film [Backside metal electrode (Ag)] 21 ... P-type semiconductor substrate 22 ... Field oxide film 23
... n-type diffusion layer 24 ... p-type diffusion layer 25 ... impurity ion (boron ion) implantation 26 ... highly doped p-type diffusion layer 27 ... aluminum wiring 28 ... metal thin film [back surface metal electrode (Ti)] 29 ... metal thin film [back surface] Metal electrode (Ni)] 30 ... Metal thin film [Backside metal electrode (Ag)] 31
... n-type semiconductor substrate 32 ... field oxide film 33 ... p-type diffusion layer 34
... n-type diffusion layer 35 ... aluminum wiring 36 ... plasma oxide thin film 37 ... metal thin film [rear surface metal electrode (Ti)] 38 ... metal thin film [rear surface metal electrode (Ni)] 39 ... metal thin film [rear surface metal electrode (Ag)]

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁶ Identification code Agency reference number FI Technical display location H01L 29/808

Claims (2)

[Claims] 1. A step of forming an active region of a semiconductor device on a first main surface side of a semiconductor substrate, a step of grinding a second main surface side of the semiconductor substrate by a predetermined thickness, and a first step of the semiconductor substrate. In a method of manufacturing a semiconductor device, which includes at least a step of forming a metal thin film to be a back surface electrode of the semiconductor device on the second main surface side, after the step of grinding the second main surface side of the semiconductor substrate, Manufacturing of a semiconductor device including at least a step of ion-implanting impurities of the same conductivity type as the second main surface and a step of forming an oxide thin film on the second main surface side of the semiconductor substrate by oxygen plasma treatment. Method. 2. A step of forming an active region of a semiconductor device on a first main surface side of a semiconductor substrate, a step of grinding a second main surface side of the semiconductor substrate by a predetermined thickness, and a second step of the semiconductor substrate. In a method of manufacturing a semiconductor device, which includes at least a step of forming a metal thin film to be a back surface electrode of the semiconductor device on the second main surface side, after the step of grinding the second main surface side of the semiconductor substrate, 2 at least including a step of implanting impurities of the same conductivity type as the main surface, a step of forming an oxide thin film on the second main surface side of the semiconductor substrate by oxygen plasma treatment, and a step of removing the oxide thin film. A method for manufacturing a semiconductor device, comprising: