JPH0580833B2 - - Google Patents

Description

[Detailed description of the invention] A. Industrial application field The present invention relates to a method for manufacturing a semiconductor device.

B. Summary of the Invention The present invention utilizes an epitaxial growth method to dope a substrate with impurities to produce P−n ⁻ −n ⁺ −
In manufacturing a semiconductor device of P conductivity type or n-P ^- -P ⁺ -n conductivity type, a silicon oxide film or a silicon nitride film is formed as a mask on the surface stacking defects generated by epitaxial growth, and then P By selectively diffusing impurities of conductivity type or n-conductivity type, punch-through caused by the above-mentioned surface stacking defects is eliminated.

C. Prior Art Conventionally, it has been known to increase the thickness of the base layer in reverse conduction thyristors, gate turn-off thyristors, etc. in order to increase the withstand voltage of the device, but this has the disadvantage that the on-state voltage of the device increases. be. In order to overcome this drawback, as a method to reduce the increase in base layer thickness due to higher withstand voltages, a low resistance layer is formed on a high resistance substrate. For example, when using an n-type substrate, a P- There is one in which semiconductor layers are formed in the order of n ^- -n ⁺ -P conductivity type, and a high breakdown voltage section is formed by the n ^- and n ⁺ semiconductor layers. The concentration distribution in this case is shown in FIG.

Since it is difficult to form the above-mentioned low-resistance layer n ⁺ only by a normal impurity diffusion method, it was formed by impurity doping combined with an epitaxial growth method.

D Problems to be Solved by the Invention In a semiconductor manufacturing method that uses a conventional epitaxial growth method, as shown in FIG.
king fault shadow or spike)
During the diffusion formation of the emitter layer, P-type impurities are abnormally diffused into a pipe shape. In this abnormal diffusion region, the impurity distribution becomes as shown by the broken line in Figure 6, and when a reverse voltage is applied to the _J2 junction, partial punch-through occurs, resulting in a large increase in leakage current. There was a problem of poor pressure resistance.

This problem can be solved by preventing surface stacking defects caused by epitaxial growth, but the larger the device area, the more difficult it becomes to completely eliminate surface stacking defects. Even if it were obtained, the yield would be extremely poor.

E Means for Solving the Problems In view of the above problems, the present invention has been proposed in FIG ^.
A manufacturing method as shown in the case of -n ⁺ -P conductivity type is proposed.

First, an n ⁺ semiconductor layer is formed by epitaxial growth by depositing impurities on one side of an n-conductive substrate (FIG. 1a). The part in the figure is formed by epitaxial growth, and the conductivity type is P.
Or n. 1 and 2 indicate surface stacking defects caused by epitaxial growth.

Next, a silicon oxide (SiO ₂ ) film is formed only on the surface layer defects by thermal oxidation or the like (FIG. 1b).

Next, using the silicon oxide film as a mask, a P-type impurity that can be selectively diffused is deposited (FIG. 1c).

Finally, P conductive layers are formed on both sides of the silicon oxide film, silicate glass film, etc. (FIG. 1d).

F Effect A conductive layer is formed in a surface stacking defect portion generated by epitaxial growth in a manner that prevents diffusion of P-type impurities.

G Example FIG. 2 is a manufacturing process diagram showing an example of the method of the present invention.

(1) Specific resistance 300Ω-cm, thickness shown in Figure 2a
POCl ₃ (phosphoryl chloride) with a sheet resistance of 40Ω/□ was applied to one side of a 400μm n-type silicon wafer.
(Fig. 2b), epitaxial growth of 1×10 ¹³ cm ^-3 and 80 μm was performed on that surface, and forced oxidation (dr-ivein) was performed at 1250°C for 31 hours (second step). Figure c).

(2) Next, a silicon oxide (SiO ₂ ) film is formed on the entire surface of the wafer by wet thermal oxidation at 1150°C for 1 hour, and then the surface stacking defects caused by epitaxial growth are left behind using photolithography. Remove the SiO ₂ film (Fig. 2d).

(3) Using a SiO ₂ film as a diffusion mask and a solid diffusion source, selectively diffuse boron at 875°C for 60 minutes (Figure 2e). The sheet resistance at this time is, for example, 210Ω/□.

(4) Remove all SiO ₂ film and silicate glass (eg, BSG film) using HF aqueous solution.

(5) Perform intrusion diffusion at 1250℃ for 79 hours (Figure 2 f). The boron diffusion layer at this time has, for example, a surface concentration of 1×10 ¹⁷ cm ⁻³ and a diffusion depth of 48 μm.

(6) Positively bevel the wafer to the _J2 junction using a well-known method, and protect the bonding surface with silicone rubber.

The steps described above prevent abnormal diffusion of P-type impurities in areas where surface stacking defects occur due to epitaxial growth. Note that defective portions of the surface layer can be easily detected using an optical microscope or the like, and can also be automatically detected using other known image processing techniques.

Further, formation of a silicon oxide film or a silicon nitride film on a defective portion can be easily realized by, for example, the following known photolithography technique.

First, a negative photoresist is uniformly applied onto a wafer on which a SiO ₂ film has been formed using a spin coating method or the like. Next, the defective portion and its surrounding area are exposed to light. By developing this, only the resist in the defective area and its surrounding area remains. Using this resist as a mask, the SiO ₂ film is removed by etching.

FIG. 3 shows the impurity distribution of the Pn ^- -n ⁺ -P conductivity type semiconductor according to the above process, and the broken line shows the impurity distribution in the surface stacking fault portion. As is clear from this characteristic, even when a reverse voltage is applied to the J ₂ junction, punch-through at the surface stacking defects can be eliminated and a high breakdown voltage can be ensured.

In Figure 4, the solid line shows an example of the breakdown voltage characteristics of the _J2 junction at room temperature of the semiconductor device fabricated based on this example, which is more than three times higher than the breakdown voltage characteristic example (broken line) obtained by the conventional method. We were able to obtain pressure resistance.

In the example, if epitaxial growth doped with n-type impurities is used, the P emitter layer and the N base layer will be short-circuited, but in normal reverse conduction thyristors and gate turn-off thyristors, J ₁ Since the breakdown voltage of the junction is not required in many cases, it is not a particular problem, and the off-characteristics of the gate turn-off thyristor etc. can be improved by actively short-circuiting other parts.

In addition, in the embodiment, an n-type substrate is used and P-n ^- -
We have shown a method for forming a semiconductor layer of n ⁺ -P conductivity type, but this method uses a P-type substrate to form n-P ^- -P ⁺ -n
Of course, the same effect can be obtained by applying the present invention to a method for forming a conductive type semiconductor layer.

H. Effects of the Invention As described above, according to the present invention, in a semiconductor manufacturing method in which impurity doping is performed in combination with an epitaxial growth method, abnormal diffusion is prevented in the surface stacking defect portion caused by epitaxial growth. This method has the effect of eliminating punch-through at the defective portion, ensuring that the device has a large area and a high breakdown voltage.

[Brief explanation of the drawing]

Figure 1 is a process diagram showing the manufacturing method of the present invention, Figure 2 is a process diagram showing the manufacturing method of the present invention.
The figure is a manufacturing process diagram showing one embodiment of the present invention, Figure 3 is a concentration distribution characteristic diagram of one embodiment, and Figure 4 shows the _J2 junction breakdown voltage characteristics of one embodiment together with the conventional one (dashed line). FIG. 5 is a state diagram showing a surface stacking defect portion in a conventional manufacturing method, and FIG. 6 is a conventional concentration distribution characteristic diagram.

Claims (1)

[Claims] 1. Semiconductor elements formed from an n-type or P-type substrate by impurity doping using epitaxial growth in the order of P-n ^- -n ⁺ -P conductivity type or n-P ^- -P ⁺ -n conductivity type. In the manufacturing method, a silicon oxide film or a silicon nitride film is formed on the surface layer defect portion caused by epitaxial growth, and then, using the silicon oxide film or silicon nitride film as a mask, selective diffusion is possible. A method for manufacturing a semiconductor device, characterized by selectively diffusing type impurities.