JP3663238B2 - Bipolar transistor manufacturing method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a bipolar transistor, and more particularly to a method for manufacturing a bipolar transistor capable of suppressing characteristic deterioration due to a hot carrier effect.
[0002]
[Prior art]
Hot carriers accelerated by the depletion electric field between the emitter and base of the bipolar transistor form surface states, or the hot carriers themselves are injected and captured in the oxide film near the emitter and base junctions. Causes deterioration. In particular, it is well known that the current amplification factor hFE deteriorates when a reverse bias is applied to the emitter and base junctions. This is presumably because the carriers injected and trapped in the oxide film recombine with holes at the interface during forward operation or increase the base current.
[0003]
However, in the BiCMOS semiconductor device, a reverse bias is transiently applied between the emitter and base of the bipolar transistor due to the basic circuit configuration, and hFE degradation due to the hot carrier effect cannot be avoided.
[0004]
Conventionally, a structure shown in FIG. 8 has been proposed in order to suppress the characteristic deterioration of the bipolar transistor due to the hot carrier effect. In the figure, 1 is a P-type silicon substrate, 2 is an N-type buried layer, 3 is a channel stopper, 4 is an N-type epitaxial layer, 5 is a LOCOS oxide film, and 6 is an N-type buried layer constituting a part of the collector. , 8 is a base region, 10 is an oxide film, 11 is a high concentration emitter region, 12 is an emitter electrode, 15 is a low concentration emitter region, 16 is a base electrode, 17 is a collector electrode, and 18 is an extraction electrode for the emitter electrode. Show. As shown in the figure, a low-concentration emitter region 15 is provided on the surface of the base region 8 so as to surround the high-concentration emitter region 11, thereby reducing the maximum electric field and preventing hFE deterioration.
[0005]
However, even in the conventional method, since the oxide film 10 still exists due to the structure, this is not an essential improvement method. If a Zener diode is formed between the emitter and the base, the Zener voltage fluctuates and is necessary for a high-frequency circuit. Could not be used as a rectifier circuit.
[0006]
[Problems to be solved by the invention]
In a bipolar transistor having a conventional structure, an oxide film is present near the emitter electrode. Therefore, hot carriers accelerated by a depletion field between the emitter and base are injected and trapped in the oxide film near the emitter and base junctions, and the order is increased. There has been a problem in that characteristic degradation occurs such as recombination with holes at the interface during direction operation and increase in base current. In order to solve the above problems, an object of the present invention is to provide a bipolar transistor having a structure without an oxide film in the vicinity of an emitter electrode.
[0007]
[Means for Solving the Problems]
To achieve the above object, according to the present invention, a reverse conductivity type buried layer which becomes a part of a collector is formed on a semiconductor substrate of one conductivity type, and an epitaxial layer of reverse conductivity type is grown on the buried layer. In the manufacturing method of performing element isolation and forming a bipolar transistor on a semiconductor substrate on which a reverse conductivity type collector region is formed, forming a one conductivity type base region on the surface of the epitaxial layer; and An oxide film is formed, the oxide film in the emitter formation region is dry-etched leaving a part of the total film thickness, and the remaining oxide film in the emitter formation region is removed by wet etching to form the emitter a step of exposing the base region in the region, to form a first emitter region of the opposite conductivity type including a first impurity in the base region out said exposure, the exposed And forming an emitter electrode overlapping a part of the base region and the oxide layer, removing the oxide film, the first emitter region and the base region exposed in the vicinity of at least the emitter electrode A polysilicon film that acts as the emitter electrode in contact with the base region in the vicinity of the emitter electrode by coating with polysilicon containing a second impurity having a diffusion coefficient larger than that of the first impurity and performing anisotropic etching And exposing the base region, diffusing the second impurity contained in the polysilicon film, having the same conductivity type as the first emitter region around the first emitter region, and forming a second emitter region of low impurity concentration than the impurity concentration of the first emitter region, and a lead-out electrode for the emitter, base And characterized in that it comprises a step of forming an electrode connected to the collector region, respectively, and in the vicinity of the emitter region to form a bipolar transistor having the structure oxide film is not present.
[0008]
The first reverse conductivity type impurity forming the first emitter region is arsenic, and the second reverse conductivity type impurity forming the second emitter region is phosphorus. is there.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the present invention will be described with reference to an example of a method for manufacturing an NPN bipolar transistor. 1 to 7 are sectional views for explaining an embodiment of the manufacturing method of the present invention. An N-type buried layer 2 constituting a part of the collector and a channel stopper 3 made of a P-type diffusion region are formed on the P-type silicon substrate 1, and an N-type epitaxial layer 4 having a thickness of 2 microns is grown at 1 Ωcm. Thereafter, a 6500 angstrom element isolation LOCOS oxide film 5 is formed on the surface of the N-type epitaxial layer 4 using the oxide film and the nitride film as a mask. An N-type diffusion layer 6 that forms a part of the collector is formed in a part of the N-type epitaxial layer 4, and is connected to the N-type buried layer 2 formed earlier to form a collector. At this time, a thin oxide film 7 of about 400 angstroms is formed on the surface of the N type epitaxial layer 4. Boron ions are implanted through the thin oxide film 7 on the surface of the N-type epitaxial layer 4 at an acceleration voltage of 55 KeV and a dose of 8 × E13 cm 2 to form a P-type base region 8. Further, boron ions are implanted into a part of the base region 8 at an acceleration voltage of 30 KeV and a dose amount of 2 × E15 cm 2 to form a P + -type base contact region 9 having an impurity concentration higher than that of the base region 8 for connection to the base electrode ( FIG. 1).
[0010]
An oxide film 10 of 2000 angstroms is formed on the surface of the P-type silicon substrate 1 by the CVD method. In order to form the emitter region, the oxide film 10 and the thin oxide film 7 in the emitter formation planned region are removed by etching to expose the base region 8 formed on the surface of the N-type epitaxial region 4 (FIG. 2). At this time, the etching of the oxide films 10 and 7 is performed by dry etching about 90% of the total film thickness, and then the remaining is performed by wet etching, so that damage to the emitter formation scheduled region can be reduced.
[0011]
In order to form the emitter electrode, a 3500 Å polysilicon film is formed on the entire surface. Arsenic ions are implanted into the polysilicon film as emitter diffusion impurities. (When the polysilicon film is a doped polysilicon film, this implantation step can be omitted.) Thereafter, a heat treatment is performed at 1000 ° C. for 10 seconds to form the N-type first emitter region 11. To do. Thereafter, the polysilicon film is patterned to form the emitter electrode 12 (FIG. 3).
[0012]
The oxide films 10 and 7 are selectively removed by buffered hydrofluoric acid (FIG. 4). Since the oxide film 10 formed by the CVD method has a higher etching rate than the oxide film formed by thermal oxidation, the LOCOS oxide film 5 is hardly etched. Next, a phosphorous doped polysilicon film 13 is formed on the entire surface. Here, the first emitter region 11 and the base region 8 exposed on the surface of the N type epitaxial layer 4 in the vicinity of the emitter electrode 12 are all covered with the polysilicon film 13 (FIG. 5).
[0013]
By anisotropically etching the polysilicon film 13, the phosphorus-doped polysilicon film 13 is left in the vicinity of the emitter electrode 12, and the base region 8 formed on the surface of the N-type epitaxial layer 4 is exposed. At least a part of the polysilicon film 13 is left in contact with the base region 8 where the first emitter region 11 is not formed. Thereafter, an oxide film 14 to be an interlayer insulating film is formed on the entire surface. By performing the heat treatment at 850 ° C. for 15 seconds, the impurities contained in the remaining polysilicon film 13 are diffused to the surface of the base region 8, and the N − -type second impurity having a lower impurity concentration than the first emitter region 11. The emitter region 15 is formed (FIG. 6). Since phosphorus has a larger diffusion coefficient than arsenic, the second emitter region 15 can be formed with almost no change in the impurity distribution of the first emitter region 11 formed earlier.
[0014]
Here, since there is no oxide film in the vicinity of the emitter electrode, hot carriers accelerated by the depletion layer electric field between the emitter and base are injected and captured in the oxide film in the vicinity of the emitter / base junction, and the interface is operated during forward operation. Therefore, there is no deterioration of characteristics such as recombination with holes or increase of base current, so-called hot carrier effect. Further, since the remaining polysilicon film 13 has the same potential as the emitter electrode 12 and acts as an emitter electrode, the step of removing the polysilicon film 13 is unnecessary.
[0015]
Thereafter, in accordance with a normal manufacturing method, a contact hole is formed in the oxide film 14, a base electrode 16, a collector electrode 17, and an emitter lead-out electrode 18 are formed, thereby completing a bipolar transistor.
[0016]
【The invention's effect】
As described above, the present invention has no oxide film in the vicinity of the emitter electrode. Therefore, hot carriers accelerated by a depletion layer electric field between the emitter and the base are injected and captured in the oxide film in the vicinity of the emitter and base junctions. In the forward operation, characteristic deterioration such as recombination with holes at the interface or increase in base current does not occur. Further, since the emitter region has a structure in which a high concentration impurity region and a low concentration impurity region are added to the periphery thereof, the maximum electric field can be reduced and hFE deterioration can be prevented. The manufacturing process includes the formation and etching of the polysilicon film 13 and the heat treatment for forming the second emitter region 15 in comparison with the conventional method for manufacturing a bipolar transistor having no second emitter region. Thus, a bipolar transistor that can easily suppress the deterioration of characteristics due to the hot carrier effect can be provided only by adding a simple process such as this process.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view illustrating a manufacturing method according to an embodiment of the present invention.
FIG. 2 is a cross-sectional view illustrating a manufacturing method according to an embodiment of the present invention.
FIG. 3 is a cross-sectional view illustrating a manufacturing method according to an embodiment of the present invention.
FIG. 4 is a cross-sectional view illustrating a manufacturing method according to an embodiment of the present invention.
FIG. 5 is a cross-sectional view illustrating a manufacturing method according to an embodiment of the present invention.
FIG. 6 is a cross-sectional view illustrating a manufacturing method according to an embodiment of the present invention.
FIG. 7 is a cross-sectional view illustrating a manufacturing method according to an embodiment of the present invention.
FIG. 8 is a cross-sectional view illustrating the structure of a conventional bipolar transistor of this type.
[Explanation of symbols]
1 P-type silicon substrate 2 N-type buried layer 3 Channel stopper 4 N-type epitaxial layer 5 LOCOS oxide film 6 N-type diffusion layer 7 Oxide film 8 Base region 9 Base contact region 10 Oxide film 11 First emitter region 12 Emitter electrode 13 Polysilicon film 14 Oxide film 15 Second emitter region 16 Base electrode 17 Collector electrode 18 Lead electrode

Claims (2)

A reverse conductivity type buried layer which becomes a part of the collector is formed on a semiconductor substrate of one conductivity type, an epitaxial layer of reverse conductivity type is grown on the buried layer, element isolation is performed, and a reverse conductivity type is formed. In a manufacturing method for forming a bipolar transistor on a semiconductor substrate on which a collector region is formed,
Forming a base region of one conductivity type on the surface of the epitaxial layer;
An oxide film is formed on the base region, and the oxide film in the emitter formation region is dry-etched leaving a part of the total thickness, and then the remaining oxide film in the emitter formation region is removed by wet etching. And exposing the base region of the emitter formation scheduled region;
Forming a first emitter region of a reverse conductivity type containing a first impurity in the exposed base region, and forming an emitter electrode overlapping the exposed base region and a part of the oxide film ;
Removing the oxide film ;
Covering at least the first emitter region and the base region exposed in the vicinity of the emitter electrode with polysilicon containing a second impurity having a diffusion coefficient larger than that of the first impurity, and performing anisotropic etching, Leaving a polysilicon film in contact with the base region in the vicinity of the emitter electrode and acting as the emitter electrode, and exposing the base region;
The second impurity contained in the polysilicon film is diffused, and the impurity having the same conductivity type as the first emitter region and lower than the impurity concentration of the first emitter region is formed around the first emitter region. Forming a second emitter region of concentration;
Method for producing a bipolar transistor, characterized in that a lead-out electrode for the emitter, forming respective electrode connected to the base and collector regions, the. The reverse conductivity type first impurity forming the first emitter region is arsenic, and the reverse conductivity type second impurity forming the second emitter region is phosphorus. The method for manufacturing a bipolar transistor according to claim 1 .

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