JPH0980118A - Ic tester - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten an adjustment time for a transmission delay time of each channel at the initialization stage. SOLUTION: A calibration board 4 is provided with a multiplexer 16 which switches/selects one of measuring signals input to terminals Q1 -Qn , and a memory 17 which stores a transmission delay time of each channel measured from an output signal of the multiplexer 16 and supplies the data to a delay control circuit 10 of a main body 2 of the IC tester. A circuit 19 is provided if necessary for measuring the transmission delay time of each channel from the output signal of the multiplexer 16. The delay time of each channel is measured and written to the memory 17 at a suitable time, e.g. once in a week or month upon necessities. Generally, at the initialization stage before a test is carried out, the delay control circuit 10 is enough to read out the data in the memory 17 thereby adjusting delay circuits 71 -7n . The memory 17 may be mounted to the main body 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an IC tester for testing an LSI or the like, and particularly to a simple adjustment of the propagation delay time of each channel at the time of initial adjustment.

[0002]

2. Description of the Related Art As shown in FIG.
Test board 3 and test board 3 and calibration
Board 4 etc. are provided. In the IC tester main body 2,
The timing generator 5 and the timing generator 5
Imming is given, and the 1st to nth (integer of 2 or more)
Signal generator 6, which generates the measurement signal of the channel
For the measurement signals of the 1st to nth channels output from the generator 6.
Variable delay circuit 7 for giving a delay₁~ 7_nAnd measuring pin P₁
~ P_nAnd the variable delay circuit 7₁~ 7_nInput the output signal of
Measuring pin P₁~ P_nSupply measurement signal (current / voltage) to
Driver 8₁~ 8_nAnd measuring pin P₁~ P_nOccurs in
Comparator 9 for comparing the generated signal (voltage / current) with an expected value₁
~ 9_nAnd each calibration board 4
Variable delay circuit 7 by inputting the channel propagation delay time₁~
7 _nThe delay control circuit 10 for adjusting the delay amount of
ing.

The test board 3 has an IC socket 13 on which the IC 12 to be tested is detachably mounted, and input / output terminals T ₁ to T ₁ to which the measuring pins P _{1 to} P _n of the IC tester main body 2 are brought into contact.
T _n and wirings 14 _{1 to} 14 _n for connecting the input / output terminals T _{1 to} T _n to corresponding terminals of the IC under test 12 through the IC socket 12 are mounted. The calibration board 4 has terminals Q _{1 to} Q _n connected to the measurement pins P _{1 to} P _n of the IC tester main body 2 instead of the input / output terminals T _{1 to} T _n of the test board 3 during initial adjustment of the IC tester. And the calibration robot 15 is mounted. Calibration robot 15 sequentially measure the propagation delay time τ ₁ ~τ _n from the measurement signal input to the terminal Q ₁ to Q _n to the measurement pin P ₁ to P _n from the signal generator 6 of each channel, they Input data to the delay control circuit 10.

[0004] Incidentally, when measuring the delay time tau _i for each channel calibration robot 15, the delay amount of the variable delay circuit 7 _i is set to the standard value d _r. Delay control circuit 10 is a measurement data tau _i is compared with the reference data tau _r, seeking difference value Δ _i = _{τ i} -τ _r, the variable delay circuit 7
the amount of delay d _i of _i is set to d _i = d _r -Δ _i. A delay time τ ₁ ~τ _n of the thus all channels are reference values tau _r
Are available.

[0005]

In the conventional IC tester, the propagation delay times τ _{1 to} τ _n of all channels are set to 1 by using the calibration robot 15 at the time of initial adjustment before the test.
There is a problem that it is necessary to measure each channel, and it takes a long time for the measurement. An object of the present invention is to reduce the initial adjustment time before testing the IC tester.

[0006]

[Means for Solving the Problems]

(1) In the invention of claim 1, the calibration board switches and selects one of the measurement signals of the respective channels input to the first to nth terminals, and each of the multiplexers measured from the output signal of the multiplexer. A memory for storing the propagation delay time of the channel and supplying the data to the delay control circuit.

(2) According to the invention of claim 2, in the above (1), the calibration board incorporates a circuit for measuring the propagation delay time of each channel from the output signal of the multiplexer. (3) According to the invention of claim 3, in the above (1) or (2), the memory provided on the calibration board is an IC.
It is mounted on the tester body.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention is shown in FIG.
The same symbols are given to the parts corresponding to and duplicate explanations are omitted.
Abbreviate. In this invention, the conventional calibration robot
In place of the calibration board 4
A new board is used. That is, in the boat 4 of the present invention
Is the measuring pin P₁~ P_nTerminal connected to₁~ Q_n,
Terminal Q ₁~ Q_nMultiply the measurement signals of
Lexer 16, propagation delay time τ of each channel₁~ Τ_nNote
It should be noted that the delay control circuit 10 can be read out as necessary.
Memory 17 capable of measuring the propagation delay time of each channel
Propagation delay time measurement circuit 1 implemented as necessary
9. A control circuit 18 for controlling each of these parts is mounted
You.

A propagation delay time measuring circuit 19 is installed in the boat 4.
If not installed, the output terminal C of the multiplexer 16
When delaying by connecting an external measuring device to the connected terminal OUT
Interval τ ₁~ Τ_nIs measured and the measured value is stored in the memory 17.
I do. The delay control circuit 10 stores a memory during initial adjustment before the test.
17 data is read out and is the same as described in the prior art
Variable delay circuit 7₁~ 7_nThe amount of delay
Can be.

The memory 17 may be mounted on the IC tester main body 2 side.

[0011]

According to the present invention, the calibration board
Delay time τ₁~ Τ _nThe storage means of
The delay time of each channel is measured and stored in the memory.
Writing does not have to be performed during initial adjustment before the test, and is
If necessary, for example, once a week or once a month
Just do it. During normal initial adjustment, the delay control circuit 10
The data in the memory 17 is read out and the delay circuit 7₁~ 7_n
Since it is only necessary to adjust
Can be done with.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram of a conventional IC tester.

Claims (3)

[Claims] 1. A timing generator, a signal generator for generating measurement signals of first to n-th (integer of 2 or more) channels in accordance with the timing of the timing generator, and a first signal output from the signal generator. 1st to nth variable delay circuits for delaying the 1st to nth channel measurement signals, and 1st to 1st
An nth measurement pin, first to nth drivers for inputting the output signals of the first to nth variable delay circuits and supplying a measurement signal (current / voltage) to the first to nth measurement pins, 1 to
A first to nth comparator for comparing a signal (voltage / current) generated at the nth measurement pin with an expected value, and a delay control circuit for adjusting a delay time of the first to nth variable delay circuits. I
C tester main body, IC socket for mounting IC under test, first to nth input / output terminals which are in contact with first to nth measurement pins of the IC tester main body, and first to nth input / output terminals thereof And a wiring for connecting the terminals to corresponding terminals of the IC under test through the IC socket, and the first to nth input / output terminals of the IC tester main body instead of the first to nth input / output terminals of the test board. The IC tester has first to nth terminals connected to the n measurement pin, measures the propagation delay time from the measurement signal generator of each channel of the IC tester body to the measurement pin, and outputs the measurement data. An IC tester comprising: a calibration board for inputting to the delay control circuit of the main body; wherein the calibration board is one of measurement signals of each channel input to the first to nth terminals. An IC tester comprising: a multiplexer for switching and selecting the signal, and a memory for storing the propagation delay time of each channel measured from the output signal of the multiplexer and supplying the data to the delay control circuit. 2. The IC tester according to claim 1, wherein the calibration board incorporates a circuit for measuring a propagation delay time of each channel from an output signal of the multiplexer. 3. The IC tester according to claim 1, wherein the memory provided on the calibration board is mounted on the IC tester main body.