JPH0974276A - Surface-mounting printed wiring board - Google Patents

Surface-mounting printed wiring board

Info

Publication number
JPH0974276A
JPH0974276A JP7229117A JP22911795A JPH0974276A JP H0974276 A JPH0974276 A JP H0974276A JP 7229117 A JP7229117 A JP 7229117A JP 22911795 A JP22911795 A JP 22911795A JP H0974276 A JPH0974276 A JP H0974276A
Authority
JP
Japan
Prior art keywords
printed wiring
wiring board
bypass capacitor
surface mount
copper foil
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7229117A
Other languages
Japanese (ja)
Inventor
Osamu Gunji
修 郡司
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Cable Ltd
Original Assignee
Hitachi Cable Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Cable Ltd filed Critical Hitachi Cable Ltd
Priority to JP7229117A priority Critical patent/JPH0974276A/en
Publication of JPH0974276A publication Critical patent/JPH0974276A/en
Pending legal-status Critical Current

Links

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PROBLEM TO BE SOLVED: To reduce a bypass capacitor in mounting area to an irreducible minimum by a method wherein the bypass capacitor is built inside a surface- mounting printed wiring board body. SOLUTION: A copper foil layer 2 is provided to both the sides of a board 1, and an insulating layer or a board 3 is provided to each outer side of the copper foil layers 2. Furthermore, a signal wire 4 is provided to each outer side of the boards 3. The insulating layer 3 formed on the outer surface of the copper foil pattern 2 can be easily photoetched if it is formed of ultraviolet, curing resin or the like, whereby a space where a capacitor is housed can be formed, so that a space which communicates with the outside and inside is provided to the insulating layer 3, and a bypass capacitor 6 is provided in the space. That is, a bypass capacitor can be built inside a board body, so that it can be reduced to an irreducible minimum in mounting area.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、プリント配線基板
の技術分野に関し、特に、HF帯以上の高い動作周波数
の表面実装部品を高密度実装する多層プリント配線基板
に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the technical field of printed wiring boards, and more particularly, it relates to a multilayer printed wiring board on which surface-mounted components having a high operating frequency above the HF band are mounted at high density.

【0002】[0002]

【従来の技術】図2は従来提案されたプリント配線基板
の一例を示したもので、同図から分かるように、従来の
プリント配線基板自身は、内層を電源線、またはグラン
ド線であるベタ面2の銅箔とし、その層間には絶縁体で
ある基板(プリプレグ)1を配しているため、誘電率は
約5前後であり、電源、グランド層間の静電容量は小さ
く、バイパスコンデンサーとは成り得ないものである。
2. Description of the Related Art FIG. 2 shows an example of a conventionally proposed printed wiring board. As can be seen from the figure, the conventional printed wiring board itself has a solid surface whose inner layer is a power line or a ground line. Since the copper foil of No. 2 is used and the substrate (prepreg) 1 which is an insulator is arranged between the layers, the dielectric constant is about 5 and the electrostatic capacitance between the power supply and ground layers is small. It cannot happen.

【0003】図4は従来のプリント配線基板に部品;L
SI5などを実装してその動作状況を示しており、LS
I5などのノイズを削減するために、LSI5の電源端
に周辺にノイズ削減用のバイパスコンデンサー6を配し
ている。
FIG. 4 shows a part of a conventional printed wiring board; L
It shows the operating status by implementing SI5, etc.
In order to reduce noise such as I5, a bypass capacitor 6 for noise reduction is arranged around the power source end of the LSI 5.

【0004】また、図7は従来のプリント配線基板の電
源線の補強用に考案されたパワーブスの一例を示したも
ので、パワーブス8内にノイズ削減用バイパスコンデン
サーを配している。
FIG. 7 shows an example of a power bus designed for reinforcing the power supply line of a conventional printed wiring board, in which a noise reducing bypass capacitor is arranged in the power bus 8.

【0005】[0005]

【発明が解決しようとする課題】図4に示した表面実装
プリント配線基板は、小型軽量化が進み、部品の実装密
度が高密度化してきているが、静電誘導や電磁誘導によ
るノイズ防止のため、高周波インピーダンスを小さくす
る目的で、バイパスコンデンサー6を実装部品となるL
SI5の電源端子周辺に追加実装しているが、バイパス
コンデンサー6などの部品実装エリアを容易に確保でき
なくなってきている。
The surface mount printed wiring board shown in FIG. 4 is becoming smaller and lighter and the mounting density of components is becoming higher. However, it is possible to prevent noise due to electrostatic induction or electromagnetic induction. Therefore, for the purpose of reducing the high frequency impedance, the bypass capacitor 6 is used as a mounting component L.
Although it is additionally mounted around the power supply terminal of SI5, it becomes difficult to easily secure the component mounting area such as the bypass capacitor 6.

【0006】また、図7に示したパワーブス8実装のプ
リント配線基板の場合、バイパスコンデンサーの電流経
路は、表面実装部品のリードからプリント配線基板の電
源配線パターンを介し、さらにパワーブス8内のバイパ
スコンデンサーを経て、パワーブスグランド線からプリ
ント配線基板の配線パターンを介するルートによること
から、電流ルートが長くなるという欠点を有することに
なる。また、電流ルートを短くするために、パワーブス
の形状を表面実装部品の形状に合わせ、電源ピンやグラ
ンドピンに合致するようにバイパスコンデンサーをパワ
ーブス内に配置するとすれば、パワーブスの品種構成が
多大なものとなり高価なものとなるために実用的でなく
なってしまうのである。
Further, in the case of the printed wiring board on which the power bus 8 is mounted as shown in FIG. 7, the current path of the bypass capacitor is from the lead of the surface mount component to the power wiring pattern of the printed wiring board, and further the bypass capacitor in the power bus 8. After that, since the route is from the power bus ground line to the wiring pattern of the printed wiring board, the current route becomes long. Also, in order to shorten the current route, if the shape of the power bus is matched with the shape of the surface mount component and the bypass capacitor is placed in the power bus so as to match the power pin and the ground pin, the power bus product type configuration will be large. It becomes so expensive that it becomes impractical.

【0007】また、動作周波数も数十MHzと比較的高い
周波数帯を使用するようになり、インピーダンスを小さ
くするため電流経路を短くすることが重要となるが、実
装バイパスコンデンサー6を流れるプリント配線基板の
電流ルート7を短くすることができなかった。パワーブ
スを使用した場合はさらに電流経路が長くなり、バイパ
スコンデンサーの効果が期待できなくなるのである。
In addition, the operating frequency has become relatively high at several tens of MHz, and it is important to shorten the current path in order to reduce the impedance. However, the printed wiring board flowing through the mounting bypass capacitor 6 is required. Could not shorten the current route 7. When the power bus is used, the current path becomes longer and the effect of the bypass capacitor cannot be expected.

【0008】そこで、本発明の解決すべき課題は、表面
実装プリント配線基板上に実装されるバイパスコンデン
サーの実装エリアを最小限に抑え、かつ、バイパスコン
デンサーを流れるノイズとなり得る高周波電流のルート
を最短にして、電流経路面積を最少にする、表面実装プ
リント配線基板を提供することにある。
Therefore, the problem to be solved by the present invention is to minimize the mounting area of the bypass capacitor mounted on the surface mount printed wiring board and to minimize the route of the high frequency current which may become noise flowing through the bypass capacitor. Another object of the present invention is to provide a surface mount printed wiring board that minimizes the current path area.

【0009】[0009]

【課題を解決するための手段】本発明により提供する表
面実装プリント配線基板は、表面実装プリント配線基板
の本体内にバイパスコンデンサーを内在せしめてなるも
のである。
The surface mount printed wiring board provided by the present invention has a bypass capacitor incorporated in the body of the surface mount printed wiring board.

【0010】当該バイパスコンデンサー部品の具体的な
配置態様は、プリント配線基板本体における電源線、ま
たはグランド線となる内層のベタ面銅箔導体と表面実装
部品用パッドとの間に挿んで高周波電源のルートを司る
ようにしてなると良いものである。その場合、バイパス
コンデンサー部品は、プリント配線基板本体における電
源線、またはグランド線となる内層のベタ面銅箔導体
と、表面実装部品用パッドとの間の絶縁層内に設ければ
良い。
The specific arrangement of the bypass capacitor component is as follows: Insert the high-frequency power source by inserting it between the solid surface copper foil conductor of the inner layer to be the power source line or the ground line in the printed wiring board body and the pad for the surface mount component. It would be nice to be in control of the route. In that case, the bypass capacitor component may be provided in the insulating layer between the solid surface copper foil conductor of the inner layer to be the power supply line or the ground line in the printed wiring board body and the surface mount component pad.

【0011】[0011]

【発明の実施の形態】図1は、本発明にかかる表面実装
プリント配線基板の実施例を示すもので、図3に同プリ
ント配線基板を用いた表面実装例を示している。この実
施例におけるプリント配線基板本体は4層構造からな
る。即ち、基板(プリプレグ)1の両面に、電源線、ま
たはグランド線となるベタ面状の銅箔層2を設け、各銅
箔層2上に絶縁層または基板3,3(基板またはプリプ
レグも含み得る。)を設け、さらにその外面側に銅箔等
の信号線層4,4を形成してなるものである。かかる銅
箔等の信号線層4には、表面実装部品用パッドを含ませ
る。
1 shows an embodiment of a surface mount printed wiring board according to the present invention, and FIG. 3 shows a surface mount example using the same printed wiring board. The printed wiring board body in this embodiment has a four-layer structure. That is, a solid surface copper foil layer 2 to be a power line or a ground line is provided on both surfaces of a substrate (prepreg) 1, and an insulating layer or substrates 3 and 3 (including the substrate or prepreg are also included on each copper foil layer 2). Is provided, and signal line layers 4 and 4 such as copper foil are further formed on the outer surface side thereof. The signal line layer 4 such as the copper foil includes a pad for surface mount component.

【0012】しかして、銅箔パターン層2の外側に形成
される絶縁層3(基板またはプリプレグ)は、紫外線硬
化型樹脂等を使用すれば容易にフォトエッチングが可能
であり、それによりバイパスコンデンサーを挟むスペー
スをも形成可能である。そこで、この絶縁層3において
内外に通ずるスペースを作り、このスペース部分にバイ
パスコンデンサー6を設けてなるものである。
However, the insulating layer 3 (substrate or prepreg) formed on the outside of the copper foil pattern layer 2 can be easily photo-etched by using an ultraviolet curable resin or the like, whereby a bypass capacitor can be formed. A sandwiching space can also be formed. Therefore, the insulating layer 3 is provided with a space communicating with the inside and outside, and the bypass capacitor 6 is provided in this space portion.

【0013】バイパスコンデンサー6は、銅箔パターン
層2にはんだ付け接続等により固定され絶縁層3の所定
スペース内に組み入れられる。この後に、無電解メッキ
法等により銅箔等の信号線層(表面実装部品用パッド)
4が形成される。これにより、バイパスコンデンサー6
は、電源線、またはグランド線となるベタ面状の銅箔層
2と、表面実装部品用パッドの層4との間に挿まれ、文
字通りのバイパスコンデンサーの役目を果たすようにし
た。
The bypass capacitor 6 is fixed to the copper foil pattern layer 2 by soldering or the like and is incorporated in a predetermined space of the insulating layer 3. After this, a signal line layer (pads for surface mount components) such as copper foil by electroless plating etc.
4 is formed. This allows the bypass condenser 6
Was inserted between the solid surface-shaped copper foil layer 2 to be the power supply line or the ground line and the layer 4 of the surface mount component pad, and served as a literal bypass capacitor.

【0014】図3には、上記のようにして構成されたプ
リント配線基板本体に対してLSI5を実装した例であ
る。この実装例によれば、電流経路は、符号7で示され
るように、実装部品となるLSI5のリードからプリン
ト配線基板本体の実装部品用パッド4を介して内部のバ
イパスコンデンサー6を経由し、そして内層のベタ面状
の銅箔層2を介してLSI5の他のリードへと流れるた
め、図4に示すように、実装部品であるLSI5近辺に
バイパスコンデンサー6の外付けする必要がなくなり、
最短電流ルートを確保でき、ひいては、ループ断面積最
少にすることが可能となり放射ノイズ削減が可能となっ
たものである。
FIG. 3 shows an example in which the LSI 5 is mounted on the printed wiring board body constructed as described above. According to this mounting example, the current path is, as shown by reference numeral 7, from the lead of the LSI 5 which is a mounting component, through the mounting component pad 4 of the printed wiring board main body, through the internal bypass capacitor 6, and Since it flows to the other lead of the LSI 5 through the solid copper foil layer 2 of the inner layer, it is not necessary to externally attach the bypass capacitor 6 in the vicinity of the LSI 5 which is a mounting component, as shown in FIG.
The shortest current route can be secured, and the loop cross-sectional area can be minimized to reduce the radiation noise.

【0015】前述した実施例では、バイパスコンデンサ
ー6は、中間の基板(プリプレグ)1に対して片側の絶
縁層3に内在させるものであるが、これに限らず、図5
の第二実施例のように、両方の絶縁層3,3にバイパス
コンデンサー6,6を内在させ、両面における表面実装
を可能としたものである。図5において、図1および図
3の実施例と同一部分にはそれに付した符号をそのまま
援用してあるので、前述した説明も併せ参照されたい。
In the above-described embodiment, the bypass capacitor 6 is incorporated in the insulating layer 3 on one side of the intermediate substrate (prepreg) 1, but the present invention is not limited to this, and the structure shown in FIG.
As in the second embodiment, the bypass capacitors 6 and 6 are provided in both insulating layers 3 and 3 to enable surface mounting on both surfaces. In FIG. 5, the same parts as those of the embodiment of FIGS. 1 and 3 are referred to by the same reference numerals, and therefore the above description should also be referred to.

【0016】図6は、本発明にかかる表面実装プリント
配線基板の第三の実施例を示すもので、図1の4層より
も多層の6層の例からなる。図1および図3の実施例と
同一部分にはそれに付した符号をそのまま援用してある
ので、前述した説明も併せ参照されたい。
FIG. 6 shows a third embodiment of the surface mount printed wiring board according to the present invention, which is composed of an example of 6 layers, which is more than 4 layers of FIG. The same parts as those in the embodiments of FIGS. 1 and 3 are referred to by the same reference numerals, and therefore the above description should also be referred to.

【0017】[0017]

【発明の効果】以上説明したような本発明によれば、表
面実装プリント配線基板の本体内にバイパスコンデンサ
ーを内在せしめてなるものであることから、プリント基
板上にバイパスコンデンサーを外付け実装する必要がな
くなり、プリント配線基板の厚みの範囲内で電流経路を
設定できる。これ故に、表面実装プリント配線基板上に
実装されるバイパスコンデンサーの実装エリアを最小限
に抑え、かつ、バイパスコンデンサーを流れるノイズと
なり得る高周波電流のルートを最短にして、電流経路面
積を最少にする、表面実装プリント配線基板を提供する
という所期の目的を達成することができる。
According to the present invention as described above, since the bypass capacitor is incorporated in the main body of the surface mount printed wiring board, it is necessary to externally mount the bypass capacitor on the printed board. Is eliminated, and the current path can be set within the range of the thickness of the printed wiring board. Therefore, the mounting area of the bypass capacitor mounted on the surface mount printed wiring board is minimized, and the route of high-frequency current that may cause noise flowing through the bypass capacitor is minimized to minimize the current path area, The intended purpose of providing a surface mount printed wiring board can be achieved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明にかかる表面実装プリント配線基板の実
施例を示す要部断面図。
FIG. 1 is a sectional view of an essential part showing an embodiment of a surface mount printed wiring board according to the present invention.

【図2】従来のプリント配線基板の例を示す要部断面
図。
FIG. 2 is a sectional view of an essential part showing an example of a conventional printed wiring board.

【図3】図1に示すプリント配線基板の表面実装及び動
作状況を示す説明図。
FIG. 3 is an explanatory diagram showing surface mounting and operating conditions of the printed wiring board shown in FIG.

【図4】図2に示すプリント配線基板の表面実装及び動
作状況を示す説明図。
FIG. 4 is an explanatory diagram showing surface mounting and operating conditions of the printed wiring board shown in FIG.

【図5】本発明にかかる表面実装プリント配線基板の別
な実施例を示す要部断面図。
FIG. 5 is a sectional view of an essential part showing another embodiment of the surface mount printed wiring board according to the present invention.

【図6】本発明にかかる表面実装プリント配線基板のさ
らに別な実施例を示す要部断面図。
FIG. 6 is a sectional view of an essential part showing still another embodiment of the surface mount printed wiring board according to the present invention.

【図7】従来の表面実装プリント配線基板の別な実装及
び動作状況を示す説明図。
FIG. 7 is an explanatory diagram showing another mounting and operating state of the conventional surface mount printed wiring board.

【符号の説明】[Explanation of symbols]

1 基板(プリプレグ) 2 電源またはグランド線の面パターン層 3 絶縁層または基板 4 銅箔等の信号線層(表面実装部品用パッドを含む) 5 LSI 6 バイパスコンデンサー 7 高周波電源電流 1 board (prepreg) 2 surface pattern layer of power supply or ground wire 3 insulating layer or board 4 signal line layer such as copper foil (including pads for surface mount parts) 5 LSI 6 bypass capacitor 7 high frequency power current

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】表面実装プリント配線基板の本体内にバイ
パスコンデンサーを内在せしめてなる、表面実装プリン
ト配線基板。
1. A surface mount printed wiring board, wherein a bypass capacitor is incorporated in the body of the surface mount printed wiring board.
【請求項2】バイパスコンデンサー部品は、プリント配
線基板本体における電源線、またはグランド線となる内
層のベタ面銅箔導体と表面実装部品用パッドとの間に挿
んで高周波電源のルートを司るようにしてなる、請求項
1記載の表面実装プリント配線基板。
2. A bypass capacitor part is inserted between a solid surface copper foil conductor of an inner layer to be a power supply line or a ground line in a printed wiring board main body and a surface mount component pad to control a route of a high frequency power supply. The surface-mounted printed wiring board according to claim 1, wherein
【請求項3】バイパスコンデンサー部品は、プリント配
線基板本体における電源線、またはグランド線となる内
層のベタ面銅箔導体と、表面実装部品用パッドとの間の
絶縁層内に設けてなる、請求項1または請求項2の何れ
か1に記載の表面実装プリント配線基板。
3. The bypass capacitor component is provided in an insulating layer between a solid surface copper foil conductor of an inner layer which becomes a power supply line or a ground line in a printed wiring board body and a pad for surface mounting component. The surface mount printed wiring board according to claim 1.
JP7229117A 1995-09-06 1995-09-06 Surface-mounting printed wiring board Pending JPH0974276A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7229117A JPH0974276A (en) 1995-09-06 1995-09-06 Surface-mounting printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7229117A JPH0974276A (en) 1995-09-06 1995-09-06 Surface-mounting printed wiring board

Publications (1)

Publication Number Publication Date
JPH0974276A true JPH0974276A (en) 1997-03-18

Family

ID=16887019

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7229117A Pending JPH0974276A (en) 1995-09-06 1995-09-06 Surface-mounting printed wiring board

Country Status (1)

Country Link
JP (1) JPH0974276A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001035990A (en) * 1999-07-22 2001-02-09 Kyocera Corp Semiconductor device
JP2008130612A (en) * 2006-11-16 2008-06-05 Denso Corp Electronic part built-in multilayer board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001035990A (en) * 1999-07-22 2001-02-09 Kyocera Corp Semiconductor device
JP2008130612A (en) * 2006-11-16 2008-06-05 Denso Corp Electronic part built-in multilayer board
US8184447B2 (en) 2006-11-16 2012-05-22 Denso Corporation Multi-layer electronic part built-in board

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