JPH0974167A - Semiconductor module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor module which can be electrically connected with electrodes of the respective semiconductor chips, by directly linking a plurality of semiconductor devices with electrode terminals, and by penetrating a plurality of the semiconductor devices, with a part of the electrode terminals. SOLUTION: Electrode terminals 15 for continuous connection which directly link the parts between semiconductor devices 11 are arranged on the side surfaces of semiconductor device bodies, besides normal electrode terminals 13 which connect the semiconductor devices 11 with boards. Electrode terminals 15a for continuous connection, as a part of the electrode terminals 15, penetrate a plurality of the semiconductor devices. In plastic molded parts 18, single ends of the electrode terminals 13 and the electrode terminals 15 for continuous connection of body side surfaces, and specified parts of the electrode terminals 15a for continuous connection of body side surfaces which penetrate the semiconductor devices are connected with specified electrodes of semiconductor chips 12 through Au wires 17 and electrically conductive with the electrodes.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor module, and more particularly to a semiconductor module in which a plurality of semiconductor devices are connected by connecting electrode terminals.

[0002]

2. Description of the Related Art Conventional semiconductor devices such as SOJ and SO
The electrode terminals of P, QFP, DIP, ZIP, etc. are directly connected to the lands of the substrate for each semiconductor device by soldering, and the electrical connection between the electrode terminals of the plurality of semiconductor devices is obtained through the wiring of the substrate and at the same time the substrate is obtained. It receives electrical input and output from.

Further, as a conventional technique, a hybrid integrated circuit board having electrode terminals for substrate connection is attached to the electrode terminals at both ends of the semiconductor device, the semiconductor device is supported by the hybrid integrated circuit board, and the board is connected to the hybrid integrated circuit board. There is also a method in which the electrode terminals are soldered to the substrate and indirectly electrically connected to the substrate (JP-A-56-63058).

The structure shown in FIG. 13 is adopted as a method for obtaining electrical conduction between semiconductor devices without using a substrate (Japanese Patent Laid-Open No. 4-343462). FIG. 13 is a schematic side view of a conventional semiconductor device in which electrode terminals are connected to each other.
In the figure, reference numeral 131 is a vertical semiconductor device, 133 is a normal electrode terminal, 133a is a flat portion of the electrode terminal 133, 134 is a connected electrode terminal, and 134a is a connected electrode terminal 134.
The flat part of FIG.

As shown in FIG. 13, electrode terminals 134 of a part of two vertical type semiconductor devices are connected to each other and bent to form a flat portion 134a, and a flat portion provided on a normal electrode terminal 133 is formed. The semiconductor device 131 is held vertically along with 133a and mounted on the substrate. By connecting the electrode terminals of each of the plurality of semiconductor devices in this way, the signals can be input to the plurality of semiconductor devices if the signals are input to the flat portion, so that the signal input land of the substrate can be reduced.

Further, a method of directly connecting external electrodes of a semiconductor device by using a TAB lead as shown in FIG. 15 has also been adopted (Japanese Patent Laid-Open No. 2-290033). FIG. 15 is a schematic plan view of a semiconductor module in which external electrodes of three semiconductor devices are directly connected using TAB leads. In the figure, reference numeral 152a indicates external electrodes of the semiconductor device 159, 154.
Is a TAB lead, and 159 is a semiconductor device. The external electrodes 152a of the adjacent portions of the three semiconductor devices 159 arranged close to each other in FIG. 15 are directly connected by the TAB lead 154, and the other external electrodes 152a are connected to the TAB lead 154.
Has been pulled out to the outside.

[0007]

The conventional method of electrically connecting semiconductor devices to each other through a substrate is such that a large number of semiconductor devices are mounted on one substrate at a high density as in the present method. In this case, it is required that the wiring of the substrate be miniaturized and the number of layers be increased. However, since there is a technical limit to the miniaturization of wiring, if further miniaturization is required, it is necessary to avoid it by a method in which the wiring is multilayered and conduction is provided between wiring layers.

As the number of semiconductor devices on the substrate is increased in this way, it is inevitable that the wiring layers are multi-layered. The miniaturization and multi-layering of these wirings increase the cost of the substrate. Further, an increase in the number of semiconductor devices on the substrate causes a problem of an increase in mounting man-hours.

In the method of connecting the hybrid integrated circuit substrate to the electrode terminals of the semiconductor device and soldering the leads of the connected hybrid integrated circuit substrate to the substrate, the height of the semiconductor device is increased by the hybrid integrated circuit substrate. There is a problem that it ends up.

Further, a method of connecting electrode terminals of a conventional vertical type semiconductor device, providing a flat portion, and mounting on a substrate is as follows.
Cannot connect more than three. FIG. 14 is a schematic plan view of the vertical semiconductor device before being separated from the lead frame. In the figure, reference numeral 141 is a vertical semiconductor device, 144 is an electrode terminal, 144b is a cut portion of the electrode terminal 144, and 146 is a lead frame.

As shown in FIG. 14, the surfaces of the two vertical semiconductor elements 141 having the electrode terminals 144 face each other, and the respective electrode terminals are connected. In the assembly process, the cut portions 144b shown by the diagonal lines of the terminals that are not connected are cut off and bent so that the two vertical semiconductor elements are parallel to each other. At the time of bending, the connecting electrode terminal 134 to be connected as shown in FIG. 133a is provided.
With such a structure, the electrode terminals of the vertical semiconductor element cannot be connected to each other when the number of the electrodes is three or more, so that connection is not possible.

Further, in the conventional method of connecting semiconductor devices to each other with a TAB tape, one semiconductor device and a semiconductor device adjacent thereto can be electrically connected.
It is not possible to obtain electrical continuity with semiconductor devices that are not adjacent to each other. Furthermore, when using a TAB tape, the function of the semiconductor module is changed by cutting the wiring on the TAB tape which is already sealed at the time of mounting and is connected immediately before mounting to change the wiring between semiconductor devices. You cannot do it.

An object of the present invention is to provide a semiconductor module in which a plurality of semiconductor devices are directly connected by electrode terminals, and some electrode terminals penetrate the plurality of semiconductor devices and can be electrically connected to the electrodes of the respective semiconductor chips. Especially.

[0014]

A semiconductor module according to the present invention is a semiconductor module in which a plurality of semiconductor devices are physically and electrically connected to each other and are integrally formed, and each semiconductor element is for substrate connection. It has an electrode terminal and a connecting electrode terminal for directly connecting to an adjacent semiconductor device, and the plurality of semiconductor devices are integrally connected in series at the connecting electrode terminal.

At least one of the connecting electrode terminals may be connected to a semiconductor device adjacent to the semiconductor device by traversing at least one semiconductor device so as to be connectable, and at least one semiconductor device. A connecting electrode terminal penetrating and traversing may be commonly connected to an electrode pad having a function of a semiconductor chip built in each of a plurality of semiconductor devices, and a connecting electrode terminal penetrating and traversing the semiconductor device. However, it may cross over either the front surface or the back surface of the semiconductor chip built in the semiconductor device.

Further, the semiconductor device constituting the semiconductor module is a vertical semiconductor device, and the connecting electrode terminals may be provided on two side surfaces orthogonal to the side surface having the electrode terminals for connecting the substrate. The connection electrode terminal may be bent at a predetermined angle between the two semiconductor devices connected to each other, and the tip of the connection electrode terminal at the end of the semiconductor module may be mounted on a substrate of the semiconductor module at the time of mounting. It may be led out to a position where it can be connected to the wiring of the substrate.

Further, the semiconductor device constituting the semiconductor module may be a surface-mounting type semiconductor device, and connecting electrode terminals may be provided on two parallel side surfaces of the semiconductor device. The outermost portion and the predetermined semiconductor device connecting portion may be led out to a position connectable to the wiring of the substrate when the semiconductor module is mounted on the substrate.

By using the semiconductor module of the present invention, the connection between the vertical semiconductor devices adjacent to each other, which is conventionally performed through the substrate, can be directly performed by the connecting electrode terminals provided on the side surface of the main body. Wiring can be reduced.

Further, the connection electrode terminals on the side surface of the main body penetrating through a plurality of vertical semiconductor devices enable connection with non-adjacent semiconductors, which was impossible with the conventional connection using the ZIP or TAB tape described above. Becomes

Further, if one of the connecting electrode terminals on the side surface of the main body passing through the plurality of vertical semiconductor devices is electrically connected to a common purpose electrode of the semiconductor chips of the respective semiconductor devices, then one electrode is provided. It is possible to input signals to a plurality of vertical semiconductor devices simply by inputting signals to the electrode terminals of, and thus it is possible to reduce the number of electrode terminals connected to the substrate.

By reducing the number of wirings and the number of electrode terminals as described above, the width of the wirings on the substrate can be made wider than before, and the number of wirings can be reduced.

By connecting the adjacent vertical type semiconductor devices with the bent connecting electrode elements, the individual semiconductor devices are less likely to fall down during mounting.

[0023]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a schematic plan view of a semiconductor module according to a first embodiment of the present invention (a).
Is a schematic plan view of the appearance, and (b) is a cross-sectional view showing the internal structure of the sealing resin in (a). In the figure, reference numeral 11 is a vertical semiconductor device, 12 is a semiconductor chip, 13 is a normal electrode terminal,
Reference numeral 15 is a connecting electrode terminal on the side surface of the main body, 15a is a connecting electrode terminal on the side surface of the main body that penetrates a plurality of semiconductor devices, and 17 is A
u wire, 18 shows a resin sealing part.

As shown in FIG. 1, in addition to the normal electrode terminals 13 for connecting the semiconductor device 11 and the substrate, connection electrode terminals 15 for directly connecting the semiconductor devices 11 are provided on the side surface of the semiconductor device body. The connecting electrode terminal 15a of the part penetrates a plurality of semiconductor devices.

Inside the resin sealing portion 18, the electrode terminal 13
Also, one end of the connecting electrode terminal 15 on the side surface of the main body and a predetermined portion of the connecting electrode terminal 15a on the side surface of the main body penetrating the semiconductor device are connected to a predetermined electrode of the semiconductor chip 12 by the Au wire 17 and electrically connected. .

FIG. 2 is a sectional view showing the internal structure of the encapsulating resin of the semiconductor device having the LOC structure to which the first embodiment of the present invention is applied. Reference numeral 21 in the drawing is a vertical semiconductor device, 22
Is a semiconductor chip, 23 is a normal electrode terminal, 25 is a connecting electrode terminal on the side of the main body, 25a is an connecting electrode terminal on the side of the main body that penetrates a plurality of semiconductor devices, 27 is an Au wire, 2
Reference numeral 8 indicates a resin sealing portion. FIG. 2 shows an embodiment of the present invention L
The present invention is applicable to a semiconductor device having an OC (Lead-On-Chip) structure, and thus the present invention can be applied to a package structure that is widely adopted at present.

As described above, since the connection between the adjacent vertical type semiconductor devices, which is conventionally performed through the substrate, can be directly performed by the connecting electrode terminals 15, 25 and 15a, 25a provided on the side surface of the main body, the inside of the substrate is electrically connected. Wiring can be reduced.

Further, the connection with the non-adjacent semiconductors, which is not possible by the conventional connection using the ZIP or the TAB tape described above, is connected to the electrode terminals 15a on the side surface of the main body penetrating through the plurality of vertical semiconductor devices. , 25a.

Further, one of the connecting electrode terminals 15a and 25a on the side surface of the main body which passes through the plurality of vertical semiconductor devices is electrically connected to a common target electrode of the semiconductor chips 12 and 22 of each semiconductor device. By doing so, it is possible to input signals to a plurality of vertical semiconductor devices simply by inputting the signals to one electrode terminal, which can reduce the number of electrode terminals connected to the substrate.

By reducing the number of wirings and the number of electrode terminals described above, the width of the wirings on the substrate can be made thicker than before, and the multilayering of wirings can be suppressed.

Next, a mounting method according to the first embodiment of the present invention will be described. FIG. 3 is a schematic top view of the mounted semiconductor module, where (a) shows a first arrangement example and (b) shows a second arrangement example. In the figure, 31 is a vertical semiconductor device, and 35 is a connecting electrode terminal on the side surface of the main body. By bending the connecting electrode terminals 35 on the side surface of the main body as shown in FIG. 3, various layouts are possible.

The vertical type semiconductor devices 31 adjacent to each other in this manner
By connecting the above, it becomes difficult for the individual semiconductor devices to collapse, and troubles due to the semiconductor devices falling during mounting can be reduced. This means improvement in stability of the vertical semiconductor device during mounting.

Further, since a plurality of vertical semiconductor devices can be collectively mounted as one semiconductor module, there is an effect of reducing the number of mounting steps.

A second embodiment of the present invention will be described with reference to FIG. FIG. 4 is a schematic front view of a semiconductor module according to a second embodiment of the present invention, in which 41 is a vertical semiconductor device, 43 is a normal electrode terminal, 45 is a connecting electrode terminal on the side surface of the main body, and 45b. Indicates a cut portion of the connecting electrode terminal 45 on the side surface of the main body. By selectively cutting the electrode terminals 45 on the side surface of the main body as shown in FIG. 4, the function of the semiconductor module can be changed immediately before mounting.

Next, an outline of the method of manufacturing the semiconductor module of the present invention will be described with reference to FIG. FIG. 5 is a schematic front view of the semiconductor module before being separated from the lead frame, in which reference numeral 51 denotes a vertical semiconductor device, and 53.
Is a normal electrode terminal, 55 is an electrode terminal for connection on the side surface of the main body,
55b is a cut portion of the connecting electrode terminal 55 on the side surface of the main body, 56
Indicates a lead frame.

As shown in FIG. 5, with all the connecting electrode terminals 55 on the side surfaces of the main body connected, a lead frame 56 is formed.
A plurality of vertical semiconductor devices 51 are continuously formed in series on the top. In order to allow the electrode terminals 53 on the lower surface of the semiconductor device 51 to be mounted on the substrate in the next assembly step to be held perpendicularly to the substrate during mounting, the connecting electrode terminals 55 on the side surface of the main body are bent as shown in FIG. Completed after being separated from the frame 56. At this point, the connecting electrode terminal 55 on the side surface of the main body can be cut at the cutting portion 55b as shown by the dotted line in the figure to change the function, but a part of the connecting electrode terminal 55 can be cut by a laser or the like immediately before mounting. It is also possible to disconnect and change the function.

In the embodiment described above, FIG.
As described above, the connecting electrode terminal 15 on the side surface of the main body has a structure in which electrical connection with the substrate on which the semiconductor module is mounted cannot be obtained. However, if necessary, one of the semiconductor modules to which a plurality of semiconductor devices are connected is connected. If the connecting electrode terminals 15 on the side surface of the main body at the end are led out to the side where they are mounted on the board, electrical direct conduction with the board becomes possible, and signals to a plurality of electrode terminals can be obtained with a minimum number of electrode terminals. Input / output of is possible.

Further, as shown in FIG. 1, the connecting electrode terminals 15 on the side surface of the main body are electrodes at positions opposite to the semiconductor chip 12 of the adjacent semiconductor device 11 except the connecting electrode terminal 15a penetrating the semiconductor device. Since it corresponds to a pad, the arrangement of the electrode pad is restricted due to the connection relationship. For example, in FIG. 1A, since the electrode pads at the target positions on the right side on the left side and the left side on the right side of the adjacent semiconductor chips 12 are connected by the common electrode terminal 15, the electrically common electrode pads are adjacent to each other. 12 must be provided on the left and right sides. Such restrictions also apply to the cases shown in FIGS. 13 and 15 which are known examples of the related art.

A method of eliminating this restriction will be described with reference to FIG. FIG. 6 is a schematic front cross-sectional view of a semiconductor module when over-bonding the semiconductor module of the present invention. In the figure, reference numeral 61 is a vertical semiconductor device, 62 is a semiconductor chip, 62a is an electrode pad, and 63.
Is a normal electrode terminal, 65a is an electrode terminal for connection on the side surface of the main body that penetrates a plurality of semiconductor devices, and 67 is an Au wire.

FIG. 6 shows that the number of connecting electrode terminals 65a on the side surface of the main body penetrating a plurality of semiconductor devices is increased to two or more, and the Au wire 67 straddles the leads of other electrode terminals.
Is a method of performing over-lead bonding for connecting the electrode pad 62a and the lead. However, in this case, the number of terminals that can be increased is limited due to the restriction of the terminal area, the wire length of over-lead bonding, and the short circuit with the lead, as the number of the electrode terminals 65a increases.

FIG. 7 is a schematic front cross-sectional view when the electrode terminals of the semiconductor module of the present invention pass through the back surface of the semiconductor chip. In the figure, reference numeral 71 is a vertical semiconductor device, 72 is a semiconductor chip, 72a is an electrode pad, 73 is a normal electrode terminal, 75a is an electrode terminal for connection on the side surface of the main body penetrating a plurality of semiconductor devices, and 77 is an Au wire. . As shown in FIG. 7, a connecting electrode terminal 75a penetrating the semiconductor device 71.
Is disposed on the back surface of the semiconductor chip 72, the electrode pads 72a on the right side and the left side of the semiconductor chip can be connected to a common electrode terminal without limitation as in the case of FIG. Area restrictions can also be resolved.

To mount the semiconductor chip 72 on the electrode terminal 75a, an insulating film is attached to the mounting surface of the semiconductor chip 72a of the electrode terminal 75a and used as a substitute for the conventional semiconductor chip mounting portion, or it is adhered on the film. This can be easily carried out by a method of mounting the semiconductor chip 72 via an agent or the like.

FIG. 8 is a schematic front sectional view when the electrode terminals of the semiconductor module of the present invention pass through the surface of the semiconductor chip. In the figure, reference numeral 81 is a vertical semiconductor device, 82 is a semiconductor chip, 82a is an electrode pad, 83 is a normal electrode terminal, 85a is a connecting electrode terminal on the side surface of the main body penetrating a plurality of semiconductor devices, and 87 is an Au wire. . As shown in FIG. 8, a connecting electrode terminal 85a penetrating the semiconductor device 81.
7 is arranged on the surface of the semiconductor chip 82, the electrode pads 82a on the right and left sides of the semiconductor chip can be connected to a common electrode terminal without limitation as in FIG. 7, and the need for over-lead bonding is eliminated. The terminal area restrictions can also be solved. Normally, the structure in which the leads are located on the semiconductor chip is LOC (Lead On-).
Chip) structure.

Although the above-described embodiments have been described with respect to the semiconductor module in which the vertical semiconductor devices are directly connected to each other by the electrode terminals, a semiconductor device in a surface-mounted semiconductor device will be described as a third embodiment. A semiconductor module will be described which is directly connected by an electrode terminal between them.

9A and 9B are outline views of the SOP semiconductor module of the present invention. FIG. 9A is a schematic plan view, FIG. 9B is a schematic sectional view of FIG. 9A, and FIG. 9C is a schematic side view. Reference numeral 9 in the figure
2 is a semiconductor chip, 92a is an electrode pad, 93 is an electrode terminal for substrate connection, 95a is an electrode terminal for connection for penetrating and connecting a plurality of semiconductor devices, 97 is an Au wire, 99 is an SOP.
3 illustrates a semiconductor device.

SOP (SmallOutline Pa) in which electrode terminals are derived from two opposite sides shown in FIG.
The semiconductor device 99 includes a connecting electrode terminal 95a for penetrating and connecting a plurality of semiconductor devices and a normal electrode terminal 93.
And the semiconductor chip 9 on the connecting electrode terminal 95a for penetrating and connecting a plurality of semiconductor devices via an insulating film or the like.
2 is mounted, and an electrode terminal 93 and a connecting electrode terminal 95a for penetrating and connecting a plurality of semiconductors are connected to a predetermined electrode pad 92a of the semiconductor chip 92 by an Au wire 97. Connecting electrode terminal 9 for penetrating and connecting a plurality of semiconductor devices
In 5a, the electrode terminals are cut and formed in a shape that can be connected to the substrate at the time of mounting on the outermost side of the semiconductor module to which the plurality of semiconductor devices 99 are connected.

FIG. 10 and FIG. 11 show S of another shape of the present invention.
FIG. 10 is a schematic side view of an OP semiconductor module, which is shown in FIG.
3, 113 are normal electrode terminals, 105a, 115a are connecting electrode terminals for penetrating and connecting a plurality of semiconductor devices, 10
Reference numerals 9 and 119 denote SOP semiconductor devices. Connecting electrode terminals 95a, 105a, 1 for penetrating and connecting a plurality of semiconductor devices
Since 15a is a common terminal of the semiconductor devices 99, 109, and 119, it is sufficient if it is connected to the substrate at least at one place, and it is not necessary to connect to the substrate as shown in FIG.
As shown in FIG. 1, electrode terminals that can be connected to the substrate at the time of mounting can be formed at any position including the connecting portion between the semiconductor devices. The normal electrode terminals 93, 103, 113 are
Cut molding is performed for each electrode terminal as in the conventional case.

The number of connecting electrode terminals 95a, 105a, 115a for penetrating and connecting a plurality of semiconductor devices is not particularly limited, but in the case of a large number, the connection strength when the semiconductor module is mounted on the substrate is In order to improve the connection stability, it is possible to connect the substrate at any desired plural places as shown in FIG. 11, instead of connecting the substrate at one place.

The S0P semiconductor module having such a structure has the effect of reducing the number of electrode terminals connected to the substrate, as well as the above-mentioned vertical semiconductor module, and there is no restriction on the electrode pad arrangement of the semiconductor chip. It has an effect that the above semiconductor devices can be connected.

Further, as shown in FIG. 12, a QFP (Quad Flat Package) which is a surface mount type semiconductor device in which electrode terminals are led out from four sides of the semiconductor device.
Can be similarly implemented. FIG. 12 is a schematic sectional view of the QFP semiconductor module of the present invention. In the figure, reference numeral 122 is a semiconductor chip, 122a is an electrode pad,
123 is a normal electrode terminal, 125a is a connecting electrode terminal for penetrating and connecting a plurality of semiconductor devices, 127 is an Au wire,
Reference numeral 129 indicates a QFP semiconductor device. However, in this case, the connecting electrode terminals 125a for penetrating and connecting a plurality of semiconductor devices that can be used as the common electrode terminals are limited to two opposing sides, and the other two sides are only the electrode terminals 123 of the conventional shape.

In the embodiments shown in FIGS. 9 and 12, the semiconductor chip is mounted on the electrode terminals that connect a plurality of semiconductor devices through, but the LOC structure described with reference to FIG. 8 can be similarly implemented. Is.

[0052]

As described above, in the semiconductor module of the present invention, by providing the connecting electrode terminals for directly connecting and electrically connecting a plurality of semiconductor devices, the wiring in the substrate can be reduced, Since it is possible to reduce the number of electrode terminals connected to the substrate, it is possible to suppress the miniaturization and multilayering of the wiring in the substrate and prevent the cost of the substrate from increasing.

Moreover, since a plurality of vertical semiconductor devices can be collectively mounted by connecting adjacent semiconductor devices, the effect of reducing the number of mounting steps can be obtained.

By bending the connecting electrode terminals on the side surface of the main body to perform various layouts, it becomes difficult for the individual semiconductor devices to collapse, and troubles due to the semiconductor devices falling during mounting can be reduced and stability can be improved.

Furthermore, a change in the function immediately before mounting, which was not possible with the connection using the TAB tape of the conventional example, can be performed by cutting the connecting electrode terminal on the side surface of the connected main body.

According to the present invention, the cost of the board can be suppressed by about 5 to 10% depending on the number of parts mounted on the board.

[Brief description of drawings]

FIG. 1 is a schematic plan view of a semiconductor module according to a first embodiment of the present invention. (A) is a schematic plan view of an external appearance. (B) is sectional drawing which shows the structure inside the sealing resin of (a).

FIG. 2 is a cross-sectional view showing a structure inside a sealing resin of a semiconductor device having a LOC structure to which the first embodiment of the present invention is applied.

FIG. 3 is a schematic top view of a mounted semiconductor module. (A) shows the 1st example of arrangement. (B) shows a second arrangement example.

FIG. 4 is a schematic front view of a semiconductor module according to a second embodiment of the present invention.

FIG. 5 is a schematic front view of the semiconductor module before being separated from the lead frame.

FIG. 6 is a schematic front cross-sectional view of a semiconductor module when performing over-lead bonding on the semiconductor module of the present invention.

FIG. 7 is a schematic front cross-sectional view when the electrode terminals of the semiconductor module of the present invention pass through the back surface of the semiconductor chip.

FIG. 8 is a schematic front cross-sectional view when the electrode terminals of the semiconductor module of the present invention pass through the surface of the semiconductor chip.

FIG. 9 is an outline view of the SOP semiconductor module of the present invention. (A) is a schematic plan view. (B) is a typical sectional view of (a). (C) is a typical side view.

FIG. 10 is a schematic side view of an SOP semiconductor module having another shape according to the present invention.

FIG. 11 is a schematic side view of an SOP semiconductor module having another shape according to the present invention.

FIG. 12 is a schematic cross-sectional view of a QFP semiconductor module of the present invention.

FIG. 13 is a schematic side view of a semiconductor device in which electrode terminals of a conventional example are connected to each other.

FIG. 14 is a schematic plan view of a vertical semiconductor device before being separated from a lead frame of a conventional example.

FIG. 15 is a schematic plan view of a semiconductor module in which electrode pads of three semiconductor devices are directly connected using TAB leads of a conventional example.

[Explanation of symbols]

11, 31, 41, 51, 61, 71, 81, 131,
141 vertical type semiconductor device 12, 22, 62, 72, 82, 92, 122 semiconductor chip 13, 23, 43, 53, 63, 73, 83, 93, 1
23, 133 electrode terminals 15, 25, 35, 45, 55 connecting electrode terminals 15a, 25a, 65a, 75a, 85a, 95a, 1 on the side surface of the main body
25a Connection electrode terminals 17, 27, 67, 77, 87, 97, 127 Au on the side surface of the main body penetrating a plurality of semiconductor devices
Wires 18, 28 Resin sealing parts 45b, 55b Cutting parts of connecting electrode terminals on the side surface of the main body 56, 146 Lead frames 62a, 72a, 82a, 92a, 122a Electrode pads 99, 109, 119 SOP semiconductor device 129 QFP semiconductor device 133a Flat part 134, 144 Connected electrode terminals 134a Flat part 144b Cutting part 152a External electrode 154 Tab lead 159 Semiconductor device

Claims (9)

[Claims] 1. In a semiconductor module in which a plurality of semiconductor devices are physically and electrically connected to each other and integrally formed, each semiconductor element is directly connected to an electrode terminal for substrate connection and an adjacent semiconductor device. A semiconductor module having a connecting electrode terminal for connecting the plurality of semiconductor devices, wherein the plurality of semiconductor devices are integrally connected in series at the connecting electrode terminal. 2. The semiconductor module according to claim 1, wherein at least one of the connecting electrode terminals is at least 1.
A semiconductor module, characterized in that the semiconductor module is connected to a semiconductor device adjacent to the semiconductor device so as to traverse through the semiconductor device in a connectable manner. 3. The semiconductor module according to claim 2, wherein the connecting electrode terminal that penetrates and traverses at least one semiconductor device has an electrode having a function of a semiconductor chip incorporated in each of the plurality of semiconductor devices. A semiconductor module, which is commonly connected to a pad. 4. The semiconductor module according to claim 2, wherein the connecting electrode terminal penetrating and traversing the semiconductor device traverses either one of the front and back surfaces of a semiconductor chip built in the semiconductor device. A semiconductor module characterized by. 5. The semiconductor module according to claim 1, wherein the semiconductor device forming the semiconductor module is a vertical semiconductor device, and a side surface having the electrode terminal for substrate connection. 2. The semiconductor module, wherein the connecting electrode terminals are provided on two side surfaces orthogonal to each other. 6. The semiconductor module according to claim 5, wherein the connecting electrode terminal is bent at a predetermined angle between two connected semiconductor devices. 7. The semiconductor module according to claim 5, wherein the tip of the connecting electrode terminal at the end of the semiconductor module can be connected to the wiring of the board when the semiconductor module is mounted on the board. The semiconductor module is characterized in that it is led to various positions. 8. The semiconductor module according to claim 1, wherein the semiconductor device forming the semiconductor module is a surface mount semiconductor device, and two parallel side surfaces of the semiconductor device. A semiconductor module, wherein the connecting electrode terminal is provided in the. 9. The semiconductor module according to claim 8, wherein the predetermined outermost end of the connecting electrode terminal and the predetermined semiconductor device connecting portion are mounted on a substrate of the semiconductor module.
A semiconductor module, which is led out to a position where it can be connected to the wiring of a substrate.