JPH0969605A - Thin film capacitance element and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a thin film capacitance element and its manufacturing method wherein the capacitance per occupied area of a semiconductor substrate is increased and dispersion in capacitance and short-circuit defects are suppressed. SOLUTION: An insulation film 2 is provided on a semiconductor substrate 1 having an even surface, and a thin film electrode 3a is provided on it. A bump electrode 3b is selectively provided on the thin film electrode 3a, and the thin film electrode 3a and the bump electrode 3b constitute a lower electrode 3. An insulation film 4 and an upper layer electrode 5 are laminated on the lower electrode 3 in this order, thus an MIM capacitor is constituted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film capacitive element and a method for manufacturing the same, and more particularly to metal-insulator-metal (M
It is suitable for application to a capacitor having an et al-Insulator-Metal structure (hereinafter referred to as “MIM capacitor”).

[0002]

2. Description of the Related Art A MIM capacitor can form a capacitive element with a smaller area than a distributed constant type element.
For example, it is an effective element in an analog integrated circuit that handles a frequency band of about 10 GHz at most, such as a monolithic microwave integrated circuit (MMIC) for satellite broadcasting and mobile phones.

FIG. 11 shows a sectional structure of a conventional MIM capacitor.

As shown in FIG. 11, this conventional MIM capacitor includes a lower electrode 103, which is sequentially laminated on a semiconductor substrate 101 having a flat surface with an insulating film 102 interposed therebetween.
It is composed of an insulating film 104 and an upper electrode 105.

[0005]

However, since the occupied area of the above-mentioned conventional MIM capacitor is generally extremely large as compared with other circuit elements such as field effect transistors (FETs), this is the area of a chip such as MMIC. It is one of the factors that make reduction difficult.

Therefore, various methods have been proposed to increase the capacitance per unit area occupied by the semiconductor substrate of the MIM capacitor. These methods are roughly classified into the following four methods. First, the first method is to thin the insulating film 104 that is the dielectric layer of the MIM capacitor. The second method is to use a material having a high dielectric constant as the material of the insulating film 104. The third method is a method of forming a multilayer structure in which each layer of the lower layer electrode 103, the insulating film 104, and the upper layer electrode 105 is repeatedly laminated. The fourth method is the lower electrode 1
03 is provided with irregularities, and the lower layer electrode 103 and the upper layer electrode 10
5 is a method of increasing the facing area.

However, in the first method, the insulating film 1 is used.
There is a limit due to the problem that the electrostatic breakdown voltage is deteriorated by making 04 thin. Further, the second method has a drawback that an increase in the number of steps is inevitable for forming a film of a material having a high dielectric constant. In addition, in the third method, it is not realistic to increase the number of electrode layers indefinitely, and once the number of electrode layers is determined, the problems in the first method and the second method described above are avoided. I can't.

On the other hand, as the fourth method, specifically,
A method has been proposed in which unevenness is formed in the underlying layer of the lower electrode, and a metal thin film is formed on the uneven underlying layer to form the uneven lower electrode.
8660 and JP-A-5-152510). However, in general, when the lower layer electrode made of a metal thin film is formed on the underlying layer having irregularities as described above, step breakage of the metal thin film occurs on the side surface of the recess,
It is known that there occurs a problem that an overhang of the metal thin film occurs on the upper portion of the side surface of the convex portion. This step break changes the area of the lower layer electrode,
This causes variations in the capacity of the MIM capacitor. Also,
It is said that the above-described overhang that occurs when the lower layer electrode is formed causes defective deposition of the insulating film on the side surface of the recess immediately below the overhang portion when the insulating film is formed later, and shorts the MIM capacitor. Cause problems. Further, in order to obtain a larger capacitance, it is conceivable to increase the aspect ratio of the uneven cross section of the underlayer, but in this case, the problems of the variation in capacitance of the MIM capacitor and the short circuit failure become remarkable, Increasing the defective rate of the MIM capacitor due to the increase in capacity is unavoidable.

Therefore, an object of the present invention is to provide a thin film capacitive element capable of increasing the capacitance per occupied area of a semiconductor substrate and suppressing variations in capacitance and short circuit defects, and a method of manufacturing the same.

[0010]

In order to achieve the above object, a first invention according to the present invention is a thin film capacitor having a structure in which an insulating film is sandwiched between a pair of electrodes. Is composed of a thin film electrode and a projection electrode selectively provided on the thin film electrode.

In one embodiment of the first invention according to the present invention, the protruding electrode has a stripe shape.

In another embodiment of the first invention according to the present invention, the protruding electrodes have a dot shape and are arranged in a matrix. Here, the shape of the protruding electrode is
In addition to a quadrangle and other polygons, a circle or the like may be used.

According to a second aspect of the present invention, in a thin film capacitive element having a structure in which an insulating film is sandwiched between a pair of electrodes, one of the pair of electrodes is a first thin film electrode and a first thin film electrode. And a second thin film electrode having a plurality of openings provided in the.

In one embodiment of the second invention according to the present invention, the second thin film electrode has a lattice shape.

According to a third aspect of the present invention, in a thin film capacitive element comprising a lower layer electrode, an insulating film and an upper layer electrode which are sequentially laminated on a semiconductor substrate, the lower layer electrode is a thin film-shaped first lower layer electrode. It is characterized by comprising a second lower layer electrode in the form of a protrusion or a thin film having a plurality of openings provided on the first lower layer electrode.

In an embodiment of the third invention according to the present invention, a junction field effect transistor or a Schottky junction field effect transistor is further provided on the semiconductor substrate, and the first lower layer electrode is a junction field effect transistor or Formed of the same material as the gate electrode or the source electrode and the drain electrode of the Schottky junction field effect transistor, or a laminated film of a film forming the gate electrode and a film forming the source electrode and the drain electrode, The second lower layer electrode is formed of the same material as the source electrode and the drain electrode or the wiring of the junction field effect transistor or the Schottky junction field effect transistor, or forms the film and the wiring that form the source electrode and the drain electrode. It is formed by a laminated film with a film.

According to a fourth aspect of the present invention, in a method of manufacturing a thin film capacitor having a structure in which an insulating film is sandwiched between a pair of electrodes, a step of forming a first lower layer electrode made of a thin film on a semiconductor substrate, Forming a conductive film for forming an electrode on the first lower layer electrode; forming a second lower layer electrode by patterning the conductive film into a predetermined shape;
The method is characterized by including a step of forming an insulating film on the lower-layer electrode and the second lower-layer electrode, and a step of forming an upper-layer electrode on the insulating film.

In an embodiment of the fourth aspect of the present invention, the conductive film is patterned to form the second lower layer electrode having a striped shape.

In another embodiment of the fourth invention according to the present invention, the conductive film is patterned to form second lower layer electrodes arranged in a matrix and having a dot shape.

In still another embodiment of the fourth invention according to the present invention, the conductive film is patterned to form the second lower layer electrode having a lattice shape.

In one embodiment of the fourth aspect of the present invention, the second lower layer electrode is formed by patterning the conductive film by an etching method. In this case, the material of the first lower layer electrode and the material of the second lower layer electrode are selected so that a sufficient etching selection ratio can be obtained therebetween.

In another embodiment of the fourth invention according to the present invention, the second lower layer electrode is formed by patterning the conductive film by a lift-off method.

According to the present invention configured as described above, in a thin film capacitor having a structure in which an insulating film is sandwiched between a pair of electrodes, one of the pair of electrodes is on the thin film electrode and on the thin film electrode. Since it is configured by a protruding electrode selectively provided, or by a first thin film electrode and a second thin film electrode having a plurality of openings provided on the first thin film electrode, The effective area of the thin film capacitive element can be increased by the area of the side surface of the protruding electrode or the side surface of the opening as compared with the occupied area of the thin film capacitive element.
Alternatively, in a thin film capacitive element including a lower layer electrode, an insulating film, and an upper layer electrode, which are sequentially stacked on a semiconductor substrate, the lower layer electrode is a first lower layer electrode and a protrusion provided on the first lower layer electrode. Area of the side surface of the second lower layer electrode having a protruding shape or the side surface of the opening, as compared with the area occupied by the thin film capacitive element, The effective area of the thin film capacitor can be increased accordingly.

Further, according to the method of manufacturing a thin film capacitive element of the present invention, after forming a conductive film for forming an electrode on the first lower layer electrode made of a thin film, the conductive film is patterned into a predetermined shape. Since the second lower layer electrode is formed, there is no problem of disconnection or overhang of the metal thin film, which can occur in the above-described conventional technique of forming the lower layer electrode of the metal thin film on the underlying layer having irregularities.

[0025]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an M according to the first embodiment of the present invention.
FIG. 2 is a plan view showing the structure of the IM capacitor, FIG. 2 is II of FIG.
It is a sectional view taken along the line II.

As shown in FIGS. 1 and 2, in the MIM capacitor according to the first embodiment, the insulating film 2 is provided on the semiconductor substrate 1 having a flat surface. Here, the semiconductor substrate 1 is, for example, a Si substrate or GaAs.
The insulating film 2 is a substrate and is, for example, a SiN film or a SiO film.

A thin film electrode 3a is provided on the insulating film 2, and a plurality of (three in this example) stripe-shaped protruding electrodes 3b extending in one direction are provided in parallel with each other on the thin film electrode 3a. The thin film electrode 3a and the protruding electrode 3b form the lower layer electrode 3. An insulating film 4 as a dielectric layer is provided so as to cover the lower electrode 3. Further, an upper layer electrode 5 is provided on this insulating film 4. The lower electrode 3, the insulating film 4, and the upper electrode 5 form an MIM capacitor.

Here, the lower layer electrode 3, that is, the thin film electrode 3
a and the protruding electrode 3b are made of, for example, Ti, Pt, Au,
It is composed of a single layer film or a multilayer film made of a metal such as W or Al or an alloy such as AuGe / Ni. Insulating film 4
Is, for example, a SiN film. The upper layer electrode 5 is, like the lower layer electrode 3, a single layer film or a multilayer film made of a metal such as Ti, Pt, Au, W or Al or an alloy such as AuGe / Ni.

In this case, the insulating film 4 and the upper layer electrode 5 which are dielectric layers have a shape substantially similar to that of the lower layer electrode 3 including the thin film electrode 3a and the protruding electrode 3b, and the portions corresponding to the protruding electrode 3b are respectively formed. It has a protrusion. And
The MIM capacitor according to the first embodiment has a structure in which the thin film electrode 3a which is not covered by the protruding electrode 3b, the insulating film 4 and the upper layer electrode 5 on the thin film electrode 3a, and the protruding electrode 3
b, a portion formed of the insulating film 4 and the upper layer electrode 5 on the upper surface thereof, and a portion formed of the protruding electrode 3b and the insulating film 4 and the upper layer electrode 5 on both side surfaces thereof.

Next, this first structure constructed as described above
A method of manufacturing the MIM capacitor according to the embodiment will be described. 3 to 8 show the M according to the first embodiment.
FIG. 6 is a cross-sectional view showing the manufacturing process of the IM capacitor.

In order to manufacture the MIM capacitor according to the first embodiment, first, as shown in FIG. 3, the insulating film 2 is formed on the semiconductor substrate 1 by the CVD method or the like.
Next, the metal thin film 6 is formed on the insulating film 2 by a vacuum vapor deposition method, a CVD method, a sputtering method, or the like. next,
A resist pattern 7 having a predetermined shape is formed on the metal thin film 6 by photolithography or the like.

Next, using the resist pattern 7 as a mask, the metal thin film 6 is subjected to, for example, reactive ion etching (RIE).
Method or ion milling method. As a result, the thin film electrode 3a is formed as shown in FIG.
After that, the resist pattern 7 is removed.

Next, as shown in FIG. 5, a metal thin film 8 is formed on the entire surface of the semiconductor substrate 1 by a vacuum deposition method, a CVD method, a sputtering method or the like. Next, a resist pattern 9 having a predetermined shape is formed on the metal thin film 8.

Next, the metal thin film 8 is etched by the RIE method or the ion milling method using the resist pattern 9 as a mask. As a result, as shown in FIG. 6, the stripe-shaped protruding electrodes 3b are formed on the thin film electrode 3a. After that, the resist pattern 9 is removed.

Here, when the metal thin film 8 is etched, the metal thin film 6 has a sufficient etching selectivity with the thin film electrode 3a so that the thin film electrode 3a serves as an etching stop layer. Include a layer of material. Specifically, for example, when the metal thin film 8 is a thin film containing Au as a main component and etching is performed by an ion milling method, the metal thin film 6 is a single layer film containing Pt, Ti, Al or the like as a main component, or It is a multilayer film. When the metal thin film 8 is a thin film containing Al as a main component and etching is performed by the RIE method using a reaction gas containing chlorine, the metal thin film 6 is used.
Is a single layer film or a multilayer film including a layer containing Au as a main component.

Next, as shown in FIG. 7, an insulating film 4 is formed on the entire surface of the semiconductor substrate 1 by, for example, the CVD method.

Next, as shown in FIG. 8, a metal thin film 10 is formed on the entire surface of the semiconductor substrate 1 by a vacuum deposition method, a CVD method, a sputtering method or the like, and then the metal thin film 10 is formed.
A resist pattern 11 having a predetermined shape is formed on the top.

Next, the metal thin film 10 is etched by using the resist pattern 11 as a mask. by this,
As shown in FIGS. 1 and 2, the upper layer electrode 5 is formed.

Through the above steps, the desired MIM capacitor is manufactured.

As described above, according to the first embodiment, the lower layer electrode 3 is composed of the thin film electrode 3a and the protruding electrode 3b, and the insulating film 4 and the upper layer electrode 5 are formed thereon.
Since the MIM capacitor is configured by the provision of, the area occupied by this MIM capacitor is
The effective area of the MIM capacitor can be increased by the area of both side surfaces of the protruding electrode 3b. By this, M
A larger capacitance can be obtained per area occupied by the IM capacitor.

Moreover, since the thin-film electrode 3a is provided on the flat underlying surface and the protruding electrode 3b is provided thereon, the step breakage of the lower-layer electrode 3 and the variation of the effective area of the lower-layer electrode 3 are caused. Never. Also, the protruding electrode 3b
Is formed by etching the metal thin film 8, so there is no problem of disconnection or overhang of the metal thin film, which can occur in the conventional technique described above, in which the lower layer electrode made of the metal thin film is formed on the underlying layer having irregularities. Therefore, it is possible to suppress the variation in the capacitance of the MIM capacitor due to the change in the effective area of the lower layer electrode 3 and the occurrence of the short circuit defect of the MIM capacitor due to the defective adhesion of the insulating film 4.

Next, a second embodiment of the present invention will be described.

As shown in FIG. 9, in the MIM capacitor according to the second embodiment, on the thin film electrode 3a,
Substantially square openings 3c are arranged in a matrix to provide a thin film electrode 3d having a lattice shape as a whole, and the thin film electrodes 3a and 3d constitute a lower layer electrode 3. Others are the MIM according to the first embodiment.
It is constructed similarly to the capacitor.

The manufacturing method of the MIM capacitor according to the second embodiment is the same as the manufacturing method of the MIM capacitor according to the first embodiment, and the description thereof will be omitted.

According to this second embodiment, the thin film electrode 3
Since the lower layer electrode 3 is constituted by the thin film electrode 3d having a and the opening 3c, and the insulating film 4 and the upper layer electrode 5 are provided thereon, the MIM capacitor is constituted. , The effective area of the MIM capacitor can be increased by the area of all side surfaces of the opening 3c. This makes it possible to obtain a larger capacitance per occupied area of the MIM capacitor. In addition to this, the same effect as in the first embodiment can be obtained.

Next, a third embodiment of the present invention will be described.

As shown in FIG. 10, in the MIM capacitor according to the third embodiment, the thin film electrode 3a,
The lower layer electrode 3 is formed by the dot-shaped protruding electrodes 3e arranged in a matrix on the thin-film electrode 3a. Others are MI according to the first embodiment.
It is constructed similarly to the M capacitor.

The manufacturing method of the MIM capacitor according to the third embodiment is the same as the manufacturing method of the MIM capacitor according to the first embodiment, and the description thereof will be omitted.

According to the third embodiment, the thin film electrode 3
Since the lower electrode 3 is constituted by the a and the protruding electrode 3e, and the insulating film 4 and the upper electrode 5 are provided thereon, the MIM capacitor is constituted.
The effective area of the MIM capacitor can be increased by the area of all side surfaces of the protruding electrode 3e as compared with the area occupied by the capacitor. This makes it possible to obtain a larger capacitance per occupied area of the MIM capacitor. In addition to this, the same effect as in the first embodiment can be obtained.

The embodiments of the present invention have been specifically described above, but the present invention is not limited to the above-mentioned embodiments, and various modifications can be made based on the technical idea of the present invention.

For example, in the above-mentioned first embodiment, the surface of the underlying layer of the MIM capacitor is flat,
The surface of this underlayer may have irregularities.

Further, the MIM according to the first embodiment described above.
In the capacitor manufacturing method, the metal thin film 8 is formed by RIE.
The protruding electrode 3b is formed by etching by a sputtering method or an ion milling method. The protruding electrode 3b is formed by patterning the metal thin film 8 by a lift-off method.
b may be formed. In this case, the thin film electrode 3
There is no particular restriction on the relationship between a, that is, the material of the metal thin film 6, and the material of the protruding electrode 3b, that is, the material of the metal thin film 8.

Further, in the above-described first embodiment, when the protruding electrode 3b is formed by etching the metal thin film 8, the undercut of the peripheral portion of the resist pattern 9 and the receding of the resist pattern 9 are used. By giving an appropriate taper angle to the side surface of the protruding electrode 3b, it is possible to further reduce the defective deposition of the insulating film 4 on the side surface of the protruding electrode 3b.

Further, in the above-described first to third embodiments, the case where the present invention is applied to the MIM capacitor composed of the lower layer electrode-insulating film-upper layer electrode has been described.
The present invention relates to a MI having a multi-layer electrode structure having three or more layers of electrodes such as electrode-insulating film-electrode-insulating film-electrode.
It can also be applied to an M capacitor. Specifically, in this MIM capacitor having a multilayer electrode structure, the electrode of the lowermost layer or the intermediate layer is composed of a thin film electrode and a protruding electrode or a thin film electrode having a plurality of openings provided thereon.

[0056]

As described above, according to the present invention, it is possible to increase the capacitance per unit area occupied by the semiconductor substrate and suppress variations in capacitance and short circuit defects.

[Brief description of drawings]

FIG. 1 is a plan view showing the structure of an MIM capacitor according to a first embodiment of the present invention.

FIG. 2 is a sectional view taken along line II-II in FIG.

FIG. 3 is a cross-sectional view showing the manufacturing process of the MIM capacitor according to the first embodiment of the present invention.

FIG. 4 is a cross-sectional view showing the manufacturing process of the MIM capacitor according to the first embodiment of the present invention.

FIG. 5 is a cross-sectional view showing the manufacturing process of the MIM capacitor according to the first embodiment of the present invention.

FIG. 6 is a cross-sectional view showing the manufacturing process of the MIM capacitor according to the first embodiment of the present invention.

FIG. 7 is a cross-sectional view showing the manufacturing process of the MIM capacitor according to the first embodiment of the present invention.

FIG. 8 is a cross-sectional view showing the manufacturing process of the MIM capacitor according to the first embodiment of the present invention.

FIG. 9 is a plan view showing the structure of the MIM capacitor according to the second embodiment of the present invention.

FIG. 10 is a plan view showing the structure of the MIM capacitor according to the third embodiment of the present invention.

FIG. 11 is a cross-sectional view showing a structure of a conventional MIM capacitor.

[Explanation of symbols]

 1 semiconductor substrate 2, 4 insulating film 3 lower layer electrode 3a, 3d thin film electrode 3b, 3e protruding electrode 3c opening 5 upper layer electrode 6, 8, 10 metal thin film 7, 9, 11 resist pattern

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Kuninobu Tanaka, 6-7 35 Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation (72) Hiroaki Ashige 6-7, Kita-Shinagawa, Shinagawa-ku, Tokyo No. 35 Sony Corporation

Claims (11)

[Claims] 1. A thin film capacitor having a structure in which an insulating film is sandwiched between a pair of electrodes, wherein one of the pair of electrodes is composed of a thin film electrode and a protruding electrode selectively provided on the thin film electrode. A thin film capacitive element characterized by being provided. 2. The thin film capacitor element according to claim 1, wherein the protruding electrode has a stripe shape. 3. The protruding electrode has a dot shape,
The thin film capacitive element according to claim 1, wherein the thin film capacitive elements are arranged in a matrix. 4. A thin film capacitor having a structure in which an insulating film is sandwiched between a pair of electrodes, wherein one of the pair of electrodes is a first thin film electrode and a plurality of thin film capacitors provided on the first thin film electrode. A thin film capacitive element comprising a second thin film electrode having an opening. 5. The thin film capacitor element according to claim 4, wherein the second thin film electrode has a lattice shape. 6. A thin film capacitor comprising a lower electrode, an insulating film and an upper electrode, which are sequentially laminated on a semiconductor substrate, wherein the lower electrode is a thin film-shaped first lower electrode and the first lower electrode. A thin film capacitive element comprising: a second lower layer electrode, which is a thin film having a protrusion shape or a plurality of openings provided thereon. 7. The semiconductor substrate is further provided with a junction field effect transistor or a Schottky junction field effect transistor, and the first lower electrode is the junction field effect transistor or the Schottky junction field effect transistor. Of the same material as the gate electrode or the source electrode and the drain electrode, or a laminated film of the film forming the gate electrode and the film forming the source electrode and the drain electrode, The lower layer electrode is formed of the same material as the source electrode and drain electrode or the wiring of the junction field effect transistor or the Schottky junction field effect transistor, or the lower electrode and the film forming the source electrode and the drain electrode and the wiring. Be formed of a laminated film with the film that constitutes 7. The thin film capacitive element according to claim 6. 8. A method of manufacturing a thin film capacitor having a structure in which an insulating film is sandwiched between a pair of electrodes, a step of forming a first lower layer electrode made of a thin film on a semiconductor substrate, and a step of forming the first lower layer electrode on the first lower layer electrode. On the first lower layer electrode and the second lower layer electrode, a step of forming a conductive film for forming an electrode on the second conductive layer, a step of forming a second lower layer electrode by patterning the conductive film into a predetermined shape, A method of manufacturing a thin film capacitor, comprising: the step of forming the insulating film; and the step of forming an upper layer electrode on the insulating film. 9. The method of manufacturing a thin film capacitor according to claim 8, wherein the second lower layer electrode having a stripe shape is formed by patterning the conductive film. 10. The method of manufacturing a thin film capacitive element according to claim 8, wherein the second lower layer electrode having a dot shape arranged in a matrix is formed by patterning the conductive film. . 11. The method of manufacturing a thin film capacitor according to claim 8, wherein the second lower layer electrode having a lattice shape is formed by patterning the conductive film.